11NewIFU :
22 # - "wire f1_flush"
33 - " wire f2_flush"
4- - " wire f3_flush"
4+ - " wire f3_flush"
5+ - " wire f1_ready"
6+ - " wire f1_valid"
7+ - " wire wb_enable"
8+ - " wire f1_fire"
9+ - " wire f0_fire"
10+ - " wire f2_ready"
11+ - " wire f3_ready"
12+ - " wire f2_fire"
13+ - " wire f2_valid"
14+ - " wire f3_valid"
15+ - " wire f2_icache_all_resp_wire"
16+ - " wire f2_icache_all_resp_reg"
17+ - " wire icacheRespAllValid"
18+ - " wire f0_flush_from_bpu_probe"
19+ - " wire [1:0] f2_exception_0"
20+ - " wire [1:0] f2_exception_1"
21+ - " wire is_first_instr"
22+ - " reg f3_lastHalf_valid"
23+ - " reg [3:0] mmio_state"
24+ - " reg [1:0] f3_exception_vec_0"
25+ - " reg [1:0] f3_exception_vec_1"
26+ - " reg [1:0] f3_exception_vec_2"
27+ - " reg [1:0] f3_exception_vec_3"
28+ - " reg [1:0] f3_exception_vec_4"
29+ - " reg [1:0] f3_exception_vec_5"
30+ - " reg [1:0] f3_exception_vec_6"
31+ - " reg [1:0] f3_exception_vec_7"
32+ - " reg [1:0] f3_exception_vec_8"
33+ - " reg [1:0] f3_exception_vec_9"
34+ - " reg [1:0] f3_exception_vec_10"
35+ - " reg [1:0] f3_exception_vec_11"
36+ - " reg [1:0] f3_exception_vec_12"
37+ - " reg [1:0] f3_exception_vec_13"
38+ - " reg [1:0] f3_exception_vec_14"
39+ - " reg [1:0] f3_exception_vec_15"
40+ - " reg [6:0] f2_cut_ptr_0"
41+ - " reg [6:0] f2_cut_ptr_1"
42+ - " reg [6:0] f2_cut_ptr_2"
43+ - " reg [6:0] f2_cut_ptr_3"
44+ - " reg [6:0] f2_cut_ptr_4"
45+ - " reg [6:0] f2_cut_ptr_5"
46+ - " reg [6:0] f2_cut_ptr_6"
47+ - " reg [6:0] f2_cut_ptr_7"
48+ - " reg [6:0] f2_cut_ptr_8"
49+ - " reg [6:0] f2_cut_ptr_9"
50+ - " reg [6:0] f2_cut_ptr_10"
51+ - " reg [6:0] f2_cut_ptr_11"
52+ - " reg [6:0] f2_cut_ptr_12"
53+ - " reg [6:0] f2_cut_ptr_13"
54+ - " reg [6:0] f2_cut_ptr_14"
55+ - " reg [6:0] f2_cut_ptr_15"
56+ - " reg [6:0] f2_cut_ptr_16"
57+ - " reg [49:0] f3_pc_0"
58+ - " reg [49:0] f3_pc_1"
59+ - " reg [49:0] f3_pc_2"
60+ - " reg [49:0] f3_pc_3"
61+ - " reg [49:0] f3_pc_4"
62+ - " reg [49:0] f3_pc_5"
63+ - " reg [49:0] f3_pc_6"
64+ - " reg [49:0] f3_pc_7"
65+ - " reg [49:0] f3_pc_8"
66+ - " reg [49:0] f3_pc_9"
67+ - " reg [49:0] f3_pc_10"
68+ - " reg [49:0] f3_pc_11"
69+ - " reg [49:0] f3_pc_12"
70+ - " reg [49:0] f3_pc_13"
71+ - " reg [49:0] f3_pc_14"
72+ - " reg [49:0] f3_pc_15"
73+ - " reg [47:0] f3_paddrs_0"
74+ - " reg [55:0] f3_gpaddr"
75+ - " wire [15:0] f3_instr_range"
76+ # - "wire mmioFlushWb_bits_pd_0_isRVC"
77+ # - "wire mmioFlushWb_bits_pd_0_brType"
78+ # - "wire mmioFlushWb_bits_pd_0_isRet"
79+ # - "wire mmioFlushWb_bits_pd_0_isCall"
80+
81+ - preDecoder :
82+ - " wire [15:0] io_in_bits_data_0"
83+ - " wire [15:0] io_in_bits_data_1"
84+ - " wire [15:0] io_in_bits_data_2"
85+ - " wire [15:0] io_in_bits_data_3"
86+ - " wire [15:0] io_in_bits_data_4"
87+ - " wire [15:0] io_in_bits_data_5"
88+ - " wire [15:0] io_in_bits_data_6"
89+ - " wire [15:0] io_in_bits_data_7"
90+ - " wire [15:0] io_in_bits_data_8"
91+ - " wire [15:0] io_in_bits_data_9"
92+ - " wire [15:0] io_in_bits_data_10"
93+ - " wire [15:0] io_in_bits_data_11"
94+ - " wire [15:0] io_in_bits_data_12"
95+ - " wire [15:0] io_in_bits_data_13"
96+ - " wire [15:0] io_in_bits_data_14"
97+ - " wire [15:0] io_in_bits_data_15"
98+ - " wire [15:0] io_in_bits_data_16"
99+ - " wire io_out_pd_0_isRVC"
100+ - " wire io_out_pd_1_valid"
101+ - " wire io_out_pd_1_isRVC"
102+ - " wire io_out_pd_2_valid"
103+ - " wire io_out_pd_2_isRVC"
104+ - " wire io_out_pd_3_valid"
105+ - " wire io_out_pd_3_isRVC"
106+ - " wire io_out_pd_4_valid"
107+ - " wire io_out_pd_4_isRVC"
108+ - " wire io_out_pd_5_valid"
109+ - " wire io_out_pd_5_isRVC"
110+ - " wire io_out_pd_6_valid"
111+ - " wire io_out_pd_6_isRVC"
112+ - " wire io_out_pd_7_valid"
113+ - " wire io_out_pd_7_isRVC"
114+ - " wire io_out_pd_8_valid"
115+ - " wire io_out_pd_8_isRVC"
116+ - " wire io_out_pd_9_valid"
117+ - " wire io_out_pd_9_isRVC"
118+ - " wire io_out_pd_10_valid"
119+ - " wire io_out_pd_10_isRVC"
120+ - " wire io_out_pd_11_valid"
121+ - " wire io_out_pd_11_isRVC"
122+ - " wire io_out_pd_12_valid"
123+ - " wire io_out_pd_12_isRVC"
124+ - " wire io_out_pd_13_valid"
125+ - " wire io_out_pd_13_isRVC"
126+ - " wire io_out_pd_14_valid"
127+ - " wire io_out_pd_14_isRVC"
128+ - " wire io_out_pd_15_valid"
129+ - " wire io_out_pd_15_isRVC"
130+ - " wire io_out_hasHalfValid_2"
131+ - " wire io_out_hasHalfValid_3"
132+ - " wire io_out_hasHalfValid_4"
133+ - " wire io_out_hasHalfValid_5"
134+ - " wire io_out_hasHalfValid_6"
135+ - " wire io_out_hasHalfValid_7"
136+ - " wire io_out_hasHalfValid_8"
137+ - " wire io_out_hasHalfValid_9"
138+ - " wire io_out_hasHalfValid_10"
139+ - " wire io_out_hasHalfValid_11"
140+ - " wire io_out_hasHalfValid_12"
141+ - " wire io_out_hasHalfValid_13"
142+ - " wire io_out_hasHalfValid_14"
143+ - " wire io_out_hasHalfValid_15"
144+ - " reg [31:0] io_out_instr_0"
145+ - " reg [31:0] io_out_instr_1"
146+ - " reg [31:0] io_out_instr_2"
147+ - " reg [31:0] io_out_instr_3"
148+ - " reg [31:0] io_out_instr_4"
149+ - " reg [31:0] io_out_instr_5"
150+ - " reg [31:0] io_out_instr_6"
151+ - " reg [31:0] io_out_instr_7"
152+ - " reg [31:0] io_out_instr_8"
153+ - " reg [31:0] io_out_instr_9"
154+ - " reg [31:0] io_out_instr_10"
155+ - " reg [31:0] io_out_instr_11"
156+ - " reg [31:0] io_out_instr_12"
157+ - " reg [31:0] io_out_instr_13"
158+ - " reg [31:0] io_out_instr_14"
159+ - " reg [31:0] io_out_instr_15"
160+ - " reg [63:0] io_out_jumpOffset_0"
161+ - " reg [63:0] io_out_jumpOffset_1"
162+ - " reg [63:0] io_out_jumpOffset_2"
163+ - " reg [63:0] io_out_jumpOffset_3"
164+ - " reg [63:0] io_out_jumpOffset_4"
165+ - " reg [63:0] io_out_jumpOffset_5"
166+ - " reg [63:0] io_out_jumpOffset_6"
167+ - " reg [63:0] io_out_jumpOffset_7"
168+ - " reg [63:0] io_out_jumpOffset_8"
169+ - " reg [63:0] io_out_jumpOffset_9"
170+ - " reg [63:0] io_out_jumpOffset_10"
171+ - " reg [63:0] io_out_jumpOffset_11"
172+ - " reg [63:0] io_out_jumpOffset_12"
173+ - " reg [63:0] io_out_jumpOffset_13"
174+ - " reg [63:0] io_out_jumpOffset_14"
175+ - " reg [63:0] io_out_jumpOffset_15"
176+ - f3Predecoder :
177+ - " reg [1:0] io_out_pd_0_brType"
178+ - " wire io_out_pd_0_isCall"
179+ - " wire io_out_pd_0_isRet"
180+ - " reg [1:0] io_out_pd_1_brType"
181+ - " wire io_out_pd_1_isCall"
182+ - " wire io_out_pd_1_isRet"
183+ - " reg [1:0] io_out_pd_2_brType"
184+ - " wire io_out_pd_2_isCall"
185+ - " wire io_out_pd_2_isRet"
186+ - " reg [1:0] io_out_pd_3_brType"
187+ - " wire io_out_pd_3_isCall"
188+ - " wire io_out_pd_3_isRet"
189+ - " reg [1:0] io_out_pd_4_brType"
190+ - " wire io_out_pd_4_isCall"
191+ - " wire io_out_pd_4_isRet"
192+ - " reg [1:0] io_out_pd_5_brType"
193+ - " wire io_out_pd_5_isCall"
194+ - " wire io_out_pd_5_isRet"
195+ - " reg [1:0] io_out_pd_6_brType"
196+ - " wire io_out_pd_6_isCall"
197+ - " wire io_out_pd_6_isRet"
198+ - " reg [1:0] io_out_pd_7_brType"
199+ - " wire io_out_pd_7_isCall"
200+ - " wire io_out_pd_7_isRet"
201+ - " reg [1:0] io_out_pd_8_brType"
202+ - " wire io_out_pd_8_isCall"
203+ - " wire io_out_pd_8_isRet"
204+ - " reg [1:0] io_out_pd_9_brType"
205+ - " wire io_out_pd_9_isCall"
206+ - " wire io_out_pd_9_isRet"
207+ - " reg [1:0] io_out_pd_10_brType"
208+ - " wire io_out_pd_10_isCall"
209+ - " wire io_out_pd_10_isRet"
210+ - " reg [1:0] io_out_pd_11_brType"
211+ - " wire io_out_pd_11_isCall"
212+ - " wire io_out_pd_11_isRet"
213+ - " reg [1:0] io_out_pd_12_brType"
214+ - " wire io_out_pd_12_isCall"
215+ - " wire io_out_pd_12_isRet"
216+ - " reg [1:0] io_out_pd_13_brType"
217+ - " wire io_out_pd_13_isCall"
218+ - " wire io_out_pd_13_isRet"
219+ - " reg [1:0] io_out_pd_14_brType"
220+ - " wire io_out_pd_14_isCall"
221+ - " wire io_out_pd_14_isRet"
222+ - " reg [1:0] io_out_pd_15_brType"
223+ - " wire io_out_pd_15_isCall"
224+ - " wire io_out_pd_15_isRet"
225+
226+ - predChecker :
227+ - " wire io_in_instrValid_0"
228+ - " wire io_in_instrValid_1"
229+ - " wire io_in_instrValid_2"
230+ - " wire io_in_instrValid_3"
231+ - " wire io_in_instrValid_4"
232+ - " wire io_in_instrValid_5"
233+ - " wire io_in_instrValid_6"
234+ - " wire io_in_instrValid_7"
235+ - " wire io_in_instrValid_8"
236+ - " wire io_in_instrValid_9"
237+ - " wire io_in_instrValid_10"
238+ - " wire io_in_instrValid_11"
239+ - " wire io_in_instrValid_12"
240+ - " wire io_in_instrValid_13"
241+ - " wire io_in_instrValid_14"
242+ - " wire io_in_instrValid_15"
243+ - " wire io_out_stage1Out_fixedRange_0"
244+ - " wire io_out_stage1Out_fixedRange_1"
245+ - " wire io_out_stage1Out_fixedRange_2"
246+ - " wire io_out_stage1Out_fixedRange_3"
247+ - " wire io_out_stage1Out_fixedRange_4"
248+ - " wire io_out_stage1Out_fixedRange_5"
249+ - " wire io_out_stage1Out_fixedRange_6"
250+ - " wire io_out_stage1Out_fixedRange_7"
251+ - " wire io_out_stage1Out_fixedRange_8"
252+ - " wire io_out_stage1Out_fixedRange_9"
253+ - " wire io_out_stage1Out_fixedRange_10"
254+ - " wire io_out_stage1Out_fixedRange_11"
255+ - " wire io_out_stage1Out_fixedRange_12"
256+ - " wire io_out_stage1Out_fixedRange_13"
257+ - " wire io_out_stage1Out_fixedRange_14"
258+ - " wire io_out_stage1Out_fixedRange_15"
259+ - " wire io_out_stage1Out_fixedTaken_0"
260+ - " wire io_out_stage1Out_fixedTaken_1"
261+ - " wire io_out_stage1Out_fixedTaken_2"
262+ - " wire io_out_stage1Out_fixedTaken_3"
263+ - " wire io_out_stage1Out_fixedTaken_4"
264+ - " wire io_out_stage1Out_fixedTaken_5"
265+ - " wire io_out_stage1Out_fixedTaken_6"
266+ - " wire io_out_stage1Out_fixedTaken_7"
267+ - " wire io_out_stage1Out_fixedTaken_8"
268+ - " wire io_out_stage1Out_fixedTaken_9"
269+ - " wire io_out_stage1Out_fixedTaken_10"
270+ - " wire io_out_stage1Out_fixedTaken_11"
271+ - " wire io_out_stage1Out_fixedTaken_12"
272+ - " wire io_out_stage1Out_fixedTaken_13"
273+ - " wire io_out_stage1Out_fixedTaken_14"
274+ - " wire io_out_stage1Out_fixedTaken_15"
275+ - " reg [49:0] io_out_stage2Out_fixedTarget_0"
276+ - " reg [49:0] io_out_stage2Out_fixedTarget_1"
277+ - " reg [49:0] io_out_stage2Out_fixedTarget_2"
278+ - " reg [49:0] io_out_stage2Out_fixedTarget_3"
279+ - " reg [49:0] io_out_stage2Out_fixedTarget_4"
280+ - " reg [49:0] io_out_stage2Out_fixedTarget_5"
281+ - " reg [49:0] io_out_stage2Out_fixedTarget_6"
282+ - " reg [49:0] io_out_stage2Out_fixedTarget_7"
283+ - " reg [49:0] io_out_stage2Out_fixedTarget_8"
284+ - " reg [49:0] io_out_stage2Out_fixedTarget_9"
285+ - " reg [49:0] io_out_stage2Out_fixedTarget_10"
286+ - " reg [49:0] io_out_stage2Out_fixedTarget_11"
287+ - " reg [49:0] io_out_stage2Out_fixedTarget_12"
288+ - " reg [49:0] io_out_stage2Out_fixedTarget_13"
289+ - " reg [49:0] io_out_stage2Out_fixedTarget_14"
290+ - " reg [49:0] io_out_stage2Out_fixedTarget_15"
291+ - " reg [49:0] io_out_stage2Out_jalTarget_0"
292+ - " reg [49:0] io_out_stage2Out_jalTarget_1"
293+ - " reg [49:0] io_out_stage2Out_jalTarget_2"
294+ - " reg [49:0] io_out_stage2Out_jalTarget_3"
295+ - " reg [49:0] io_out_stage2Out_jalTarget_4"
296+ - " reg [49:0] io_out_stage2Out_jalTarget_5"
297+ - " reg [49:0] io_out_stage2Out_jalTarget_6"
298+ - " reg [49:0] io_out_stage2Out_jalTarget_7"
299+ - " reg [49:0] io_out_stage2Out_jalTarget_8"
300+ - " reg [49:0] io_out_stage2Out_jalTarget_9"
301+ - " reg [49:0] io_out_stage2Out_jalTarget_10"
302+ - " reg [49:0] io_out_stage2Out_jalTarget_11"
303+ - " reg [49:0] io_out_stage2Out_jalTarget_12"
304+ - " reg [49:0] io_out_stage2Out_jalTarget_13"
305+ - " reg [49:0] io_out_stage2Out_jalTarget_14"
306+ - " reg [49:0] io_out_stage2Out_jalTarget_15"
307+ - " reg [2:0] io_out_stage2Out_faultType_0_value"
308+ - " reg [2:0] io_out_stage2Out_faultType_1_value"
309+ - " reg [2:0] io_out_stage2Out_faultType_2_value"
310+ - " reg [2:0] io_out_stage2Out_faultType_3_value"
311+ - " reg [2:0] io_out_stage2Out_faultType_4_value"
312+ - " reg [2:0] io_out_stage2Out_faultType_5_value"
313+ - " reg [2:0] io_out_stage2Out_faultType_6_value"
314+ - " reg [2:0] io_out_stage2Out_faultType_7_value"
315+ - " reg [2:0] io_out_stage2Out_faultType_8_value"
316+ - " reg [2:0] io_out_stage2Out_faultType_9_value"
317+ - " reg [2:0] io_out_stage2Out_faultType_10_value"
318+ - " reg [2:0] io_out_stage2Out_faultType_11_value"
319+ - " reg [2:0] io_out_stage2Out_faultType_12_value"
320+ - " reg [2:0] io_out_stage2Out_faultType_13_value"
321+ - " reg [2:0] io_out_stage2Out_faultType_14_value"
322+ - " reg [2:0] io_out_stage2Out_faultType_15_value"
0 commit comments