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Version: AMD Vivado™ 2025.2
This design demonstrates different NoC connections allowed in DFX designs. Broadly, there are three main categories shown in this example design.
- NoC Master (NMU) in the static region drives NoC Slave (NSU) in a reconfigurable partition (RP1).
- NoC Master (NMU) in a reconfigruable partition (RP2) drives NoC Slave (NSU) in the static region.
- NoC Master in one reconfigurable partition (RP3) drives NoC Slave in another reconfigurable partition (RP4) through a static logical NoC instance.
- RM-Static data transfer is done using NoC INI ports. Hence, no PL based DFX decoupler is needed.
Follow the design flow steps from tutorials "1RP design 1RP_AXI_GPIO_in_RP_Interface_INI" and "2RP_GPIO_BRAM_in_RP_Interface_INI" to become familiar with IPI based DFX design flows in AMD Vivado™.
Unlike the top-down approach, this tutorial uses a bottom-up approach for IPI design creation. The create_ipi.tcl script creates individual BDs for each reconfigurable partition first, followed by a top BD creation that references the block design containers of individual reconfigurable partitions.
source create_ipi.tcl
- Once the IPI design creation is completed, the design is categorized into five hierarchies: One static region and four reconfigurable partitions.
This interface demonstrates the connectivity where a master (AXI Traffic Generator) in static region is driving a slave (AXI BRAM) in the reconfigurable partition RP1. The LNOC (master) in static region drives the LNOC (slave) in the reconfigurable partition through Inter-NoC-Interface (INI).
This interface demonstrates the connecitivy where a master (AXI Traffic Generator) in reconfigurable partition RP2 drives a slave (AXI BRAM) in the static region. The LNOC (master) in reconfigurable partition RP2 drives the LNOC (slave) in the static region through Inter-NoC-Interface (INI).
Connectivity 3: NoC NMU in Reconfigurable Partition RP3 drives a NoC NSU in Reconfigurable Partition RP4 through a logical NoC instance in Static Region
This interface demonstrates the communication between multiple reconfigurable partitions using NoC. Users are required to add a logical NoC instance in the static region for the NoC paths between multiple reconfigurable partitions. In this design, AXI TG in RP3 drives AXI FIFO in RP4 through a LNOC in the static region.
- AXI Traffic Generator in Static Region configured in the Static Mode. Enable this and observe the data in BRAM of RP1 (rp1rm1)
- Download the rp1rm2 partial PDI. After successful download, you should observe BRAM values back to its initialization value (0x0).
- AXI Traffic Generator in RP2 is configured in the Static Mode without Address Sweep in rp2rm1. Enable this and observe the data in BRAM of Static Region.
- Download the rp2rm2 partial PDI. In rp2rm2, AXI TG is configured in the Static mode with Address Sweep enabled. Enable the AXI TG and observe the data in BRAM of static region across specific address range.
- In RP3, AXI TG is configured again in the Static mode with AXIS interface to static. In the RP4, AXI Stream FIFO is the slave that recieves the data from RP3 through static LNOC.
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