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some CRC comments update
1 parent 6e0ae04 commit b036e31

3 files changed

Lines changed: 4 additions & 13 deletions

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HashLib.Tests/src/CRCTests.pas

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,6 @@ interface
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HlpICRC,
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HlpHashFactory,
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HlpIHash,
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HlpSimd,
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HlpConverters;
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type
@@ -26,7 +25,6 @@ TTestCRCModel = class(THashLibAlgorithmTestCase)
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FCRC: IHash;
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protected
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procedure Setup; override;
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procedure TearDown; override;
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published
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procedure TestCheckValue;
@@ -67,14 +65,6 @@ implementation
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{ TTestCRCModel }
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procedure TTestCRCModel.Setup;
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begin
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inherited;
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WriteLn('PCLMULQDQ : ', TSimd.HasPCLMULQDQ());
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WriteLn('VPCLMULQDQ : ', TSimd.HasVPCLMULQDQ());
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WriteLn('SIMD Level : ', Ord(TSimd.GetActiveLevel()));
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end;
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procedure TTestCRCModel.TearDown;
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begin
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FCRC := nil;

HashLib/src/Include/Simd/CRC/CRCFoldPclmul.inc

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@@ -1,5 +1,6 @@
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// PCLMULQDQ-based CRC folding + Barrett reduction for reflected (LSB-first)
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// SSE2 + PCLMULQDQ CRC folding + Barrett reduction for reflected (LSB-first)
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// CRCs with width 8..32 (CRC-64 requires a separate path).
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// PCLMULQDQ instructions are db-encoded for broad assembler compatibility.
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//
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// Function signature (included after SimdProc4Begin.inc):
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// function CRC_Fold_Pclmul(AData: PByte; ALength: UInt32;

HashLib/src/Include/Simd/CRC/CRCFoldVpclmul.inc

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
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// VPCLMULQDQ + AVX2 CRC folding + Barrett reduction for reflected (LSB-first)
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// AVX2 + VPCLMULQDQ CRC folding + Barrett reduction for reflected (LSB-first)
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// CRCs with width 8..32 (CRC-64 requires a separate path).
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// AVX2/VPCLMULQDQ instructions are db-encoded for broad assembler compatibility.
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//
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// Function signature (included after SimdProc4Begin.inc):
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// function CRC_Fold_Vpclmul(AData: PByte; ALength: UInt32;
@@ -18,7 +19,6 @@
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// Reference: zlib-ng crc32_pclmulqdq_tpl.h (256-bit VPCLMULQDQ path)
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// and Linux kernel crc-pclmul-template.S by Eric Biggers (Barrett reduction).
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//
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// All VEX-encoded instructions are db-encoded for FPC compatibility.
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// VEX byte layout reference:
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// 2-byte: C5 [R.vvvv.L.pp]
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// 3-byte: C4 [R.X.B.mmmmm] [W.vvvv.L.pp]

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