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| 1 | +// AVX2 (VEX-128) implementation of fused XOR + Salsa20/8 on Percival-permuted data. |
| 2 | +// |
| 3 | +// Reference: Colin Percival, "Stronger Key Derivation via Sequential |
| 4 | +// Memory-Hard Functions" (2009), and the Tarsnap scrypt reference |
| 5 | +// implementation (crypto_scrypt-sse.c). The (i*5 mod 16) data permutation |
| 6 | +// arranges each 16-word Salsa20 state into role-based diagonal order, |
| 7 | +// enabling lane-parallel SIMD processing of column and row quarter-rounds |
| 8 | +// with vpshufd-based diagonalize/undiagonalize between them. |
| 9 | +// |
| 10 | +// Identical algorithm to the SSE2 variant but uses VEX-128 3-operand |
| 11 | +// encoding, eliminating movdqa register copies and reducing each QR step |
| 12 | +// from 7 to 5 instructions. |
| 13 | +// |
| 14 | +// Expects MS x64 ABI: rcx = State ptr, rdx = Input ptr. |
| 15 | +// Each pointer addresses 16 UInt32 (64 bytes) in permuted order: |
| 16 | +// xmm0 = A = {w0,w5,w10,w15}, xmm1 = B = {w4,w9,w14,w3}, |
| 17 | +// xmm2 = C = {w8,w13,w2,w7}, xmm3 = D = {w12,w1,w6,w11}. |
| 18 | +// Operation: State = Salsa20/8(State XOR Input) |
| 19 | +// Uses xmm0-xmm5 (all volatile). No spills needed. |
| 20 | +// Stack: 72 bytes (64 for saved XOR'd state + 8 alignment padding). |
| 21 | + |
| 22 | + sub rsp, 72 |
| 23 | + |
| 24 | + // ========================================================================= |
| 25 | + // Load state, XOR with input, save for final addition |
| 26 | + // ========================================================================= |
| 27 | + vmovdqu xmm0, oword [rcx] |
| 28 | + vmovdqu xmm4, oword [rdx] |
| 29 | + vpxor xmm0, xmm0, xmm4 |
| 30 | + vmovdqu xmm1, oword [rcx + $10] |
| 31 | + vmovdqu xmm4, oword [rdx + $10] |
| 32 | + vpxor xmm1, xmm1, xmm4 |
| 33 | + vmovdqu xmm2, oword [rcx + $20] |
| 34 | + vmovdqu xmm4, oword [rdx + $20] |
| 35 | + vpxor xmm2, xmm2, xmm4 |
| 36 | + vmovdqu xmm3, oword [rcx + $30] |
| 37 | + vmovdqu xmm4, oword [rdx + $30] |
| 38 | + vpxor xmm3, xmm3, xmm4 |
| 39 | + |
| 40 | + vmovdqa oword [rsp], xmm0 |
| 41 | + vmovdqa oword [rsp + $10], xmm1 |
| 42 | + vmovdqa oword [rsp + $20], xmm2 |
| 43 | + vmovdqa oword [rsp + $30], xmm3 |
| 44 | + |
| 45 | + // ========================================================================= |
| 46 | + // 4 double-rounds (= 8 rounds = Salsa20/8) |
| 47 | + // ========================================================================= |
| 48 | + mov r10d, 4 |
| 49 | +@double_round: |
| 50 | + |
| 51 | + // --- Column quarter-round --- |
| 52 | + |
| 53 | + // xmm1 ^= rotl(xmm0 + xmm3, 7) |
| 54 | + vpaddd xmm4, xmm0, xmm3 |
| 55 | + vpslld xmm5, xmm4, 7 |
| 56 | + vpsrld xmm4, xmm4, 25 |
| 57 | + vpxor xmm1, xmm1, xmm5 |
| 58 | + vpxor xmm1, xmm1, xmm4 |
| 59 | + |
| 60 | + // xmm2 ^= rotl(xmm1 + xmm0, 9) |
| 61 | + vpaddd xmm4, xmm1, xmm0 |
| 62 | + vpslld xmm5, xmm4, 9 |
| 63 | + vpsrld xmm4, xmm4, 23 |
| 64 | + vpxor xmm2, xmm2, xmm5 |
| 65 | + vpxor xmm2, xmm2, xmm4 |
| 66 | + |
| 67 | + // xmm3 ^= rotl(xmm2 + xmm1, 13) |
| 68 | + vpaddd xmm4, xmm2, xmm1 |
| 69 | + vpslld xmm5, xmm4, 13 |
| 70 | + vpsrld xmm4, xmm4, 19 |
| 71 | + vpxor xmm3, xmm3, xmm5 |
| 72 | + vpxor xmm3, xmm3, xmm4 |
| 73 | + |
| 74 | + // xmm0 ^= rotl(xmm3 + xmm2, 18) |
| 75 | + vpaddd xmm4, xmm3, xmm2 |
| 76 | + vpslld xmm5, xmm4, 18 |
| 77 | + vpsrld xmm4, xmm4, 14 |
| 78 | + vpxor xmm0, xmm0, xmm5 |
| 79 | + vpxor xmm0, xmm0, xmm4 |
| 80 | + |
| 81 | + // Diagonalize: rotate B right by 1, C by 2, D left by 1 |
| 82 | + vpshufd xmm1, xmm1, $93 |
| 83 | + vpshufd xmm2, xmm2, $4E |
| 84 | + vpshufd xmm3, xmm3, $39 |
| 85 | + |
| 86 | + // --- Row quarter-round (B/D roles swapped after diagonal shuffle) --- |
| 87 | + |
| 88 | + // xmm3 ^= rotl(xmm0 + xmm1, 7) |
| 89 | + vpaddd xmm4, xmm0, xmm1 |
| 90 | + vpslld xmm5, xmm4, 7 |
| 91 | + vpsrld xmm4, xmm4, 25 |
| 92 | + vpxor xmm3, xmm3, xmm5 |
| 93 | + vpxor xmm3, xmm3, xmm4 |
| 94 | + |
| 95 | + // xmm2 ^= rotl(xmm3 + xmm0, 9) |
| 96 | + vpaddd xmm4, xmm3, xmm0 |
| 97 | + vpslld xmm5, xmm4, 9 |
| 98 | + vpsrld xmm4, xmm4, 23 |
| 99 | + vpxor xmm2, xmm2, xmm5 |
| 100 | + vpxor xmm2, xmm2, xmm4 |
| 101 | + |
| 102 | + // xmm1 ^= rotl(xmm2 + xmm3, 13) |
| 103 | + vpaddd xmm4, xmm2, xmm3 |
| 104 | + vpslld xmm5, xmm4, 13 |
| 105 | + vpsrld xmm4, xmm4, 19 |
| 106 | + vpxor xmm1, xmm1, xmm5 |
| 107 | + vpxor xmm1, xmm1, xmm4 |
| 108 | + |
| 109 | + // xmm0 ^= rotl(xmm1 + xmm2, 18) |
| 110 | + vpaddd xmm4, xmm1, xmm2 |
| 111 | + vpslld xmm5, xmm4, 18 |
| 112 | + vpsrld xmm4, xmm4, 14 |
| 113 | + vpxor xmm0, xmm0, xmm5 |
| 114 | + vpxor xmm0, xmm0, xmm4 |
| 115 | + |
| 116 | + // Undiagonalize: reverse the shuffles |
| 117 | + vpshufd xmm1, xmm1, $39 |
| 118 | + vpshufd xmm2, xmm2, $4E |
| 119 | + vpshufd xmm3, xmm3, $93 |
| 120 | + |
| 121 | + dec r10d |
| 122 | + jnz @double_round |
| 123 | + |
| 124 | + // ========================================================================= |
| 125 | + // Final addition and store |
| 126 | + // ========================================================================= |
| 127 | + vmovdqa xmm4, oword [rsp] |
| 128 | + vpaddd xmm0, xmm0, xmm4 |
| 129 | + vmovdqa xmm4, oword [rsp + $10] |
| 130 | + vpaddd xmm1, xmm1, xmm4 |
| 131 | + vmovdqa xmm4, oword [rsp + $20] |
| 132 | + vpaddd xmm2, xmm2, xmm4 |
| 133 | + vmovdqa xmm4, oword [rsp + $30] |
| 134 | + vpaddd xmm3, xmm3, xmm4 |
| 135 | + |
| 136 | + vmovdqu oword [rcx], xmm0 |
| 137 | + vmovdqu oword [rcx + $10], xmm1 |
| 138 | + vmovdqu oword [rcx + $20], xmm2 |
| 139 | + vmovdqu oword [rcx + $30], xmm3 |
| 140 | + |
| 141 | + add rsp, 72 |
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