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Whether baby core kernels should use compressed instructions
backend: TensixTenstorrent Tensix / Metalium backendTenstorrent Tensix / Metalium backendquestionFurther information is requestedFurther information is requestedStatus: Open.#135 In Zaneham/Booth;RV32 mutual recursion is not detected
backend: TensixTenstorrent Tensix / Metalium backendTenstorrent Tensix / Metalium backendenhancementNew feature or requestNew feature or requestStatus: Open.#134 In Zaneham/Booth;Code buffer caps kernels at 16 KiB regardless of chip
backend: TensixTenstorrent Tensix / Metalium backendTenstorrent Tensix / Metalium backendenhancementNew feature or requestNew feature or requestStatus: Open.#133 In Zaneham/Booth;Atomics and warp primitives unimplemented on RV32
backend: TensixTenstorrent Tensix / Metalium backendTenstorrent Tensix / Metalium backendenhancementNew feature or requestNew feature or requestStatus: Open.#132 In Zaneham/Booth;__device__ globals refuse for want of a data segment
backend: TensixTenstorrent Tensix / Metalium backendTenstorrent Tensix / Metalium backendenhancementNew feature or requestNew feature or requestStatus: Open.#131 In Zaneham/Booth;Region TWA is declared but never allocated
backend: TensixTenstorrent Tensix / Metalium backendTenstorrent Tensix / Metalium backendenhancementNew feature or requestNew feature or requestStatus: Open.#130 In Zaneham/Booth;TDF fission never synthesises RDR and WRT bodies
backend: TensixTenstorrent Tensix / Metalium backendTenstorrent Tensix / Metalium backendenhancementNew feature or requestNew feature or requestStatus: Open.#129 In Zaneham/Booth;Lower BIR_FADD and friends to soft-float calls
backend: TensixTenstorrent Tensix / Metalium backendTenstorrent Tensix / Metalium backendenhancementNew feature or requestNew feature or requestStatus: Open.#128 In Zaneham/Booth;Float arithmetic needs i64 lowering as register pairs
backend: TensixTenstorrent Tensix / Metalium backendTenstorrent Tensix / Metalium backendenhancementNew feature or requestNew feature or requestStatus: Open.#127 In Zaneham/Booth;RV32 backend has no register allocator
backend: TensixTenstorrent Tensix / Metalium backendTenstorrent Tensix / Metalium backendoptimisationPerformance improvementsPerformance improvementsStatus: Open.#126 In Zaneham/Booth;Codebase structure: layering violations, dead paths, and the runtime split
bugSomething isn't workingSomething isn't workingdocumentationImprovements or additions to documentationImprovements or additions to documentationhelp wantedExtra attention is neededExtra attention is neededStatus: Open.#123 In Zaneham/Booth;BarraCUDA references throughout the project
documentationImprovements or additions to documentationImprovements or additions to documentationStatus: Open.#122 In Zaneham/Booth;