feat: add OSD H/V image centering offsets (+/-8 px/lines)

Shifts the active image by repartitioning the native timing's front and
back porches; H_TOTAL/V_TOTAL stay fixed so the CRT keeps the same line
and frame rate. V blanking rebalanced from 6/3/13 to 8/3/11 to give a
symmetric +/-8 budget without changing refresh rate.

Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>

Author: asturur

menu.sv

@@ -208,10 +208,16 @@ assign LED_POWER[0]= FB ? led[2] : act_cnt2[26] ? act_cnt2[25:18] > act_cnt2[7:0
 
 
 `include "build_id.v" 
+// Image centering: 4-bit signed in OSD ordering 0,+1..+7,-8..-1 so that the
+// power-on default (status bits = 0) maps to "no shift". Bit pattern matches
+// 4-bit two's complement when reinterpreted as signed.
 localparam CONF_STR = {
 	"MENU;UART31250,MIDI;",
 	"-;",
-	"V,v",`BUILD_DATE 
+	"O[13:10],H Offset,0,+1,+2,+3,+4,+5,+6,+7,-8,-7,-6,-5,-4,-3,-2,-1;",
+	"O[17:14],V Offset,0,+1,+2,+3,+4,+5,+6,+7,-8,-7,-6,-5,-4,-3,-2,-1;",
+	"-;",
+	"V,v",`BUILD_DATE
 };
 
 wire forced_scandoubler;
@@ -514,7 +520,14 @@ native_video_top native_video
 	.vga_vcount     (native_vcount),
 	.vga_new_frame  (native_new_frame),
 	.enable         (mode_zaparoo),
-	.active         (native_active)
+	.active         (native_active),
+
+	// status[13:10] / status[17:14] are 4-bit fields whose bit pattern
+	// matches signed two's complement when the OSD enum is ordered
+	// 0,+1..+7,-8..-1 (see CONF_STR). $signed() makes the reinterpretation
+	// explicit at the port boundary.
+	.h_offset       ($signed(status[13:10])),
+	.v_offset       ($signed(status[17:14]))
 );
 
 // Cosine + LFSR fallback noise pattern, painted into the 320x240 active area

rtl/native_video_timing.sv

@@ -1,11 +1,18 @@
 // Zaparoo native video timing: 320x240 at 15.734 kHz from 27 MHz / 4.
+// h_offset/v_offset (signed -8..+7) shift the image by repartitioning
+// front porch and back porch. H_TOTAL/V_TOTAL are invariant, so line
+// rate and frame rate are unchanged regardless of offset values.
 
 module native_video_timing
 (
 	input  wire       clk,
 	input  wire       ce_pix,
 	input  wire       reset,
 
+	// Image centering: positive = shift right/down (FP shrinks, BP grows).
+	input  wire signed [3:0] h_offset,  // -8..+7 pixels (budget H_FP=14 / H_BP=63)
+	input  wire signed [3:0] v_offset,  // -8..+7 lines  (budget V_FP=8 / V_BP=11)
+
 	output reg        hsync,
 	output reg        vsync,
 	output reg        hblank,
@@ -23,16 +30,20 @@ localparam [5:0] H_SYNC   = 6'd32;
 localparam [9:0] H_BP     = 10'd63;
 localparam [9:0] H_TOTAL  = 10'd429;
 
+// V blanking rebalanced from 6/3/13 to 8/3/11 to give symmetric ±8 budget
+// while preserving V_TOTAL=262 (and thus 59.94 Hz refresh).
 localparam [8:0] V_ACTIVE = 9'd240;
-localparam [8:0] V_FP     = 9'd6;
+localparam [8:0] V_FP     = 9'd8;
 localparam [4:0] V_SYNC   = 5'd3;
-localparam [8:0] V_BP     = 9'd13;
+localparam [8:0] V_BP     = 9'd11;
 localparam [8:0] V_TOTAL  = 9'd262;
 
-localparam [9:0] H_SYNC_START = H_ACTIVE + H_FP;
-localparam [9:0] H_SYNC_END   = H_SYNC_START + H_SYNC;
-localparam [8:0] V_SYNC_START = V_ACTIVE + V_FP;
-localparam [8:0] V_SYNC_END   = V_SYNC_START + V_SYNC;
+// Sync starts shift with the offset; two's-complement subtraction in
+// unsigned arithmetic yields the correct result at both ends of the range.
+wire [9:0] H_SYNC_START = H_ACTIVE + (H_FP - {{6{h_offset[3]}}, h_offset});
+wire [9:0] H_SYNC_END   = H_SYNC_START + H_SYNC;
+wire [8:0] V_SYNC_START = V_ACTIVE + (V_FP - {{5{v_offset[3]}}, v_offset});
+wire [8:0] V_SYNC_END   = V_SYNC_START + V_SYNC;
 
 always @(posedge clk) begin
 	if(reset) begin

rtl/native_video_top.sv

@@ -29,7 +29,11 @@ module native_video_top
 	output wire        vga_new_frame,
 
 	input  wire        enable,
-	output wire        active
+	output wire        active,
+
+	// OSD image centering: signed -8..+7 pixels/lines, 0 = no shift.
+	input  wire signed [3:0] h_offset,
+	input  wire signed [3:0] v_offset
 );
 
 wire       tim_hs;
@@ -46,6 +50,8 @@ native_video_timing timing
 	.clk       (clk_vid),
 	.ce_pix    (ce_pix),
 	.reset     (reset),
+	.h_offset  (h_offset),
+	.v_offset  (v_offset),
 	.hsync     (tim_hs),
 	.vsync     (tim_vs),
 	.hblank    (tim_hblank),