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Fixes to interrupt handling (#562)
1 parent ce0678f commit b4adc72

3 files changed

Lines changed: 9 additions & 7 deletions

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examples/raspberrypi/rp2xxx/src/interrupts.zig

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -67,6 +67,11 @@ pub fn main() !void {
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interrupt.enable(timer_irq);
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70+
// Enable machine external interrupts on RISC-V
71+
if (rp2xxx.compatibility.arch == .riscv) {
72+
microzig.cpu.interrupt.core.enable(.MachineExternal);
73+
}
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microzig.cpu.interrupt.enable_interrupts();
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7277
while (true) {

modules/riscv32-common/src/riscv32_common.zig

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -498,7 +498,7 @@ pub const utilities = struct {
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}
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pub fn is_pending(int: CoreInterruptEnum) bool {
501-
return csr.mip.read() & (@as(u32, 1) << @intFromEnum(int));
501+
return csr.mip.read() & (@as(u32, 1) << @intFromEnum(int)) != 0;
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}
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504504
pub fn set_pending(int: CoreInterruptEnum) void {

port/raspberrypi/rp2xxx/src/cpus/hazard3.zig

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -116,16 +116,16 @@ pub const interrupt = struct {
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const shift: u4 = @intCast(4 * (num & 0x4));
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const set_mask: u16 = @as(u16, @intFromEnum(priority)) << shift;
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const clear_mask: u16 = @as(u16, 0xf) << shift;
119-
csr.meifa.clear(.{ .index = index, .window = clear_mask });
120-
csr.meifa.set(.{ .index = index, .window = set_mask });
119+
csr.meipra.clear(.{ .index = index, .window = clear_mask });
120+
csr.meipra.set(.{ .index = index, .window = set_mask });
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}
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pub fn get_priority(int: ExternalInterrupt) Priority {
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const num: u7 = @intFromEnum(int);
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const index: u5 = @intCast(num >> 2);
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const shift: u4 = @intCast(4 * (num & 0x4));
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const mask: u16 = @as(u16, 0xf) << shift;
128-
return @enumFromInt((csr.meifa.read_set(.{ .index = index }).window & mask) >> shift);
128+
return @enumFromInt((csr.meipra.read_set(.{ .index = index }).window & mask) >> shift);
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}
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pub inline fn has_ram_vectors() bool {
@@ -219,9 +219,6 @@ pub const startup_logic = struct {
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@memcpy(&ram_vectors, &startup_logic.external_interrupt_table);
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}
221221

222-
// NOTE: tact1m4n3: I don't think it's fine to enable this behind the user's back.
223-
interrupt.core.enable(.MachineExternal);
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microzig_main();
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}
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