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Directly generate enums (#328)
* directly generate enums * fix rp2xxx usb * implement patching * remove some debug logs * fix esp
1 parent 53532de commit f6bd248

11 files changed

Lines changed: 256 additions & 164 deletions

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‎examples/build.zig‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
const std = @import("std");
22

33
const example_dep_names: []const []const u8 = &.{
4-
//"espressif/esp",
4+
"espressif/esp",
55
"gigadevice/gd32",
66
"microchip/atsam",
77
"microchip/avr",

‎examples/build.zig.zon‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
.version = "0.0.0",
44
.dependencies = .{
55
// examples
6-
// .@"espressif/esp" = .{ .path = "espressif/esp" },
6+
.@"espressif/esp" = .{ .path = "espressif/esp" },
77
.@"gigadevice/gd32" = .{ .path = "gigadevice/gd32" },
88
.@"microchip/atsam" = .{ .path = "microchip/atsam" },
99
.@"microchip/avr" = .{ .path = "microchip/avr" },

‎examples/nxp/lpc/src/blinky.zig‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -21,10 +21,10 @@ const all_mask = led_mask[0] | led_mask[1] | led_mask[2] | led_mask[3];
2121

2222
pub fn main() !void {
2323
conn.PINSEL3.modify(.{
24-
.P1_18 = .{ .value = .GPIO_P1 },
25-
.P1_20 = .{ .value = .GPIO_P1 },
26-
.P1_21 = .{ .value = .GPIO_P1 },
27-
.P1_23 = .{ .value = .GPIO_P1 },
24+
.P1_18 = .GPIO_P1,
25+
.P1_20 = .GPIO_P1,
26+
.P1_21 = .GPIO_P1,
27+
.P1_23 = .GPIO_P1,
2828
});
2929

3030
const p1 = &gpio[1];

‎port/raspberrypi/rp2xxx/src/hal/clocks/common.zig‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -24,19 +24,19 @@ pub const xosc = struct {
2424
}
2525
pub fn init() void {
2626
if (xosc_freq <= 15_000_000 and xosc_freq >= 1_000_000) {
27-
XOSC.CTRL.modify(.{ .FREQ_RANGE = .{ .value = .@"1_15MHZ" } });
27+
XOSC.CTRL.modify(.{ .FREQ_RANGE = .@"1_15MHZ" });
2828
} else if (xosc_freq <= 30_000_000 and xosc_freq >= 10_000_000) {
29-
XOSC.CTRL.modify(.{ .FREQ_RANGE = .{ .value = .@"10_30MHZ" } });
29+
XOSC.CTRL.modify(.{ .FREQ_RANGE = .@"10_30MHZ" });
3030
} else if (xosc_freq <= 60_000_000 and xosc_freq >= 25_000_000) {
31-
XOSC.CTRL.modify(.{ .FREQ_RANGE = .{ .value = .@"25_60MHZ" } });
31+
XOSC.CTRL.modify(.{ .FREQ_RANGE = .@"25_60MHZ" });
3232
} else if (xosc_freq <= 100_000_000 and xosc_freq >= 40_000_000) {
33-
XOSC.CTRL.modify(.{ .FREQ_RANGE = .{ .value = .@"40_100MHZ" } });
33+
XOSC.CTRL.modify(.{ .FREQ_RANGE = .@"40_100MHZ" });
3434
} else {
3535
unreachable;
3636
}
3737

3838
XOSC.STARTUP.modify(.{ .DELAY = startup_delay_value });
39-
XOSC.CTRL.modify(.{ .ENABLE = .{ .value = .ENABLE } });
39+
XOSC.CTRL.modify(.{ .ENABLE = .ENABLE });
4040

4141
// wait for xosc startup to complete:
4242
while (XOSC.STATUS.read().STABLE == 0) {}

‎port/raspberrypi/rp2xxx/src/hal/dma.zig‎

Lines changed: 5 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -106,13 +106,11 @@ pub const Channel = enum(u4) {
106106
regs.trans_count = count;
107107
regs.ctrl_trig.modify(.{
108108
.EN = @intFromBool(config.enable),
109-
.DATA_SIZE = .{
110-
.value = switch (config.transfer_size_bytes) {
111-
1 => @TypeOf(regs.ctrl_trig.read().DATA_SIZE.value).SIZE_BYTE,
112-
2 => .SIZE_HALFWORD,
113-
4 => .SIZE_WORD,
114-
else => unreachable,
115-
},
109+
.DATA_SIZE = switch (config.transfer_size_bytes) {
110+
1 => @TypeOf(regs.ctrl_trig.read().DATA_SIZE.value).SIZE_BYTE,
111+
2 => .SIZE_HALFWORD,
112+
4 => .SIZE_WORD,
113+
else => unreachable,
116114
},
117115
.INCR_READ = @intFromBool(config.read_increment),
118116
.INCR_WRITE = @intFromBool(config.write_increment),

‎port/raspberrypi/rp2xxx/src/hal/gpio.zig‎

Lines changed: 15 additions & 45 deletions
Original file line numberDiff line numberDiff line change
@@ -264,58 +264,28 @@ pub const Pin = enum(u6) {
264264
.RP2040 => extern struct {
265265
status: @TypeOf(IO_BANK0.GPIO0_STATUS),
266266
ctrl: microzig.mmio.Mmio(packed struct(u32) {
267-
FUNCSEL: packed union {
268-
raw: u5,
269-
value: Function,
270-
},
267+
FUNCSEL: Function,
271268
reserved8: u3,
272-
OUTOVER: packed union {
273-
raw: u2,
274-
value: Override,
275-
},
269+
OUTOVER: Override,
276270
reserved12: u2,
277-
OEOVER: packed union {
278-
raw: u2,
279-
value: Override,
280-
},
271+
OEOVER: Override,
281272
reserved16: u2,
282-
INOVER: packed union {
283-
raw: u2,
284-
value: Override,
285-
},
273+
INOVER: Override,
286274
reserved28: u10,
287-
IRQOVER: packed union {
288-
raw: u2,
289-
value: Override,
290-
},
275+
IRQOVER: Override,
291276
padding: u2,
292277
}),
293278
},
294279
.RP2350 => extern struct {
295280
status: @TypeOf(IO_BANK0.GPIO0_STATUS),
296281
ctrl: microzig.mmio.Mmio(packed struct(u32) {
297-
FUNCSEL: packed union {
298-
raw: u5,
299-
value: Function,
300-
},
282+
FUNCSEL: Function,
301283
reserved12: u7,
302-
OUTOVER: packed union {
303-
raw: u2,
304-
value: Override,
305-
},
306-
OEOVER: packed union {
307-
raw: u2,
308-
value: Override,
309-
},
310-
INOVER: packed union {
311-
raw: u2,
312-
value: Override,
313-
},
284+
OUTOVER: Override,
285+
OEOVER: Override,
286+
INOVER: Override,
314287
reserved28: u10,
315-
IRQOVER: packed union {
316-
raw: u2,
317-
value: Override,
318-
},
288+
IRQOVER: Override,
319289
padding: u2,
320290
}),
321291
},
@@ -471,11 +441,11 @@ pub const Pin = enum(u6) {
471441

472442
const regs = gpio.get_regs();
473443
regs.ctrl.modify(.{
474-
.FUNCSEL = .{ .value = function },
475-
.OUTOVER = .{ .value = .normal },
476-
.INOVER = .{ .value = .normal },
477-
.IRQOVER = .{ .value = .normal },
478-
.OEOVER = .{ .value = .normal },
444+
.FUNCSEL = function,
445+
.OUTOVER = .normal,
446+
.INOVER = .normal,
447+
.IRQOVER = .normal,
448+
.OEOVER = .normal,
479449
});
480450

481451
switch (cpu) {

‎port/raspberrypi/rp2xxx/src/hal/i2c.zig‎

Lines changed: 39 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -217,18 +217,18 @@ pub const I2C = enum(u1) {
217217

218218
inline fn disable(i2c: I2C) void {
219219
i2c.get_regs().IC_ENABLE.write(.{
220-
.ENABLE = .{ .value = .DISABLED },
221-
.ABORT = .{ .value = .DISABLE },
222-
.TX_CMD_BLOCK = .{ .value = .NOT_BLOCKED },
220+
.ENABLE = .DISABLED,
221+
.ABORT = .DISABLE,
222+
.TX_CMD_BLOCK = .NOT_BLOCKED,
223223
.padding = 0,
224224
});
225225
}
226226

227227
inline fn enable(i2c: I2C) void {
228228
i2c.get_regs().IC_ENABLE.write(.{
229-
.ENABLE = .{ .value = .ENABLED },
230-
.ABORT = .{ .value = .DISABLE },
231-
.TX_CMD_BLOCK = .{ .value = .NOT_BLOCKED },
229+
.ENABLE = .ENABLED,
230+
.ABORT = .DISABLE,
231+
.TX_CMD_BLOCK = .NOT_BLOCKED,
232232
.padding = 0,
233233
});
234234
}
@@ -244,15 +244,15 @@ pub const I2C = enum(u1) {
244244
i2c.disable();
245245
const regs = i2c.get_regs();
246246
regs.IC_CON.write(.{
247-
.MASTER_MODE = .{ .value = .ENABLED },
248-
.SPEED = .{ .value = .FAST },
249-
.IC_RESTART_EN = .{ .value = if (config.repeated_start) .ENABLED else .DISABLED },
250-
.IC_SLAVE_DISABLE = .{ .value = .SLAVE_DISABLED },
251-
.TX_EMPTY_CTRL = .{ .value = .ENABLED },
252-
.IC_10BITADDR_SLAVE = .{ .raw = 0 },
253-
.IC_10BITADDR_MASTER = .{ .raw = 0 },
254-
.STOP_DET_IFADDRESSED = .{ .raw = 0 },
255-
.RX_FIFO_FULL_HLD_CTRL = .{ .raw = 0 },
247+
.MASTER_MODE = .ENABLED,
248+
.SPEED = .FAST,
249+
.IC_RESTART_EN = if (config.repeated_start) .ENABLED else .DISABLED,
250+
.IC_SLAVE_DISABLE = .SLAVE_DISABLED,
251+
.TX_EMPTY_CTRL = .ENABLED,
252+
.IC_10BITADDR_SLAVE = @enumFromInt(0),
253+
.IC_10BITADDR_MASTER = @enumFromInt(0),
254+
.STOP_DET_IFADDRESSED = @enumFromInt(0),
255+
.RX_FIFO_FULL_HLD_CTRL = @enumFromInt(0),
256256
.STOP_DET_IF_MASTER_ACTIVE = 0,
257257
.padding = 0,
258258
});
@@ -263,8 +263,8 @@ pub const I2C = enum(u1) {
263263

264264
// DREQ signal control
265265
regs.IC_DMA_CR.write(.{
266-
.RDMAE = .{ .value = .ENABLED },
267-
.TDMAE = .{ .value = .ENABLED },
266+
.RDMAE = .ENABLED,
267+
.TDMAE = .ENABLED,
268268
.padding = 0,
269269
});
270270

@@ -308,8 +308,8 @@ pub const I2C = enum(u1) {
308308
i2c.disable();
309309
i2c.get_regs().IC_TAR.write(.{
310310
.IC_TAR = @intFromEnum(addr),
311-
.GC_OR_START = .{ .value = .GENERAL_CALL },
312-
.SPECIAL = .{ .value = .DISABLED },
311+
.GC_OR_START = .GENERAL_CALL,
312+
.SPECIAL = .DISABLED,
313313
.padding = 0,
314314
});
315315
i2c.enable();
@@ -324,10 +324,10 @@ pub const I2C = enum(u1) {
324324
// IC_CLR_TX_ABRT register always reads as 0.
325325
_ = regs.IC_CLR_TX_ABRT.read();
326326

327-
if (abort_reason.ABRT_7B_ADDR_NOACK.value == .ACTIVE) {
327+
if (abort_reason.ABRT_7B_ADDR_NOACK == .ACTIVE) {
328328
// Address byte wasn't acknowledged by any targets on the bus
329329
return TransactionError.DeviceNotPresent;
330-
} else if (abort_reason.ABRT_TXDATA_NOACK.value == .ABRT_TXDATA_NOACK_GENERATED) {
330+
} else if (abort_reason.ABRT_TXDATA_NOACK == .ABRT_TXDATA_NOACK_GENERATED) {
331331
// Address byte was acknowledged, but a data byte wasn't
332332
return TransactionError.NoAcknowledge;
333333
} else if (abort_reason.TX_FLUSH_CNT > 0) {
@@ -353,7 +353,7 @@ pub const I2C = enum(u1) {
353353
// condition here? If so, additional code would be needed here
354354
// to take care of the abort.
355355
// As far as I can tell from the datasheet, no, this is not possible.
356-
while (regs.IC_RAW_INTR_STAT.read().STOP_DET.value == .INACTIVE) {
356+
while (regs.IC_RAW_INTR_STAT.read().STOP_DET == .INACTIVE) {
357357
hw.tight_loop_contents();
358358
if (deadline.is_reached())
359359
break;
@@ -400,12 +400,12 @@ pub const I2C = enum(u1) {
400400
var iter = write_vec.iterator();
401401
while (iter.next_element()) |element| {
402402
regs.IC_DATA_CMD.write(.{
403-
.RESTART = .{ .raw = 0 },
404-
.STOP = .{ .raw = @intFromBool(element.last) },
405-
.CMD = .{ .value = .WRITE },
403+
.RESTART = @enumFromInt(0),
404+
.STOP = @enumFromInt(@intFromBool(element.last)),
405+
.CMD = .WRITE,
406406
.DAT = element.value,
407407

408-
.FIRST_DATA_BYTE = .{ .value = .INACTIVE },
408+
.FIRST_DATA_BYTE = .INACTIVE,
409409
.padding = 0,
410410
});
411411
// If an abort occurrs, the TX/RX FIFO is flushed, and subsequent writes to IC_DATA_CMD
@@ -427,7 +427,7 @@ pub const I2C = enum(u1) {
427427

428428
// Waits until everything in the TX FIFO is either successfully transmitted, or flushed
429429
// due to an abort. This functions because of TX_EMPTY_CTRL being enabled in apply().
430-
while (regs.IC_RAW_INTR_STAT.read().TX_EMPTY.value == .INACTIVE) {
430+
while (regs.IC_RAW_INTR_STAT.read().TX_EMPTY == .INACTIVE) {
431431
if (deadline.is_reached()) {
432432
timed_out = true;
433433
break;
@@ -479,12 +479,12 @@ pub const I2C = enum(u1) {
479479
var iter = read_vec.iterator();
480480
while (iter.next_element_ptr()) |element| {
481481
regs.IC_DATA_CMD.write(.{
482-
.RESTART = .{ .raw = 0 },
483-
.STOP = .{ .raw = @intFromBool(element.last) },
484-
.CMD = .{ .value = .READ },
482+
.RESTART = @enumFromInt(0),
483+
.STOP = @enumFromInt(@intFromBool(element.last)),
484+
.CMD = .READ,
485485
.DAT = 0,
486486

487-
.FIRST_DATA_BYTE = .{ .value = .INACTIVE },
487+
.FIRST_DATA_BYTE = .INACTIVE,
488488
.padding = 0,
489489
});
490490

@@ -551,12 +551,12 @@ pub const I2C = enum(u1) {
551551
var write_iter = write_vec.iterator();
552552
send_loop: while (write_iter.next_element()) |element| {
553553
regs.IC_DATA_CMD.write(.{
554-
.RESTART = .{ .raw = 0 },
555-
.STOP = .{ .raw = 0 },
556-
.CMD = .{ .value = .WRITE },
554+
.RESTART = @enumFromInt(0),
555+
.STOP = @enumFromInt(0),
556+
.CMD = .WRITE,
557557
.DAT = element.value,
558558

559-
.FIRST_DATA_BYTE = .{ .value = .INACTIVE },
559+
.FIRST_DATA_BYTE = .INACTIVE,
560560
.padding = 0,
561561
});
562562
// If an abort occurrs, the TX/RX FIFO is flushed, and subsequent writes to IC_DATA_CMD
@@ -583,12 +583,12 @@ pub const I2C = enum(u1) {
583583
var read_iter = read_vec.iterator();
584584
recv_loop: while (read_iter.next_element_ptr()) |element| {
585585
regs.IC_DATA_CMD.write(.{
586-
.RESTART = .{ .raw = @intFromBool(element.first) },
587-
.STOP = .{ .raw = @intFromBool(element.last) },
588-
.CMD = .{ .value = .READ },
586+
.RESTART = @enumFromInt(@intFromBool(element.first)),
587+
.STOP = @enumFromInt(@intFromBool(element.last)),
588+
.CMD = .READ,
589589
.DAT = 0,
590590

591-
.FIRST_DATA_BYTE = .{ .value = .INACTIVE },
591+
.FIRST_DATA_BYTE = .INACTIVE,
592592
.padding = 0,
593593
});
594594

‎port/raspberrypi/rp2xxx/src/hal/random.zig‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -28,9 +28,9 @@ pub const Ascon = struct {
2828

2929
pub fn init() @This() {
3030
// Ensure that the system clocks run from the XOSC and/or PLLs
31-
const ref_src = peripherals.CLOCKS.CLK_REF_CTRL.read().SRC.value;
32-
const sys_clk_src = peripherals.CLOCKS.CLK_SYS_CTRL.read().SRC.value;
33-
const aux_src = peripherals.CLOCKS.CLK_SYS_CTRL.read().AUXSRC.value;
31+
const ref_src = peripherals.CLOCKS.CLK_REF_CTRL.read().SRC;
32+
const sys_clk_src = peripherals.CLOCKS.CLK_SYS_CTRL.read().SRC;
33+
const aux_src = peripherals.CLOCKS.CLK_SYS_CTRL.read().AUXSRC;
3434
assert((ref_src != .rosc_clksrc_ph and sys_clk_src == .clk_ref) or
3535
(sys_clk_src == .clksrc_clk_sys_aux and aux_src != .rosc_clksrc));
3636

@@ -68,10 +68,10 @@ pub const Ascon = struct {
6868
/// for security systems because it can be compromised, but it may be useful
6969
/// in less critical applications.
7070
fn rosc(buffer: []u8) void {
71-
const rosc_state = peripherals.ROSC.CTRL.read().ENABLE.value;
71+
const rosc_state = peripherals.ROSC.CTRL.read().ENABLE;
7272
// Enable the ROSC so it generates random bits for us
73-
peripherals.ROSC.CTRL.modify(.{ .ENABLE = .{ .value = .ENABLE } });
74-
defer peripherals.ROSC.CTRL.modify(.{ .ENABLE = .{ .value = rosc_state } });
73+
peripherals.ROSC.CTRL.modify(.{ .ENABLE = .ENABLE });
74+
defer peripherals.ROSC.CTRL.modify(.{ .ENABLE = rosc_state });
7575

7676
var i: usize = 0;
7777
while (i < buffer.len) : (i += 1) {

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