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Bug potential of memory_sub_partition::top function#75

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hnts03 wants to merge 1 commit into
accel-sim:devfrom
hnts03:patch-1
Open

Bug potential of memory_sub_partition::top function#75
hnts03 wants to merge 1 commit into
accel-sim:devfrom
hnts03:patch-1

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@hnts03
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@hnts03 hnts03 commented Aug 28, 2024

// l2cache.cc

mem_fetch *memory_sub_partition::pop() {
  mem_fetch *mf = m_L2_icnt_queue->pop();
  m_request_tracker.erase(mf);
  if (mf && mf->isatomic()) mf->do_atomic();
  if (mf && (mf->get_access_type() == L2_WRBK_ACC ||
             mf->get_access_type() == L1_WRBK_ACC)) {
    delete mf;
    mf = NULL;
  }
  return mf;
}

mem_fetch *memory_sub_partition::top() {
  mem_fetch *mf = m_L2_icnt_queue->top();
  if (mf && (mf->get_access_type() == L2_WRBK_ACC ||
             mf->get_access_type() == L1_WRBK_ACC)) {
    m_L2_icnt_queue->pop();
    m_request_tracker.erase(mf);
    delete mf;
    mf = NULL;
  }
  return mf;
}
// gpu-sim.cc
void gpgpu_sim::cycle(){
...

 if (clock_mask & ICNT) {
   // pop from memory controller to interconnect
   for (unsigned i = 0; i < m_memory_config->m_n_mem_sub_partition; i++) {
     mem_fetch *mf = m_memory_sub_partition[i]->top(); // << top(0)
     if (mf) {  // << Condition(1)
       unsigned response_size =
           mf->get_is_write() ? mf->get_ctrl_size() : mf->size();
       if (::icnt_has_buffer(m_shader_config->mem2device(i), response_size)) {
         // if (!mf->get_is_write())
         mf->set_return_timestamp(gpu_sim_cycle + gpu_tot_sim_cycle);
         mf->set_status(IN_ICNT_TO_SHADER, gpu_sim_cycle + gpu_tot_sim_cycle);
         ::icnt_push(m_shader_config->mem2device(i), mf->get_tpc(), mf,
                     response_size);
         m_memory_sub_partition[i]->pop(); // pop(2)
         partiton_replys_in_parallel_per_cycle++;
       } else {
         gpu_stall_icnt2sh++;
       }
     } else {
       m_memory_sub_partition[i]->pop(); // pop(3)
     }
   }
 }
...
}

When the gpgpu_sim::cycle() function started to ICNT cycle, the return of m_memory_sub_partition[I]->top() could be NULL when its access_type is L2_WRBK_ACC or L1_WRBK_ACC. However, it may cause a double delete & pop to a single mf object and m_L2_icnt_queue. The top function must not delete the element inside of the queue structure.

@JRPan JRPan requested review from a team and Connie120 and removed request for a team August 28, 2024 18:28
@tgrogers
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@William-An , @abhaumick - if you have some time, can you look into this this week?

@William-An
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Looks fair to me. Also, the delete mf at the top should also be removed to prevent a double delete.

@William-An William-An requested a review from Copilot March 19, 2025 14:08
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Copilot wasn't able to review any files in this pull request.

Files not reviewed (1)
  • src/gpgpu-sim/l2cache.cc: Language not supported

reoLantern added a commit to reoLantern/gpgpu-sim_distribution that referenced this pull request Apr 22, 2026
Task accel-sim#75 completion.  Reverts B11's workaround (which was only needed
when power model was forcibly OFF) and restores MICRO 2025's original
#ifdef structure now that power model is auto-enabled.

Changes:
  - CMakeLists.txt: remove `set(GPGPUSIM_USE_POWER_MODEL OFF)` force
    override after include(gpgpusim_check.cmake). The cmake check
    auto-enables the flag when src/accelwattch/ exists (true
    post-pivot).
  - src/gpgpu-sim/gpu-sim.cc: restore original
    `#ifdef GPGPUSIM_POWER_MODEL / #include "power_interface.h" /
    #else / class gpgpu_sim_wrapper {}; / #endif` block.  This file
    is now byte-identical to MICRO 2025 upstream.

Preserved (from B11, still needed):
  - src/accelwattch/CMakeLists.txt: CUDA include dir (MICRO 2025
    gpgpu_sim_wrapper.cc transitively includes shader.h →
    vector_types.h).
  - src/gpgpu-sim/CMakeLists.txt: unconditional accelwattch include
    path on gpgpusim target (harmless when power OFF, required when ON).

Verification:
  - cmake reports "Checking for GPGPU-Sim power model - src/accelwattch/"
  - Full clean build: 0 errors, 26s with ccache
  - vec_add smoke:
      gpu_sim_cycle    = 45840      (byte-identical with MICRO 2025)
      gpu_sim_insn     = 14,680,064
      gpu_ipc          = 320.2457
      kernel_avg_power = 109.197 W  (new, real AccelWattch output)
      accelwattch_power_report.log generated (10,435 bytes)
      wall 44s (+4s vs power-OFF, acceptable overhead)

Power data includes per-component breakdown (IBP/ICP/DCP/RFP/INTP/...),
static/dynamic split, per-kernel instruction classification, cache
hit/miss counts.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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4 participants