1111
1212include "mlir/Dialect/DXSA/IR/DXSADialect.td"
1313include "mlir/Dialect/DXSA/IR/DXSATypes.td"
14+ include "mlir/IR/AttrTypeBase.td"
15+ include "mlir/IR/BuiltinAttributeInterfaces.td"
1416include "mlir/IR/EnumAttr.td"
1517
1618//===----------------------------------------------------------------------===//
@@ -253,6 +255,32 @@ def DXSA_SystemValueNameAttr :
253255 let assemblyFormat = "$value";
254256}
255257
258+ //===----------------------------------------------------------------------===//
259+ // DXSA ComponentMask bit-enum (mask field of operand, normalized to bits 0..3)
260+ //===----------------------------------------------------------------------===//
261+
262+ def DXSA_ComponentMask_X : I32BitEnumAttrCaseBit<"x", 0>;
263+ def DXSA_ComponentMask_Y : I32BitEnumAttrCaseBit<"y", 1>;
264+ def DXSA_ComponentMask_Z : I32BitEnumAttrCaseBit<"z", 2>;
265+ def DXSA_ComponentMask_W : I32BitEnumAttrCaseBit<"w", 3>;
266+
267+ def DXSA_ComponentMask : I32BitEnumAttr<
268+ "ComponentMask", "component mask (subset of x, y, z, w)", [
269+ DXSA_ComponentMask_X,
270+ DXSA_ComponentMask_Y,
271+ DXSA_ComponentMask_Z,
272+ DXSA_ComponentMask_W
273+ ]> {
274+ let separator = ", ";
275+ let cppNamespace = "::mlir::dxsa";
276+ let genSpecializedAttr = 0;
277+ }
278+
279+ def DXSA_ComponentMaskAttr :
280+ EnumAttr<DXSADialect, DXSA_ComponentMask, "component_mask"> {
281+ let assemblyFormat = "`<` $value `>`";
282+ }
283+
256284//===----------------------------------------------------------------------===//
257285// DXSA op definitions
258286//===----------------------------------------------------------------------===//
@@ -335,6 +363,127 @@ def DXSA_Instruction : DXSA_Op<"instruction"> {
335363 let assemblyFormat = "$mnemonic $operands attr-dict";
336364}
337365
366+ def DXSA_InlineOperandType_Temp : I32EnumAttrCase<"temp", 0>;
367+ def DXSA_InlineOperandType_Input : I32EnumAttrCase<"input", 1>;
368+ def DXSA_InlineOperandType_Output : I32EnumAttrCase<"output", 2>;
369+ def DXSA_InlineOperandType_IndexableTemp : I32EnumAttrCase<"indexable_temp", 3>;
370+ def DXSA_InlineOperandType_Immediate32 : I32EnumAttrCase<"immediate32", 4>;
371+ def DXSA_InlineOperandType_Immediate64 : I32EnumAttrCase<"immediate64", 5>;
372+ def DXSA_InlineOperandType_Sampler : I32EnumAttrCase<"sampler", 6>;
373+ def DXSA_InlineOperandType_Resource : I32EnumAttrCase<"resource", 7>;
374+ def DXSA_InlineOperandType_ConstantBuffer : I32EnumAttrCase<"constant_buffer", 8>;
375+ def DXSA_InlineOperandType_ImmediateConstantBuffer : I32EnumAttrCase<"immediate_constant_buffer", 9>;
376+ def DXSA_InlineOperandType_Label : I32EnumAttrCase<"label", 10>;
377+ def DXSA_InlineOperandType_InputPrimitiveId : I32EnumAttrCase<"input_primitive_id", 11>;
378+ def DXSA_InlineOperandType_OutputDepth : I32EnumAttrCase<"output_depth", 12>;
379+ def DXSA_InlineOperandType_Null : I32EnumAttrCase<"null", 13>;
380+ def DXSA_InlineOperandType_Rasterizer : I32EnumAttrCase<"rasterizer", 14>;
381+ def DXSA_InlineOperandType_OutputCoverageMask : I32EnumAttrCase<"output_coverage_mask", 15>;
382+ def DXSA_InlineOperandType_Stream : I32EnumAttrCase<"stream", 16>;
383+ def DXSA_InlineOperandType_FunctionBody : I32EnumAttrCase<"function_body", 17>;
384+ def DXSA_InlineOperandType_FunctionTable : I32EnumAttrCase<"function_table", 18>;
385+ def DXSA_InlineOperandType_Interface : I32EnumAttrCase<"interface", 19>;
386+ def DXSA_InlineOperandType_FunctionInput : I32EnumAttrCase<"function_input", 20>;
387+ def DXSA_InlineOperandType_FunctionOutput : I32EnumAttrCase<"function_output", 21>;
388+ def DXSA_InlineOperandType_OutputControlPointId : I32EnumAttrCase<"output_control_point_id", 22>;
389+ def DXSA_InlineOperandType_InputForkInstanceId : I32EnumAttrCase<"input_fork_instance_id", 23>;
390+ def DXSA_InlineOperandType_InputJoinInstanceId : I32EnumAttrCase<"input_join_instance_id", 24>;
391+ def DXSA_InlineOperandType_InputControlPoint : I32EnumAttrCase<"input_control_point", 25>;
392+ def DXSA_InlineOperandType_OutputControlPoint : I32EnumAttrCase<"output_control_point", 26>;
393+ def DXSA_InlineOperandType_InputPatchConstant : I32EnumAttrCase<"input_patch_constant", 27>;
394+ def DXSA_InlineOperandType_InputDomainPoint : I32EnumAttrCase<"input_domain_point", 28>;
395+ def DXSA_InlineOperandType_ThisPointer : I32EnumAttrCase<"this_pointer", 29>;
396+ def DXSA_InlineOperandType_Uav : I32EnumAttrCase<"uav", 30>;
397+ def DXSA_InlineOperandType_ThreadGroupSharedMemory : I32EnumAttrCase<"thread_group_shared_memory", 31>;
398+ def DXSA_InlineOperandType_InputThreadId : I32EnumAttrCase<"input_thread_id", 32>;
399+ def DXSA_InlineOperandType_InputThreadGroupId : I32EnumAttrCase<"input_thread_group_id", 33>;
400+ def DXSA_InlineOperandType_InputThreadIdInGroup : I32EnumAttrCase<"input_thread_id_in_group", 34>;
401+ def DXSA_InlineOperandType_InputCoverageMask : I32EnumAttrCase<"input_coverage_mask", 35>;
402+ def DXSA_InlineOperandType_InputThreadIdInGroupFlattened : I32EnumAttrCase<"input_thread_id_in_group_flattened", 36>;
403+ def DXSA_InlineOperandType_InputGsInstanceId : I32EnumAttrCase<"input_gs_instance_id", 37>;
404+ def DXSA_InlineOperandType_OutputDepthGe : I32EnumAttrCase<"output_depth_ge", 38>;
405+ def DXSA_InlineOperandType_OutputDepthLe : I32EnumAttrCase<"output_depth_le", 39>;
406+ def DXSA_InlineOperandType_CycleCounter : I32EnumAttrCase<"cycle_counter", 40>;
407+ def DXSA_InlineOperandType_OutputStencilRef : I32EnumAttrCase<"output_stencil_ref", 41>;
408+ def DXSA_InlineOperandType_InnerCoverage : I32EnumAttrCase<"inner_coverage", 42>;
409+
410+ def DXSA_InlineOperandType : I32EnumAttr<
411+ "InlineOperandType", "operand type", [
412+ DXSA_InlineOperandType_Temp,
413+ DXSA_InlineOperandType_Input,
414+ DXSA_InlineOperandType_Output,
415+ DXSA_InlineOperandType_IndexableTemp,
416+ DXSA_InlineOperandType_Immediate32,
417+ DXSA_InlineOperandType_Immediate64,
418+ DXSA_InlineOperandType_Sampler,
419+ DXSA_InlineOperandType_Resource,
420+ DXSA_InlineOperandType_ConstantBuffer,
421+ DXSA_InlineOperandType_ImmediateConstantBuffer,
422+ DXSA_InlineOperandType_Label,
423+ DXSA_InlineOperandType_InputPrimitiveId,
424+ DXSA_InlineOperandType_OutputDepth,
425+ DXSA_InlineOperandType_Null,
426+ DXSA_InlineOperandType_Rasterizer,
427+ DXSA_InlineOperandType_OutputCoverageMask,
428+ DXSA_InlineOperandType_Stream,
429+ DXSA_InlineOperandType_FunctionBody,
430+ DXSA_InlineOperandType_FunctionTable,
431+ DXSA_InlineOperandType_Interface,
432+ DXSA_InlineOperandType_FunctionInput,
433+ DXSA_InlineOperandType_FunctionOutput,
434+ DXSA_InlineOperandType_OutputControlPointId,
435+ DXSA_InlineOperandType_InputForkInstanceId,
436+ DXSA_InlineOperandType_InputJoinInstanceId,
437+ DXSA_InlineOperandType_InputControlPoint,
438+ DXSA_InlineOperandType_OutputControlPoint,
439+ DXSA_InlineOperandType_InputPatchConstant,
440+ DXSA_InlineOperandType_InputDomainPoint,
441+ DXSA_InlineOperandType_ThisPointer,
442+ DXSA_InlineOperandType_Uav,
443+ DXSA_InlineOperandType_ThreadGroupSharedMemory,
444+ DXSA_InlineOperandType_InputThreadId,
445+ DXSA_InlineOperandType_InputThreadGroupId,
446+ DXSA_InlineOperandType_InputThreadIdInGroup,
447+ DXSA_InlineOperandType_InputCoverageMask,
448+ DXSA_InlineOperandType_InputThreadIdInGroupFlattened,
449+ DXSA_InlineOperandType_InputGsInstanceId,
450+ DXSA_InlineOperandType_OutputDepthGe,
451+ DXSA_InlineOperandType_OutputDepthLe,
452+ DXSA_InlineOperandType_CycleCounter,
453+ DXSA_InlineOperandType_OutputStencilRef,
454+ DXSA_InlineOperandType_InnerCoverage
455+ ]> {
456+ let cppNamespace = "::mlir::dxsa";
457+ let genSpecializedAttr = 0;
458+ }
459+
460+ def DXSA_InlineOperandAttr : AttrDef<DXSADialect, "InlineOperand"> {
461+ let mnemonic = "inline_operand";
462+ let summary = "inline operand of an instruction";
463+ let description = [{
464+ The `#dxsa.inline_operand` attribute carries a fully decoded operand token
465+
466+ Example:
467+
468+ ```mlir
469+ dxsa.dcl_output <type = output, components = 4, mask = <x, y, z, w>, index = [0]>
470+ dxsa.dcl_output <type = output_depth, components = 1>
471+ ```
472+ }];
473+ let parameters = (ins
474+ EnumParameter<DXSA_InlineOperandType>:$type,
475+ "uint32_t":$components,
476+ OptionalParameter<"::mlir::dxsa::ComponentMaskAttr">:$mask,
477+ OptionalParameter<"::mlir::DenseI64ArrayAttr">:$index);
478+ let assemblyFormat = [{
479+ `<` `type` `=` $type
480+ `,` `components` `=` $components
481+ (`,` `mask` `=` $mask^)?
482+ (`,` `index` `=` $index^)?
483+ `>`
484+ }];
485+ }
486+
338487def DXSA_DclGlobalFlags : DXSA_Op<"dcl_global_flags"> {
339488 let summary = "declares global shader flags";
340489 let description = [{
@@ -545,11 +694,10 @@ def DXSA_DclInput : DXSA_Op<"dcl_input"> {
545694 Example:
546695
547696 ```mlir
548-
549- dxsa.dcl_input %v0
697+ dxsa.dcl_input <type = input, components = 4, mask = <x>, index = [0]>
550698 ```
551699 }];
552- let arguments = (ins DXSA_OperandType :$operand);
700+ let arguments = (ins DXSA_InlineOperandAttr :$operand);
553701 let assemblyFormat = "$operand attr-dict";
554702}
555703
@@ -564,10 +712,10 @@ def DXSA_DclOutput : DXSA_Op<"dcl_output"> {
564712 Example:
565713
566714 ```mlir
567- dxsa.dcl_output %o0
715+ dxsa.dcl_output <type = output, components = 4, mask = <x, y, z, w>, index = [0]>
568716 ```
569717 }];
570- let arguments = (ins DXSA_OperandType :$operand);
718+ let arguments = (ins DXSA_InlineOperandAttr :$operand);
571719 let assemblyFormat = "$operand attr-dict";
572720}
573721
0 commit comments