[mlir][dxsa] Add dcl_constant_buffer, dcl_hs_fork_phase_instance_count, dcl_hs_join_phase_instance_count, dcl_hs_max_tessfactor, dcl_index_range, dcl_output_sgv, dcl_output_siv and dcl_tgsm_raw instructions

Example:
  dxsa.dcl_constant_buffer <type = constant_buffer, components = 4, swizzle = <x, y, z, w>, index = [0, 1]>, <immediateIndexed>
  dxsa.dcl_hs_fork_phase_instance_count 4
  dxsa.dcl_hs_join_phase_instance_count 2
  dxsa.dcl_hs_max_tessfactor 6.400000e+01
  dxsa.dcl_index_range <type = input, components = 4, mask = <x, y, z, w>, index = [4]>, 6
  dxsa.dcl_output_sgv <type = output, components = 4, mask = <x>, index = [0]>, <primitiveID>
  dxsa.dcl_output_siv <type = output, components = 4, mask = <x, y, z, w>, index = [0]>, <position>
  dxsa.dcl_tgsm_raw <type = thread_group_shared_memory, components = 0, index = [0]>, 1024

Signed-off-by: Vladimir Shiryaev <tagolog@users.noreply.github.com>

Author: tagolog

mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td

@@ -252,7 +252,7 @@ def DXSA_SystemValueName : I32EnumAttr<
 
 def DXSA_SystemValueNameAttr :
     EnumAttr<DXSADialect, DXSA_SystemValueName, "system_value_name"> {
-  let assemblyFormat = "$value";
+  let assemblyFormat = "`<` $value `>`";
 }
 
 //===----------------------------------------------------------------------===//
@@ -281,6 +281,65 @@ def DXSA_ComponentMaskAttr :
   let assemblyFormat = "`<` $value `>`";
 }
 
+//===----------------------------------------------------------------------===//
+// DXSA ComponentName enum (distinct from ComponentMask which is a bit mask)
+//===----------------------------------------------------------------------===//
+
+def DXSA_ComponentName_X : I32EnumAttrCase<"x", 0>;
+def DXSA_ComponentName_Y : I32EnumAttrCase<"y", 1>;
+def DXSA_ComponentName_Z : I32EnumAttrCase<"z", 2>;
+def DXSA_ComponentName_W : I32EnumAttrCase<"w", 3>;
+
+def DXSA_ComponentName : I32EnumAttr<
+    "ComponentName", "single x/y/z/w component", [
+      DXSA_ComponentName_X,
+      DXSA_ComponentName_Y,
+      DXSA_ComponentName_Z,
+      DXSA_ComponentName_W
+    ]> {
+  let cppNamespace = "::mlir::dxsa";
+  let genSpecializedAttr = 0;
+}
+
+def DXSA_ComponentNameAttr :
+    EnumAttr<DXSADialect, DXSA_ComponentName, "component_name"> {
+  let assemblyFormat = "`<` $value `>`";
+}
+
+//===----------------------------------------------------------------------===//
+// DXSA ComponentSwizzle attribute — ordered component mapping
+// (each component picks one of x/y/z/w from the source, components may repeat)
+//===----------------------------------------------------------------------===//
+
+def DXSA_ComponentSwizzleAttr : AttrDef<DXSADialect, "ComponentSwizzle"> {
+  let mnemonic = "component_swizzle";
+  let summary = "component swizzle (each component picks one of x, y, z, w)";
+  let parameters = (ins
+      EnumParameter<DXSA_ComponentName>:$x,
+      EnumParameter<DXSA_ComponentName>:$y,
+      EnumParameter<DXSA_ComponentName>:$z,
+      EnumParameter<DXSA_ComponentName>:$w);
+  let assemblyFormat = "`<` $x `,` $y `,` $z `,` $w `>`";
+}
+
+def DXSA_ConstantBufferAccessPattern_ImmediateIndexed : I32EnumAttrCase<"immediateIndexed", 0>;
+def DXSA_ConstantBufferAccessPattern_DynamicIndexed   : I32EnumAttrCase<"dynamicIndexed",   1>;
+
+def DXSA_ConstantBufferAccessPattern : I32EnumAttr<
+    "ConstantBufferAccessPattern", "constant buffer access pattern", [
+      DXSA_ConstantBufferAccessPattern_ImmediateIndexed,
+      DXSA_ConstantBufferAccessPattern_DynamicIndexed
+    ]> {
+  let cppNamespace = "::mlir::dxsa";
+  let genSpecializedAttr = 0;
+}
+
+def DXSA_ConstantBufferAccessPatternAttr :
+    EnumAttr<DXSADialect, DXSA_ConstantBufferAccessPattern,
+             "constant_buffer_access_pattern"> {
+  let assemblyFormat = "`<` $value `>`";
+}
+
 //===----------------------------------------------------------------------===//
 // DXSA op definitions
 //===----------------------------------------------------------------------===//
@@ -461,27 +520,25 @@ def DXSA_InlineOperandAttr : AttrDef<DXSADialect, "InlineOperand"> {
   let mnemonic = "inline_operand";
   let summary = "inline operand of an instruction";
   let description = [{
-    The `#dxsa.inline_operand` attribute carries a fully decoded operand token
+    The `#dxsa.inline_operand` attribute carries a fully decoded operand token.
 
-    Example:
+    Examples:
 
     ```mlir
     dxsa.dcl_output <type = output, components = 4, mask = <x, y, z, w>, index = [0]>
+    dxsa.dcl_constant_buffer <type = constant_buffer, components = 4, swizzle = <x, y, z, w>, index = [0, 1]>, <immediateIndexed>
     dxsa.dcl_output <type = output_depth, components = 1>
     ```
   }];
   let parameters = (ins
       EnumParameter<DXSA_InlineOperandType>:$type,
       "uint32_t":$components,
       OptionalParameter<"::mlir::dxsa::ComponentMaskAttr">:$mask,
+      OptionalParameter<"::mlir::dxsa::ComponentSwizzleAttr">:$swizzle,
+      OptionalParameter<"::mlir::dxsa::ComponentNameAttr">:$select,
       OptionalParameter<"::mlir::DenseI64ArrayAttr">:$index);
-  let assemblyFormat = [{
-    `<` `type` `=` $type
-        `,` `components` `=` $components
-        (`,` `mask` `=` $mask^)?
-        (`,` `index` `=` $index^)?
-    `>`
-  }];
+  let assemblyFormat = "`<` struct(params) `>`";
+  let genVerifyDecl = 1;
 }
 
 def DXSA_DclGlobalFlags : DXSA_Op<"dcl_global_flags"> {
@@ -657,7 +714,7 @@ def DXSA_DclInputPsSiv : DXSA_Op<"dcl_input_ps_siv"> {
     Example:
 
     ```mlir
-    dxsa.dcl_input_ps_siv linear %v0, position
+    dxsa.dcl_input_ps_siv linear %v0, <position>
     ```
   }];
   let arguments = (ins DXSA_InterpolationModeAttr:$mode,
@@ -675,7 +732,7 @@ def DXSA_DclInputPsSgv : DXSA_Op<"dcl_input_ps_sgv"> {
     Example:
 
     ```mlir
-    dxsa.dcl_input_ps_sgv %v0, sampleIndex
+    dxsa.dcl_input_ps_sgv %v0, <sampleIndex>
     ```
   }];
   let arguments = (ins DXSA_OperandType:$operand,
@@ -719,4 +776,145 @@ def DXSA_DclOutput : DXSA_Op<"dcl_output"> {
   let assemblyFormat = "$operand attr-dict";
 }
 
+def DXSA_DclOutputSiv : DXSA_Op<"dcl_output_siv"> {
+  let summary = "declares a shader output carrying a System Interpreted Value";
+  let description = [{
+    The `dxsa.dcl_output_siv` operation declares an output register that
+    represents a System Interpreted Value (e.g. `position`, `clipDistance`).
+
+    Example:
+
+    ```mlir
+    dxsa.dcl_output_siv <type = output, components = 4, mask = <x, y, z, w>, index = [3]>, <position>
+    ```
+  }];
+  let arguments = (ins DXSA_InlineOperandAttr:$operand,
+                       DXSA_SystemValueNameAttr:$name);
+  let assemblyFormat = "$operand `,` $name attr-dict";
+}
+
+def DXSA_DclConstantBuffer : DXSA_Op<"dcl_constant_buffer"> {
+  let summary = "declares a constant buffer";
+  let description = [{
+    The `dxsa.dcl_constant_buffer` operation declares a constant buffer
+    together with its access pattern.
+
+    Example:
+
+    ```mlir
+    dxsa.dcl_constant_buffer <type = constant_buffer, components = 4, swizzle = <x, y, z, w>, index = [3, 128]>, <dynamicIndexed>
+    ```
+  }];
+  let arguments = (ins DXSA_InlineOperandAttr:$operand,
+                       DXSA_ConstantBufferAccessPatternAttr:$access_pattern);
+  let assemblyFormat = "$operand `,` $access_pattern attr-dict";
+}
+
+def DXSA_DclHsMaxTessfactor : DXSA_Op<"dcl_hs_max_tessfactor"> {
+  let summary = "declares the maximum tessellation factor for a hull shader";
+  let description = [{
+    The `dxsa.dcl_hs_max_tessfactor` operation declares the maximum
+    tessellation factor produced by the hull shader as a 32-bit float.
+
+    Example:
+
+    ```mlir
+    dxsa.dcl_hs_max_tessfactor 6.400000e+01
+    ```
+  }];
+  let arguments = (ins F32Attr:$max_tess_factor);
+  let assemblyFormat = "$max_tess_factor attr-dict";
+  let hasVerifier = 1;
+}
+
+def DXSA_DclHsForkPhaseInstanceCount :
+    DXSA_Op<"dcl_hs_fork_phase_instance_count"> {
+  let summary = "declares the hull shader fork phase instance count";
+  let description = [{
+    The `dxsa.dcl_hs_fork_phase_instance_count` operation declares the
+    number of instances of the current hull shader fork phase program
+    to execute.
+
+    Example:
+
+    ```mlir
+    dxsa.dcl_hs_fork_phase_instance_count 4
+    ```
+  }];
+  let arguments = (ins ConfinedAttr<I32Attr, [IntPositive]>:$count);
+  let assemblyFormat = "$count attr-dict";
+}
+
+def DXSA_DclHsJoinPhaseInstanceCount :
+    DXSA_Op<"dcl_hs_join_phase_instance_count"> {
+  let summary = "declares the hull shader join phase instance count";
+  let description = [{
+    The `dxsa.dcl_hs_join_phase_instance_count` operation declares the
+    number of instances of the current hull shader join phase program
+    to execute.
+
+    Example:
+
+    ```mlir
+    dxsa.dcl_hs_join_phase_instance_count 2
+    ```
+  }];
+  let arguments = (ins ConfinedAttr<I32Attr, [IntPositive]>:$count);
+  let assemblyFormat = "$count attr-dict";
+}
+
+def DXSA_DclIndexRange : DXSA_Op<"dcl_index_range"> {
+  let summary = "declares a range of input/output registers to be indexed";
+  let description = [{
+    The `dxsa.dcl_index_range` operation declares a range of contiguous
+    input or output registers that may be referenced by dynamic indexing
+    in shader code.
+
+    Example:
+
+    ```mlir
+    dxsa.dcl_index_range <type = input, components = 4, mask = <x, y, z, w>, index = [1]>, 3
+    ```
+  }];
+  let arguments = (ins DXSA_InlineOperandAttr:$operand,
+                       ConfinedAttr<I32Attr, [IntPositive]>:$count);
+  let assemblyFormat = "$operand `,` $count attr-dict";
+}
+
+def DXSA_DclTgsmRaw : DXSA_Op<"dcl_tgsm_raw"> {
+  let summary = "declares raw thread group shared memory";
+  let description = [{
+    The `dxsa.dcl_tgsm_raw` operation declares a region of untyped thread
+    group shared memory of the given byte count.
+
+    Example:
+
+    ```mlir
+    dxsa.dcl_tgsm_raw <type = thread_group_shared_memory, components = 0, index = [0]>, 1024
+    ```
+  }];
+  let arguments = (ins DXSA_InlineOperandAttr:$operand,
+                       ConfinedAttr<I32Attr,
+                           [IntPositive, IntMaxValue<32768>]>:$byte_count);
+  let assemblyFormat = "$operand `,` $byte_count attr-dict";
+  let hasVerifier = 1;
+}
+
+def DXSA_DclOutputSgv : DXSA_Op<"dcl_output_sgv"> {
+  let summary = "declares a shader output carrying a System Generated Value";
+  let description = [{
+    The `dxsa.dcl_output_sgv` operation declares an output register that
+    represents a System Generated Value.
+
+    Example:
+
+    ```mlir
+    dxsa.dcl_output_sgv <type = output, components = 1, mask = <x>, index = [4]>, <primitiveID>
+    ```
+  }];
+  let arguments = (ins DXSA_InlineOperandAttr:$operand,
+                       DXSA_SystemValueNameAttr:$name);
+  let assemblyFormat = "$operand `,` $name attr-dict";
+}
+
 #endif // DXSA_OPS

mlir/lib/Dialect/DXSA/IR/DXSA.cpp

@@ -41,6 +41,52 @@ void DXSADialect::initialize() {
 #define GET_OP_CLASSES
 #include "mlir/Dialect/DXSA/IR/DXSAOps.cpp.inc"
 
+//===----------------------------------------------------------------------===//
+// Op verifiers
+//===----------------------------------------------------------------------===//
+
+LogicalResult DclTgsmRaw::verify() {
+  auto byteCount = getByteCount();
+  if (byteCount % 4 != 0)
+    return emitOpError("byte count must be a multiple of 4, got ") << byteCount;
+  return success();
+}
+
+LogicalResult DclHsMaxTessfactor::verify() {
+  // Reject NaN, Inf, and anything outside [1.0, 64.0].
+  auto value = getMaxTessFactorAttr().getValue();
+  if (!value.isFinite() || value < llvm::APFloat(1.0f) ||
+      value > llvm::APFloat(64.0f))
+    return emitOpError("max tessellation factor must be in [1.0, 64.0], got ")
+           << value.convertToFloat();
+  return success();
+}
+
+//===----------------------------------------------------------------------===//
+// Attribute verifiers
+//===----------------------------------------------------------------------===//
+
+LogicalResult
+InlineOperandAttr::verify(function_ref<InFlightDiagnostic()> emitError,
+                          ::mlir::dxsa::InlineOperandType /*type*/,
+                          uint32_t components,
+                          ::mlir::dxsa::ComponentMaskAttr mask,
+                          ::mlir::dxsa::ComponentSwizzleAttr swizzle,
+                          ::mlir::dxsa::ComponentNameAttr select,
+                          ::mlir::DenseI64ArrayAttr /*index*/) {
+  // mask / swizzle / select are the three mutually-exclusive 4-component
+  // selection modes. Operands with 0 or 1 components carry none of them.
+  auto set = (mask ? 1 : 0) + (swizzle ? 1 : 0) + (select ? 1 : 0);
+  if (set > 1)
+    return emitError() << "at most one of 'mask', 'swizzle', 'select' may "
+                          "be set on an operand";
+  if (components != 4 && set != 0)
+    return emitError() << "component selection mode is only valid on a "
+                          "4-component operand, got "
+                       << components << " components";
+  return success();
+}
+
 //===----------------------------------------------------------------------===//
 // TableGen'd attribute method definitions
 //===----------------------------------------------------------------------===//