diff --git a/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td b/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td index a2e4e0284733..7f88dbb3c8b3 100644 --- a/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td +++ b/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td @@ -51,6 +51,28 @@ def DXSA_GlobalFlagsAttr : let assemblyFormat = "`<` $value `>`"; } +def DXSA_TessellatorOutputPrimitiveType_OutputPoint : I32EnumAttrCase<"output_point", 1>; +def DXSA_TessellatorOutputPrimitiveType_OutputLine : I32EnumAttrCase<"output_line", 2>; +def DXSA_TessellatorOutputPrimitiveType_OutputTriangleCw : I32EnumAttrCase<"output_triangle_cw", 3>; +def DXSA_TessellatorOutputPrimitiveType_OutputTriangleCcw : I32EnumAttrCase<"output_triangle_ccw", 4>; + +def DXSA_TessellatorOutputPrimitiveType : I32EnumAttr< + "TessellatorOutputPrimitiveType", "tessellator output primitive type", [ + DXSA_TessellatorOutputPrimitiveType_OutputPoint, + DXSA_TessellatorOutputPrimitiveType_OutputLine, + DXSA_TessellatorOutputPrimitiveType_OutputTriangleCw, + DXSA_TessellatorOutputPrimitiveType_OutputTriangleCcw + ]> { + let cppNamespace = "::mlir::dxsa"; + let genSpecializedAttr = 0; +} + +def DXSA_TessellatorOutputPrimitiveTypeAttr : + EnumAttr { + let assemblyFormat = "$value"; +} + //===----------------------------------------------------------------------===// // DXSA op definitions //===----------------------------------------------------------------------===// @@ -196,4 +218,21 @@ def DXSA_DclOutputControlPointCount : let assemblyFormat = [{ $count attr-dict }]; } +def DXSA_DclTessellatorOutputPrimitive + : DXSA_Op<"dcl_tessellator_output_primitive"> { + let summary = "declares the tessellator output primitive type"; + let description = [{ + The `dxsa.dcl_tessellator_output_primitive` operation declares the + tessellator output primitive type. + + Example: + + ```mlir + dxsa.dcl_tessellator_output_primitive output_triangle_cw + ``` + }]; + let arguments = (ins DXSA_TessellatorOutputPrimitiveTypeAttr:$type); + let assemblyFormat = "$type attr-dict"; +} + #endif // DXSA_OPS diff --git a/mlir/lib/Target/DXSA/BinaryParser.cpp b/mlir/lib/Target/DXSA/BinaryParser.cpp index cdeeed28145f..bc3f437d3f6d 100644 --- a/mlir/lib/Target/DXSA/BinaryParser.cpp +++ b/mlir/lib/Target/DXSA/BinaryParser.cpp @@ -529,6 +529,15 @@ class DXBuilder { builder, loc, builder.getI32IntegerAttr(count)); } + Instruction buildDclTessellatorOutputPrimitive( + dxsa::TessellatorOutputPrimitiveType outputPrimitiveType, Location loc) { + auto outputPrimitiveTypeAttr = + dxsa::TessellatorOutputPrimitiveTypeAttr::get(builder.getContext(), + outputPrimitiveType); + return dxsa::DclTessellatorOutputPrimitive::create(builder, loc, + outputPrimitiveTypeAttr); + } + private: MLIRContext *context; ModuleOp module; @@ -891,6 +900,19 @@ class Parser { return builder.buildDclOutputControlPointCount(count, loc); } + FailureOr + parseDclTessellatorOutputPrimitive(uint32_t opcodeToken, Location loc) { + auto rawOutputPrimitiveType = + DECODE_D3D11_SB_TESS_OUTPUT_PRIMITIVE(opcodeToken); + auto outputPrimitiveType = + dxsa::symbolizeTessellatorOutputPrimitiveType(rawOutputPrimitiveType); + if (!outputPrimitiveType) + return emitError(loc, "unknown tessellator output primitive type: ") + << rawOutputPrimitiveType; + return builder.buildDclTessellatorOutputPrimitive(*outputPrimitiveType, + loc); + } + OptionalParseResult parseDclInstruction(uint32_t opcodeToken, Location loc, Instruction &out) { FailureOr result; @@ -907,6 +929,9 @@ class Parser { case D3D11_SB_OPCODE_DCL_OUTPUT_CONTROL_POINT_COUNT: result = parseDclOutputControlPointCount(opcodeToken, loc); break; + case D3D11_SB_OPCODE_DCL_TESS_OUTPUT_PRIMITIVE: + result = parseDclTessellatorOutputPrimitive(opcodeToken, loc); + break; default: return std::nullopt; } diff --git a/mlir/test/Target/DXSA/dcl_tessellator_output_primitive.mlir b/mlir/test/Target/DXSA/dcl_tessellator_output_primitive.mlir new file mode 100644 index 000000000000..23f0e2e78e0c --- /dev/null +++ b/mlir/test/Target/DXSA/dcl_tessellator_output_primitive.mlir @@ -0,0 +1,8 @@ +// RUN: mlir-translate --import-dxsa-bin %S/inputs/dcl_tessellator_output_primitive.bin | FileCheck %s + +// CHECK: module { +// CHECK-NEXT: dxsa.dcl_tessellator_output_primitive output_point +// CHECK-NEXT: dxsa.dcl_tessellator_output_primitive output_line +// CHECK-NEXT: dxsa.dcl_tessellator_output_primitive output_triangle_cw +// CHECK-NEXT: dxsa.dcl_tessellator_output_primitive output_triangle_ccw +// CHECK-NEXT: } diff --git a/mlir/test/Target/DXSA/inputs/dcl_tessellator_output_primitive.bin b/mlir/test/Target/DXSA/inputs/dcl_tessellator_output_primitive.bin new file mode 100644 index 000000000000..497e75a654e3 Binary files /dev/null and b/mlir/test/Target/DXSA/inputs/dcl_tessellator_output_primitive.bin differ