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chbessonovaasl
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[MSP430] Add RTLIB::[SRL/SRA/SHL]_I32 lowering to EABI lib calls
1 parent f9c6e7d commit 4c766f6

2 files changed

Lines changed: 40 additions & 1 deletion

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src/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp

Lines changed: 5 additions & 1 deletion
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@@ -217,7 +217,11 @@ MSP430TargetLowering::MSP430TargetLowering(const TargetMachine &TM,
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// { RTLIB::NEG_F64, "__mspabi_negd", ISD::SETCC_INVALID },
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// { RTLIB::NEG_F32, "__mspabi_negf", ISD::SETCC_INVALID },
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// TODO: SLL/SRA/SRL are in libgcc, RLL isn't
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// TODO: __mspabi_[srli/srai/slli] ARE implemented in libgcc
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{ RTLIB::SRL_I32, "__mspabi_srll", ISD::SETCC_INVALID },
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{ RTLIB::SRA_I32, "__mspabi_sral", ISD::SETCC_INVALID },
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{ RTLIB::SHL_I32, "__mspabi_slll", ISD::SETCC_INVALID },
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// __mspabi_[srlll/srall/sllll/rlli/rllll] are NOT implemented in libgcc
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// Universal Integer Operations - EABI Table 9
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{ RTLIB::SDIV_I16, "__mspabi_divi", ISD::SETCC_INVALID },

src/llvm/test/CodeGen/MSP430/libcalls.ll

Lines changed: 35 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -604,4 +604,39 @@ entry:
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ret i64 %1
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}
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@i = external global i32, align 2
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define i32 @srll() #0 {
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entry:
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; CHECK-LABEL: srll:
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; CHECK: call #__mspabi_srll
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%0 = load volatile i32, i32* @g_i32, align 2
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%1 = load volatile i32, i32* @i, align 2
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%shr = lshr i32 %0, %1
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ret i32 %shr
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}
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define i32 @sral() #0 {
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entry:
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; CHECK-LABEL: sral:
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; CHECK: call #__mspabi_sral
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%0 = load volatile i32, i32* @g_i32, align 2
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%1 = load volatile i32, i32* @i, align 2
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%shr = ashr i32 %0, %1
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ret i32 %shr
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}
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define i32 @slll() #0 {
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entry:
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; CHECK-LABEL: slll:
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; CHECK: call #__mspabi_slll
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%0 = load volatile i32, i32* @g_i32, align 2
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%1 = load volatile i32, i32* @i, align 2
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%shr = shl i32 %0, %1
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ret i32 %shr
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}
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attributes #0 = { nounwind }

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