[MSP430] Print 0(Rn) as [at]Rn

chbessonova · asl · commit 9ff50a3481ba · 2018-11-23T01:05:33.000+03:00
diff --git a/src/llvm/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp b/src/llvm/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp
@@ -69,8 +69,8 @@ void MSP430InstPrinter::printSrcMemOperand(const MCInst *MI, unsigned OpNo,
                                            const char *Modifier) {
   const MCOperand &Base = MI->getOperand(OpNo);
   const MCOperand &Disp = MI->getOperand(OpNo+1);
-
-  // Print displacement first
+  assert(Disp.isImm() ||
+         Disp.isExpr() && "Unexpected type in displacement field");
 
   // If the global address expression is a part of displacement field with a
   // register base, we should not emit any prefix symbol here, e.g.
@@ -81,17 +81,26 @@ void MSP430InstPrinter::printSrcMemOperand(const MCInst *MI, unsigned OpNo,
   if (Base.getReg() == MSP430::SR)
     O << '&';
 
+  if (Base.getReg() == MSP430::SR || Base.getReg() == MSP430::PC) {
+    if (Disp.isExpr())
+      Disp.getExpr()->print(O, &MAI);
+    else
+      O << Disp.getImm();
+    return;
+  }
+
+  // Print 0(Rn) as @Rn
+  if (Disp.isImm() && Disp.getImm() == 0) {
+    O << '@' << getRegisterName(Base.getReg());
+    return;
+  }
+
   if (Disp.isExpr())
     Disp.getExpr()->print(O, &MAI);
-  else {
-    assert(Disp.isImm() && "Expected immediate in displacement field");
+  else
     O << Disp.getImm();
-  }
 
-  // Print register base field
-  if ((Base.getReg() != MSP430::SR) &&
-      (Base.getReg() != MSP430::PC))
-    O << '(' << getRegisterName(Base.getReg()) << ')';
+  O << '(' << getRegisterName(Base.getReg()) << ')';
 }
 
 void MSP430InstPrinter::printIndRegOperand(const MCInst *MI, unsigned OpNo,
diff --git a/src/llvm/test/CodeGen/MSP430/AddrMode-bis-rx.ll b/src/llvm/test/CodeGen/MSP430/AddrMode-bis-rx.ll
@@ -8,7 +8,7 @@ define i16 @am1(i16 %x, i16* %a) nounwind {
 	ret i16 %2
 }
 ; CHECK-LABEL: am1:
-; CHECK:		bis	0(r13), r12
+; CHECK:		bis	@r13, r12
 
 @foo = external global i16
 
diff --git a/src/llvm/test/CodeGen/MSP430/AddrMode-bis-xr.ll b/src/llvm/test/CodeGen/MSP430/AddrMode-bis-xr.ll
@@ -9,7 +9,7 @@ define void @am1(i16* %a, i16 %x) nounwind {
 	ret void
 }
 ; CHECK-LABEL: am1:
-; CHECK:		bis	r13, 0(r12)
+; CHECK:		bis	r13, @r12
 
 @foo = external global i16
 
diff --git a/src/llvm/test/CodeGen/MSP430/AddrMode-mov-rx.ll b/src/llvm/test/CodeGen/MSP430/AddrMode-mov-rx.ll
@@ -7,7 +7,7 @@ define i16 @am1(i16* %a) nounwind {
 	ret i16 %1
 }
 ; CHECK-LABEL: am1:
-; CHECK:		mov	0(r12), r12
+; CHECK:		mov	@r12, r12
 
 @foo = external global i16
 
diff --git a/src/llvm/test/CodeGen/MSP430/AddrMode-mov-xr.ll b/src/llvm/test/CodeGen/MSP430/AddrMode-mov-xr.ll
@@ -7,7 +7,7 @@ define void @am1(i16* %a, i16 %b) nounwind {
 	ret void
 }
 ; CHECK-LABEL: am1:
-; CHECK:		mov	r13, 0(r12)
+; CHECK:		mov	r13, @r12
 
 @foo = external global i16
 
diff --git a/src/llvm/test/CodeGen/MSP430/Inst16mm.ll b/src/llvm/test/CodeGen/MSP430/Inst16mm.ll
@@ -65,5 +65,5 @@ entry:
  ret i16 %0
 ; CHECK-LABEL: mov2:
 ; CHECK-DAG:	mov	2(r1), 6(r1)
-; CHECK-DAG:	mov	0(r1), 4(r1)
+; CHECK-DAG:	mov	@r1, 4(r1)
 }
diff --git a/src/llvm/test/CodeGen/MSP430/byval.ll b/src/llvm/test/CodeGen/MSP430/byval.ll
@@ -20,7 +20,7 @@ entry:
 ; CHECK-LABEL: caller:
 ; CHECK: mov &foo+4, 4(r1)
 ; CHECK-NEXT: mov &foo+2, 2(r1)
-; CHECK-NEXT: mov &foo, 0(r1)
+; CHECK-NEXT: mov &foo, @r1
   %call = call i16 @callee(%struct.Foo* byval @foo)
   ret void
 }
diff --git a/src/llvm/test/CodeGen/MSP430/cc_args.ll b/src/llvm/test/CodeGen/MSP430/cc_args.ll
@@ -37,7 +37,7 @@ entry:
 ; CHECK: call #f_i16_i32_i16
   call void @f_i16_i32_i16(i16 1, i32 16909060, i16 2)
 
-; CHECK: mov #1286, 0(r1)
+; CHECK: mov #1286, @r1
 ; CHECK: mov #1, r12
 ; CHECK: mov #772, r13
 ; CHECK: mov #258, r14
@@ -48,7 +48,7 @@ entry:
 ; CHECK: mov #258, 6(r1)
 ; CHECK: mov #772, 4(r1)
 ; CHECK: mov #1286, 2(r1)
-; CHECK: mov #1800, 0(r1)
+; CHECK: mov #1800, @r1
 ; CHECK: mov #1, r12
 ; CHECK: mov #2, r13
 ; CHECK: call #f_i16_i64_i16
@@ -60,7 +60,7 @@ entry:
 ; CHECK: mov	#258, 6(r1)
 ; CHECK: mov	#772, 4(r1)
 ; CHECK: mov	#1286, 2(r1)
-; CHECK: mov	#1800, 0(r1)
+; CHECK: mov	#1800, @r1
 ; CHECK: mov	#1, r12
 ; CHECK: mov	#772, r13
 ; CHECK: mov	#258, r14
@@ -69,7 +69,7 @@ entry:
 ; CHECK: mov	#258, 6(r1)
 ; CHECK: mov	#772, 4(r1)
 ; CHECK: mov	#1286, 2(r1)
-; CHECK: mov	#1800, 0(r1)
+; CHECK: mov	#1800, @r1
 ; CHECK: mov	#1800, r12
 ; CHECK: mov	#1286, r13
 ; CHECK: mov	#772, r14
diff --git a/src/llvm/test/CodeGen/MSP430/jumptable.ll b/src/llvm/test/CodeGen/MSP430/jumptable.ll
@@ -8,7 +8,7 @@ define i16 @test(i16 %i) #0 {
 entry:
 ; CHECK-LABEL: test:
 ; CHECK:      sub   #4, r1
-; CHECK-NEXT: mov   r12, 0(r1)
+; CHECK-NEXT: mov   r12, @r1
 ; CHECK-NEXT: cmp   #4, r12
 ; CHECK-NEXT: jhs     .LBB0_3
   %retval = alloca i16, align 2
diff --git a/src/llvm/test/CodeGen/MSP430/struct-return.ll b/src/llvm/test/CodeGen/MSP430/struct-return.ll
@@ -16,7 +16,7 @@ define %s @fred() #0 {
 ; CHECK: mov	#258, 6(r12)
 ; CHECK: mov	#772, 4(r12)
 ; CHECK: mov	#1286, 2(r12)
-; CHECK: mov	#1800, 0(r12)
+; CHECK: mov	#1800, @r12
   ret %s {i64 72623859790382856, i64 651345242494996224}
 }
 
@@ -37,7 +37,7 @@ define void @test() #1 {
 
 define void @sret(%struct.S* noalias nocapture sret) #0 {
 ; CHECK-LABEL: sret:
-; CHECK: mov	&a, 0(r12)
+; CHECK: mov	&a, @r12
 ; CHECK: mov	&b, 2(r12)
 ; CHECK: mov	&c, 4(r12)
   %2 = getelementptr inbounds %struct.S, %struct.S* %0, i16 0, i32 0
diff --git a/src/llvm/test/CodeGen/MSP430/vararg.ll b/src/llvm/test/CodeGen/MSP430/vararg.ll
@@ -15,7 +15,7 @@ entry:
   %vl1 = bitcast i8** %vl to i8*
 ; CHECK-NEXT: mov r1, [[REG:r[0-9]+]]
 ; CHECK-NEXT: add #6, [[REG]]
-; CHECK-NEXT: mov [[REG]], 0(r1)
+; CHECK-NEXT: mov [[REG]], @r1
   call void @llvm.va_start(i8* %vl1)
   call void @llvm.va_end(i8* %vl1)
   ret void
@@ -28,9 +28,9 @@ entry:
   store i8* %vl, i8** %vl.addr, align 2
 ; CHECK: mov r12, [[REG:r[0-9]+]]
 ; CHECK-NEXT: incd [[REG]]
-; CHECK-NEXT: mov [[REG]], 0(r1)
+; CHECK-NEXT: mov [[REG]], @r1
   %0 = va_arg i8** %vl.addr, i16
-; CHECK-NEXT: mov 0(r12), r12
+; CHECK-NEXT: mov @r12, r12
   ret i16 %0
 }
 
@@ -43,7 +43,7 @@ entry:
   store i8* %vl, i8** %vl.addr, align 2
   %0 = bitcast i8** %vl2 to i8*
   %1 = bitcast i8** %vl.addr to i8*
-; CHECK-DAG: mov r12, 0(r1)
+; CHECK-DAG: mov r12, @r1
   call void @llvm.va_copy(i8* %0, i8* %1)
   ret void
 }
diff --git a/src/llvm/test/MC/MSP430/addrmode.s b/src/llvm/test/MC/MSP430/addrmode.s
@@ -27,7 +27,7 @@ foo:
 ; CHECK: mov #42, 12(r15)      ; encoding: [0xbf,0x40,0x2a,0x00,0x0c,0x00]
 ; CHECK: mov #42, &disp        ; encoding: [0xb2,0x40,0x2a,0x00,A,A]
 ; CHECK: mov disp, disp+2      ; encoding: [0x90,0x40,A,A,B,B]
-; CHECK: mov r7, 0(r15)        ; encoding: [0x8f,0x47,0x00,0x00]
+; CHECK: mov r7, @r15          ; encoding: [0x8f,0x47,0x00,0x00]
 
   add r7, r8
   add 6(r7), r8

Original file line number	Diff line number	Diff line change
`@@ -8,7 +8,7 @@ define i16 @am1(i16 %x, i16* %a) nounwind {`
`8`	`8`	`ret i16 %2`
`9`	`9`	`}`
`10`	`10`	`; CHECK-LABEL: am1:`
`11`		`-; CHECK: bis 0(r13), r12`
	`11`	`+; CHECK: bis @r13, r12`
`12`	`12`
`13`	`13`	`@foo = external global i16`
`14`	`14`
Original file line number	Diff line number	Diff line change
`@@ -9,7 +9,7 @@ define void @am1(i16* %a, i16 %x) nounwind {`
`9`	`9`	`ret void`
`10`	`10`	`}`
`11`	`11`	`; CHECK-LABEL: am1:`
`12`		`-; CHECK: bis r13, 0(r12)`
	`12`	`+; CHECK: bis r13, @r12`
`13`	`13`
`14`	`14`	`@foo = external global i16`
`15`	`15`
Original file line number	Diff line number	Diff line change
`@@ -7,7 +7,7 @@ define i16 @am1(i16* %a) nounwind {`
`7`	`7`	`ret i16 %1`
`8`	`8`	`}`
`9`	`9`	`; CHECK-LABEL: am1:`
`10`		`-; CHECK: mov 0(r12), r12`
	`10`	`+; CHECK: mov @r12, r12`
`11`	`11`
`12`	`12`	`@foo = external global i16`
`13`	`13`
Original file line number	Diff line number	Diff line change
`@@ -7,7 +7,7 @@ define void @am1(i16* %a, i16 %b) nounwind {`
`7`	`7`	`ret void`
`8`	`8`	`}`
`9`	`9`	`; CHECK-LABEL: am1:`
`10`		`-; CHECK: mov r13, 0(r12)`
	`10`	`+; CHECK: mov r13, @r12`
`11`	`11`
`12`	`12`	`@foo = external global i16`
`13`	`13`
Original file line number	Diff line number	Diff line change
`@@ -65,5 +65,5 @@ entry:`
`65`	`65`	`ret i16 %0`
`66`	`66`	`; CHECK-LABEL: mov2:`
`67`	`67`	`; CHECK-DAG: mov 2(r1), 6(r1)`
`68`		`-; CHECK-DAG: mov 0(r1), 4(r1)`
	`68`	`+; CHECK-DAG: mov @r1, 4(r1)`
`69`	`69`	`}`
Original file line number	Diff line number	Diff line change
`@@ -20,7 +20,7 @@ entry:`
`20`	`20`	`; CHECK-LABEL: caller:`
`21`	`21`	`; CHECK: mov &foo+4, 4(r1)`
`22`	`22`	`; CHECK-NEXT: mov &foo+2, 2(r1)`
`23`		`-; CHECK-NEXT: mov &foo, 0(r1)`
	`23`	`+; CHECK-NEXT: mov &foo, @r1`
`24`	`24`	`%call = call i16 @callee(%struct.Foo* byval @foo)`
`25`	`25`	`ret void`
`26`	`26`	`}`