Update rand requirement from 0.9 to 0.10

Author: loongs-zhang

core/src/coroutine/korosensei.rs

@@ -108,11 +108,11 @@ impl<'c, Param, Yield, Return> Coroutine<'c, Param, Yield, Return> {
                                 target_arch = "x86",
                             ))] {
                                 let TrapHandlerRegs { eip, esp, ebp, ecx, edx } = regs;
-                                context.uc_mcontext.gregs[usize::try_from(libc::REG_EIP).expect("overflow")] = u32::from_ne_bytes(eip.to_ne_bytes());
-                                context.uc_mcontext.gregs[usize::try_from(libc::REG_ESP).expect("overflow")] = u32::from_ne_bytes(esp.to_ne_bytes());
-                                context.uc_mcontext.gregs[usize::try_from(libc::REG_EBP).expect("overflow")] = u32::from_ne_bytes(ebp.to_ne_bytes());
-                                context.uc_mcontext.gregs[usize::try_from(libc::REG_ECX).expect("overflow")] = u32::from_ne_bytes(ecx.to_ne_bytes());
-                                context.uc_mcontext.gregs[usize::try_from(libc::REG_EDX).expect("overflow")] = u32::from_ne_bytes(edx.to_ne_bytes());
+                                context.uc_mcontext.gregs[usize::try_from(libc::REG_EIP).expect("overflow")] = i32::from_ne_bytes(eip.to_ne_bytes());
+                                context.uc_mcontext.gregs[usize::try_from(libc::REG_ESP).expect("overflow")] = i32::from_ne_bytes(esp.to_ne_bytes());
+                                context.uc_mcontext.gregs[usize::try_from(libc::REG_EBP).expect("overflow")] = i32::from_ne_bytes(ebp.to_ne_bytes());
+                                context.uc_mcontext.gregs[usize::try_from(libc::REG_ECX).expect("overflow")] = i32::from_ne_bytes(ecx.to_ne_bytes());
+                                context.uc_mcontext.gregs[usize::try_from(libc::REG_EDX).expect("overflow")] = i32::from_ne_bytes(edx.to_ne_bytes());
                             } else if #[cfg(all(target_vendor = "apple", target_arch = "x86_64"))] {
                                 let TrapHandlerRegs { rip, rsp, rbp, rdi, rsi } = regs;
                                 (*context.uc_mcontext).__ss.__rip = rip;