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Merge pull request #10992 from mikeysklar/magtag-fpc7519-vcom20-v2
MagTag SSD1680 contrast fix (FPC-7519rev.b only)
2 parents e512a25 + 83576c6 commit 6612dec

1 file changed

Lines changed: 46 additions & 4 deletions

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  • ports/espressif/boards/adafruit_magtag_2.9_grayscale

ports/espressif/boards/adafruit_magtag_2.9_grayscale/board.c

Lines changed: 46 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -128,6 +128,41 @@ const uint8_t ssd1680_display_start_sequence[] = {
128128
0x22, 0x00, 0x01, 0xc7 // display update mode
129129
};
130130

131+
// FPC-7519rev.b (User ID byte 0xca) requires lower VCOM for correct contrast.
132+
// VCOM=0x14 (-1.0V) confirmed by reading the panel's OTP register (cmd 0x2D, byte 1 = 0x14).
133+
// The 0x44 panel works correctly with the default VCOM=0x28, so keep them separate.
134+
const uint8_t ssd1680_vcom14_display_start_sequence[] = {
135+
0x12, DELAY, 0x00, 0x14, // soft reset and wait 20ms
136+
0x11, 0x00, 0x01, 0x03, // Ram data entry mode
137+
0x3c, 0x00, 0x01, 0x03, // border color
138+
0x2c, 0x00, 0x01, 0x14, // Set vcom voltage (0x14 = -1.0V, tuned for FPC-7519rev.b)
139+
0x03, 0x00, 0x01, 0x17, // Set gate voltage
140+
0x04, 0x00, 0x03, 0x41, 0xae, 0x32, // Set source voltage
141+
0x4e, 0x00, 0x01, 0x01, // ram x count
142+
0x4f, 0x00, 0x02, 0x00, 0x00, // ram y count
143+
0x01, 0x00, 0x03, 0x27, 0x01, 0x00, // set display size
144+
0x32, 0x00, 0x99, // Update waveforms
145+
0x2a, 0x60, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // VS L0
146+
0x20, 0x60, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // VS L1
147+
0x28, 0x60, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // VS L2
148+
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // VS L3
149+
0x00, 0x90, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // VS L4
150+
0x00, 0x02, 0x00, 0x05, 0x14, 0x00, 0x00, // TP, SR, RP of Group0
151+
0x1E, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x01, // TP, SR, RP of Group1
152+
0x00, 0x02, 0x00, 0x05, 0x14, 0x00, 0x00, // TP, SR, RP of Group2
153+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // TP, SR, RP of Group3
154+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // TP, SR, RP of Group4
155+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // TP, SR, RP of Group5
156+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // TP, SR, RP of Group6
157+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // TP, SR, RP of Group7
158+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // TP, SR, RP of Group8
159+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // TP, SR, RP of Group9
160+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // TP, SR, RP of Group10
161+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // TP, SR, RP of Group11
162+
0x24, 0x22, 0x22, 0x22, 0x23, 0x32, 0x00, 0x00, 0x00, // FR, XON
163+
0x22, 0x00, 0x01, 0xc7 // display update mode
164+
};
165+
131166
const uint8_t ssd1680_display_stop_sequence[] = {
132167
0x10, DELAY, 0x01, 0x01, 0x64
133168
};
@@ -141,6 +176,7 @@ typedef enum {
141176
DISPLAY_IL0373,
142177
DISPLAY_SSD1680_COLSTART_0,
143178
DISPLAY_SSD1680_COLSTART_8,
179+
DISPLAY_SSD1680_COLSTART_8_VCOM14, // FPC-7519rev.b (User ID 0xca)
144180
} display_type_t;
145181

146182
static display_type_t detect_display_type(void) {
@@ -218,8 +254,9 @@ static display_type_t detect_display_type(void) {
218254
case 0x00:
219255
return DISPLAY_SSD1680_COLSTART_0;
220256
case 0x44:
221-
case 0xca:
222257
return DISPLAY_SSD1680_COLSTART_8;
258+
case 0xca:
259+
return DISPLAY_SSD1680_COLSTART_8_VCOM14;
223260
}
224261
}
225262

@@ -268,12 +305,17 @@ void board_init(void) {
268305
} else {
269306
epaperdisplay_construct_args_t args = EPAPERDISPLAY_CONSTRUCT_ARGS_DEFAULTS;
270307
// Default colstart is 0.
271-
if (display_type == DISPLAY_SSD1680_COLSTART_8) {
308+
if (display_type == DISPLAY_SSD1680_COLSTART_8 || display_type == DISPLAY_SSD1680_COLSTART_8_VCOM14) {
272309
args.colstart = 8;
273310
}
274311
args.bus = bus;
275-
args.start_sequence = ssd1680_display_start_sequence;
276-
args.start_sequence_len = sizeof(ssd1680_display_start_sequence);
312+
if (display_type == DISPLAY_SSD1680_COLSTART_8_VCOM14) {
313+
args.start_sequence = ssd1680_vcom14_display_start_sequence;
314+
args.start_sequence_len = sizeof(ssd1680_vcom14_display_start_sequence);
315+
} else {
316+
args.start_sequence = ssd1680_display_start_sequence;
317+
args.start_sequence_len = sizeof(ssd1680_display_start_sequence);
318+
}
277319
args.stop_sequence = ssd1680_display_stop_sequence;
278320
args.stop_sequence_len = sizeof(ssd1680_display_stop_sequence);
279321
args.width = 296;

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