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MagTag SSD1680 contrast fix (FPC-7519rev.b) - backport to 10.2.x
1 parent 0d8d219 commit 7df5b66

1 file changed

Lines changed: 46 additions & 3 deletions

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  • ports/espressif/boards/adafruit_magtag_2.9_grayscale

ports/espressif/boards/adafruit_magtag_2.9_grayscale/board.c

Lines changed: 46 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -127,6 +127,41 @@ const uint8_t ssd1680_display_start_sequence[] = {
127127
0x22, 0x00, 0x01, 0xc7 // display update mode
128128
};
129129

130+
// FPC-7519rev.b (User ID byte 0xca) requires lower VCOM for correct contrast.
131+
// VCOM=0x14 (-1.0V) confirmed by reading the panel's OTP register (cmd 0x2D, byte 1 = 0x14).
132+
// The 0x44 panel works correctly with the default VCOM=0x28, so keep them separate.
133+
const uint8_t ssd1680_vcom14_display_start_sequence[] = {
134+
0x12, DELAY, 0x00, 0x14, // soft reset and wait 20ms
135+
0x11, 0x00, 0x01, 0x03, // Ram data entry mode
136+
0x3c, 0x00, 0x01, 0x03, // border color
137+
0x2c, 0x00, 0x01, 0x14, // Set vcom voltage (0x14 = -1.0V, tuned for FPC-7519rev.b)
138+
0x03, 0x00, 0x01, 0x17, // Set gate voltage
139+
0x04, 0x00, 0x03, 0x41, 0xae, 0x32, // Set source voltage
140+
0x4e, 0x00, 0x01, 0x01, // ram x count
141+
0x4f, 0x00, 0x02, 0x00, 0x00, // ram y count
142+
0x01, 0x00, 0x03, 0x27, 0x01, 0x00, // set display size
143+
0x32, 0x00, 0x99, // Update waveforms
144+
0x2a, 0x60, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // VS L0
145+
0x20, 0x60, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // VS L1
146+
0x28, 0x60, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // VS L2
147+
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // VS L3
148+
0x00, 0x90, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // VS L4
149+
0x00, 0x02, 0x00, 0x05, 0x14, 0x00, 0x00, // TP, SR, RP of Group0
150+
0x1E, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x01, // TP, SR, RP of Group1
151+
0x00, 0x02, 0x00, 0x05, 0x14, 0x00, 0x00, // TP, SR, RP of Group2
152+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // TP, SR, RP of Group3
153+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // TP, SR, RP of Group4
154+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // TP, SR, RP of Group5
155+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // TP, SR, RP of Group6
156+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // TP, SR, RP of Group7
157+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // TP, SR, RP of Group8
158+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // TP, SR, RP of Group9
159+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // TP, SR, RP of Group10
160+
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // TP, SR, RP of Group11
161+
0x24, 0x22, 0x22, 0x22, 0x23, 0x32, 0x00, 0x00, 0x00, // FR, XON
162+
0x22, 0x00, 0x01, 0xc7 // display update mode
163+
};
164+
130165
const uint8_t ssd1680_display_stop_sequence[] = {
131166
0x10, DELAY, 0x01, 0x01, 0x64
132167
};
@@ -140,6 +175,7 @@ typedef enum {
140175
DISPLAY_IL0373,
141176
DISPLAY_SSD1680_COLSTART_0,
142177
DISPLAY_SSD1680_COLSTART_8,
178+
DISPLAY_SSD1680_COLSTART_8_VCOM14, // FPC-7519rev.b (User ID 0xca)
143179
} display_type_t;
144180

145181
static display_type_t detect_display_type(void) {
@@ -214,6 +250,8 @@ static display_type_t detect_display_type(void) {
214250
return DISPLAY_SSD1680_COLSTART_0;
215251
case 0x44:
216252
return DISPLAY_SSD1680_COLSTART_8;
253+
case 0xca:
254+
return DISPLAY_SSD1680_COLSTART_8_VCOM14;
217255
}
218256
}
219257

@@ -262,12 +300,17 @@ void board_init(void) {
262300
} else {
263301
epaperdisplay_construct_args_t args = EPAPERDISPLAY_CONSTRUCT_ARGS_DEFAULTS;
264302
// Default colstart is 0.
265-
if (display_type == DISPLAY_SSD1680_COLSTART_8) {
303+
if (display_type == DISPLAY_SSD1680_COLSTART_8 || display_type == DISPLAY_SSD1680_COLSTART_8_VCOM14) {
266304
args.colstart = 8;
267305
}
268306
args.bus = bus;
269-
args.start_sequence = ssd1680_display_start_sequence;
270-
args.start_sequence_len = sizeof(ssd1680_display_start_sequence);
307+
if (display_type == DISPLAY_SSD1680_COLSTART_8_VCOM14) {
308+
args.start_sequence = ssd1680_vcom14_display_start_sequence;
309+
args.start_sequence_len = sizeof(ssd1680_vcom14_display_start_sequence);
310+
} else {
311+
args.start_sequence = ssd1680_display_start_sequence;
312+
args.start_sequence_len = sizeof(ssd1680_display_start_sequence);
313+
}
271314
args.stop_sequence = ssd1680_display_stop_sequence;
272315
args.stop_sequence_len = sizeof(ssd1680_display_stop_sequence);
273316
args.width = 296;

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