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[Clang][AArch64][SVE2p3][SME2p3] Add intrinsics for v9.7a Two-way signed/unsigned absolute difference sum and accumulate long ops
Add the following new clang intrinsics based on the ACLE specification ARM-software/acle#428 (Add alpha support for 9.7 data processing intrinsics) SABAL (Two-way signed absolute difference sum and accumulate long) - svint16_t svabal[_s16](svint16_t, svint8_t, svint8_t) / svint16_t svabal[_n_s16](svint16_t, svint8_t, int8_t) - svint32_t svabal[_s32](svint32_t, svint16_t, svint16_t) / svint32_t svabal[_n_s32](svint32_t, svint16_t, int16_t) - svint64_t svabal[_s64](svint64_t, svint32_t, svint32_t) / svint64_t svabal[_n_s64](svint64_t, svint32_t, int32_t) UABAL (Two-way unsigned absolute difference sum and accumulate long ) - svuint16_t svabal[_u16](svuint16_t, svuint8_t, svuint8_t) / svuint16_t svabal[_n_u16](svuint16_t, svuint8_t, uint8_t) - svuint32_t svabal[_u32](svuint32_t, svuint16_t, svuint16_t) / svuint32_t svabal[_n_u32](svuint32_t, svuint16_t, uint16_t) - svuint64_t svabal[_u64](svuint64_t, svuint32_t, svuint32_t) / svuint64_t svabal[_n_u64](svuint64_t, svuint32_t, uint32_t)
1 parent bb3d251 commit 2809d82

8 files changed

Lines changed: 757 additions & 3 deletions

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‎clang/include/clang/Basic/arm_sve.td‎

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@@ -1342,6 +1342,17 @@ defm SVRECPE : SInstZPZ<"svrecpe", "Ui", "aarch64_sve_urecpe">;
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defm SVRSQRTE : SInstZPZ<"svrsqrte", "Ui", "aarch64_sve_ursqrte">;
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}
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////////////////////////////////////////////////////////////////////////////////
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// SVE2.3 - Two-way signed/unsigned absolute difference sum and accumulate long
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let SVETargetGuard = "sve2p3|sme2p3", SMETargetGuard = "sve2p3|sme2p3" in {
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def SVABAL_S : SInst<"svabal[_{d}]", "ddhh", "sil" , MergeNone, "aarch64_sve_sabal", [VerifyRuntimeMode]>;
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def SVABAL_S_N : SInst<"svabal[_n_{d}]", "ddhR", "sil" , MergeNone, "aarch64_sve_sabal", [VerifyRuntimeMode]>;
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def SVABAL_U : SInst<"svabal[_{d}]", "ddhh", "UsUiUl", MergeNone, "aarch64_sve_uabal", [VerifyRuntimeMode]>;
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def SVABAL_U_N : SInst<"svabal[_n_{d}]", "ddhR", "UsUiUl", MergeNone, "aarch64_sve_uabal", [VerifyRuntimeMode]>;
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}
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//------------------------------------------------------------------------------
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multiclass SInstZPZxZ<string name, string types, string pat_v, string pat_n, string m_intrinsic, string x_intrinsic, list<FlagType> flags=[]> {

‎clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_svabal.c‎

Lines changed: 479 additions & 0 deletions
Large diffs are not rendered by default.

‎clang/test/Sema/AArch64/arm_sve_feature_dependent_sve_AND_LP_sve2p3_OR_sme2p3_RP___sme_AND_LP_sve2p3_OR_sme2p3_RP.c‎

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@@ -0,0 +1,136 @@
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// NOTE: File has been autogenerated by utils/aarch64_builtins_test_generator.py
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// RUN: %clang_cc1 %s -fsyntax-only -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -target-feature +sve2p3 -verify
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// RUN: %clang_cc1 %s -fsyntax-only -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sme2p3 -target-feature +sve -verify
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// expected-no-diagnostics
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// REQUIRES: aarch64-registered-target
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#include <arm_sve.h>
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// Properties: guard="sve,(sve2p3|sme2p3)" streaming_guard="sme,(sve2p3|sme2p3)" flags="feature-dependent"
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void test(void) {
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int8_t int8_t_val;
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int16_t int16_t_val;
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int32_t int32_t_val;
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svint8_t svint8_t_val;
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svint16_t svint16_t_val;
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svint32_t svint32_t_val;
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svint64_t svint64_t_val;
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svuint8_t svuint8_t_val;
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svuint16_t svuint16_t_val;
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svuint32_t svuint32_t_val;
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svuint64_t svuint64_t_val;
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uint8_t uint8_t_val;
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uint16_t uint16_t_val;
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uint32_t uint32_t_val;
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svabal(svint16_t_val, svint8_t_val, int8_t_val);
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svabal(svint16_t_val, svint8_t_val, svint8_t_val);
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svabal(svint32_t_val, svint16_t_val, int16_t_val);
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svabal(svint32_t_val, svint16_t_val, svint16_t_val);
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svabal(svint64_t_val, svint32_t_val, int32_t_val);
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svabal(svint64_t_val, svint32_t_val, svint32_t_val);
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svabal(svuint16_t_val, svuint8_t_val, svuint8_t_val);
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svabal(svuint16_t_val, svuint8_t_val, uint8_t_val);
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svabal(svuint32_t_val, svuint16_t_val, svuint16_t_val);
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svabal(svuint32_t_val, svuint16_t_val, uint16_t_val);
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svabal(svuint64_t_val, svuint32_t_val, svuint32_t_val);
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svabal(svuint64_t_val, svuint32_t_val, uint32_t_val);
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svabal_n_s16(svint16_t_val, svint8_t_val, int8_t_val);
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svabal_n_s32(svint32_t_val, svint16_t_val, int16_t_val);
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svabal_n_s64(svint64_t_val, svint32_t_val, int32_t_val);
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svabal_n_u16(svuint16_t_val, svuint8_t_val, uint8_t_val);
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svabal_n_u32(svuint32_t_val, svuint16_t_val, uint16_t_val);
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svabal_n_u64(svuint64_t_val, svuint32_t_val, uint32_t_val);
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svabal_s16(svint16_t_val, svint8_t_val, svint8_t_val);
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svabal_s32(svint32_t_val, svint16_t_val, svint16_t_val);
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svabal_s64(svint64_t_val, svint32_t_val, svint32_t_val);
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svabal_u16(svuint16_t_val, svuint8_t_val, svuint8_t_val);
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svabal_u32(svuint32_t_val, svuint16_t_val, svuint16_t_val);
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svabal_u64(svuint64_t_val, svuint32_t_val, svuint32_t_val);
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}
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void test_streaming(void) __arm_streaming{
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int8_t int8_t_val;
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int16_t int16_t_val;
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int32_t int32_t_val;
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svint8_t svint8_t_val;
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svint16_t svint16_t_val;
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svint32_t svint32_t_val;
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svint64_t svint64_t_val;
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svuint8_t svuint8_t_val;
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svuint16_t svuint16_t_val;
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svuint32_t svuint32_t_val;
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svuint64_t svuint64_t_val;
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uint8_t uint8_t_val;
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uint16_t uint16_t_val;
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uint32_t uint32_t_val;
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svabal(svint16_t_val, svint8_t_val, int8_t_val);
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svabal(svint16_t_val, svint8_t_val, svint8_t_val);
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svabal(svint32_t_val, svint16_t_val, int16_t_val);
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svabal(svint32_t_val, svint16_t_val, svint16_t_val);
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svabal(svint64_t_val, svint32_t_val, int32_t_val);
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svabal(svint64_t_val, svint32_t_val, svint32_t_val);
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svabal(svuint16_t_val, svuint8_t_val, svuint8_t_val);
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svabal(svuint16_t_val, svuint8_t_val, uint8_t_val);
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svabal(svuint32_t_val, svuint16_t_val, svuint16_t_val);
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svabal(svuint32_t_val, svuint16_t_val, uint16_t_val);
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svabal(svuint64_t_val, svuint32_t_val, svuint32_t_val);
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svabal(svuint64_t_val, svuint32_t_val, uint32_t_val);
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svabal_n_s16(svint16_t_val, svint8_t_val, int8_t_val);
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svabal_n_s32(svint32_t_val, svint16_t_val, int16_t_val);
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svabal_n_s64(svint64_t_val, svint32_t_val, int32_t_val);
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svabal_n_u16(svuint16_t_val, svuint8_t_val, uint8_t_val);
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svabal_n_u32(svuint32_t_val, svuint16_t_val, uint16_t_val);
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svabal_n_u64(svuint64_t_val, svuint32_t_val, uint32_t_val);
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svabal_s16(svint16_t_val, svint8_t_val, svint8_t_val);
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svabal_s32(svint32_t_val, svint16_t_val, svint16_t_val);
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svabal_s64(svint64_t_val, svint32_t_val, svint32_t_val);
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svabal_u16(svuint16_t_val, svuint8_t_val, svuint8_t_val);
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svabal_u32(svuint32_t_val, svuint16_t_val, svuint16_t_val);
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svabal_u64(svuint64_t_val, svuint32_t_val, svuint32_t_val);
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}
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void test_streaming_compatible(void) __arm_streaming_compatible{
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int8_t int8_t_val;
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int16_t int16_t_val;
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int32_t int32_t_val;
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svint8_t svint8_t_val;
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svint16_t svint16_t_val;
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svint32_t svint32_t_val;
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svint64_t svint64_t_val;
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svuint8_t svuint8_t_val;
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svuint16_t svuint16_t_val;
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svuint32_t svuint32_t_val;
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svuint64_t svuint64_t_val;
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uint8_t uint8_t_val;
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uint16_t uint16_t_val;
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uint32_t uint32_t_val;
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svabal(svint16_t_val, svint8_t_val, int8_t_val);
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svabal(svint16_t_val, svint8_t_val, svint8_t_val);
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svabal(svint32_t_val, svint16_t_val, int16_t_val);
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svabal(svint32_t_val, svint16_t_val, svint16_t_val);
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svabal(svint64_t_val, svint32_t_val, int32_t_val);
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svabal(svint64_t_val, svint32_t_val, svint32_t_val);
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svabal(svuint16_t_val, svuint8_t_val, svuint8_t_val);
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svabal(svuint16_t_val, svuint8_t_val, uint8_t_val);
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svabal(svuint32_t_val, svuint16_t_val, svuint16_t_val);
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svabal(svuint32_t_val, svuint16_t_val, uint16_t_val);
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svabal(svuint64_t_val, svuint32_t_val, svuint32_t_val);
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svabal(svuint64_t_val, svuint32_t_val, uint32_t_val);
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svabal_n_s16(svint16_t_val, svint8_t_val, int8_t_val);
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svabal_n_s32(svint32_t_val, svint16_t_val, int16_t_val);
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svabal_n_s64(svint64_t_val, svint32_t_val, int32_t_val);
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svabal_n_u16(svuint16_t_val, svuint8_t_val, uint8_t_val);
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svabal_n_u32(svuint32_t_val, svuint16_t_val, uint16_t_val);
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svabal_n_u64(svuint64_t_val, svuint32_t_val, uint32_t_val);
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svabal_s16(svint16_t_val, svint8_t_val, svint8_t_val);
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svabal_s32(svint32_t_val, svint16_t_val, svint16_t_val);
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svabal_s64(svint64_t_val, svint32_t_val, svint32_t_val);
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svabal_u16(svuint16_t_val, svuint8_t_val, svuint8_t_val);
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svabal_u32(svuint32_t_val, svuint16_t_val, svuint16_t_val);
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svabal_u64(svuint64_t_val, svuint32_t_val, svuint32_t_val);
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}

‎clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3.cpp‎

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// REQUIRES: aarch64-registered-target
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -verify -verify-ignore-unexpected=error,note -emit-llvm -o - %s
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// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -verify=overload -verify-ignore-unexpected=error,note -emit-llvm -o - %s
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#include <arm_sve.h>
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#ifdef SVE_OVERLOADED_FORMS
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// A simple used,unused... macro, long enough to represent any SVE builtin.
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#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3_UNUSED) A1
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#else
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#define SVE_ACLE_FUNC(A1,A2,A3) A1##A2##A3
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#endif
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void test_svabal(int8_t s8, int16_t s16, int32_t s32, uint8_t u8, uint16_t u16, uint32_t u32)
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{
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// expected-error@+2 {{'svabal_s64' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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// overload-error@+1 {{'svabal' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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SVE_ACLE_FUNC(svabal,,_s64)(svundef_s64(), svundef_s32(), svundef_s32());
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// expected-error@+2 {{'svabal_n_s64' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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// overload-error@+1 {{'svabal' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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SVE_ACLE_FUNC(svabal,_n,_s64)(svundef_s64(), svundef_s32(), s32);
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// expected-error@+2 {{'svabal_s32' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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// overload-error@+1 {{'svabal' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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SVE_ACLE_FUNC(svabal,,_s32)(svundef_s32(), svundef_s16(), svundef_s16());
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// expected-error@+2 {{'svabal_n_s32' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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// overload-error@+1 {{'svabal' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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SVE_ACLE_FUNC(svabal,_n,_s32)(svundef_s32(), svundef_s16(), s16);
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// expected-error@+2 {{'svabal_s16' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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// overload-error@+1 {{'svabal' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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SVE_ACLE_FUNC(svabal,,_s16)(svundef_s16(), svundef_s8(), svundef_s8());
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// expected-error@+2 {{'svabal_n_s16' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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// overload-error@+1 {{'svabal' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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SVE_ACLE_FUNC(svabal,_n,_s16)(svundef_s16(), svundef_s8(), s8);
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// expected-error@+2 {{'svabal_u64' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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// overload-error@+1 {{'svabal' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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SVE_ACLE_FUNC(svabal,,_u64)(svundef_u64(), svundef_u32(), svundef_u32());
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// expected-error@+2 {{'svabal_n_u64' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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// overload-error@+1 {{'svabal' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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SVE_ACLE_FUNC(svabal,_n,_u64)(svundef_u64(), svundef_u32(), u32);
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// expected-error@+2 {{'svabal_u32' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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// overload-error@+1 {{'svabal' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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SVE_ACLE_FUNC(svabal,,_u32)(svundef_u32(), svundef_u16(), svundef_u16());
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// expected-error@+2 {{'svabal_n_u32' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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// overload-error@+1 {{'svabal' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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SVE_ACLE_FUNC(svabal,_n,_u32)(svundef_u32(), svundef_u16(), u16);
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// expected-error@+2 {{'svabal_u16' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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// overload-error@+1 {{'svabal' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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SVE_ACLE_FUNC(svabal,,_u16)(svundef_u16(), svundef_u8(), svundef_u8());
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// expected-error@+2 {{'svabal_n_u16' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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// overload-error@+1 {{'svabal' needs target feature (sve,(sve2p3|sme2p3))|(sme,(sve2p3|sme2p3))}}
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SVE_ACLE_FUNC(svabal,_n,_u16)(svundef_u16(), svundef_u8(), u8);
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}

‎llvm/include/llvm/IR/IntrinsicsAArch64.td‎

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Original file line numberDiff line numberDiff line change
@@ -2458,6 +2458,8 @@ def int_aarch64_sve_stnt1_scatter_scalar_offset : AdvSIMD_ScatterStore_VS_Intri
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//
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def int_aarch64_sve_saba : AdvSIMD_3VectorArg_Intrinsic<[IntrSpeculatable]>;
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def int_aarch64_sve_sabal : SVE2_3VectorArg_Long_Intrinsic<[IntrSpeculatable]>;
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def int_aarch64_sve_uabal : SVE2_3VectorArg_Long_Intrinsic<[IntrSpeculatable]>;
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def int_aarch64_sve_shadd : AdvSIMD_Pred2VectorArg_Intrinsic<[IntrSpeculatable]>;
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def int_aarch64_sve_shsub : AdvSIMD_Pred2VectorArg_Intrinsic<[IntrSpeculatable]>;
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def int_aarch64_sve_shsub_u : AdvSIMD_Pred2VectorArg_Intrinsic<[IntrSpeculatable]>;

‎llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4841,8 +4841,8 @@ let Predicates = [HasSVE2p3_or_SME2p3] in {
48414841
defm SUBP_ZPmZZ : sve2_int_arith_pred<0b100001, "subp", null_frag>;
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48434843
// SVE2 integer absolute difference and accumulate long
4844-
defm SABAL_ZZZ : sve2_int_two_way_absdiff_accum_long<0b0, "sabal">;
4845-
defm UABAL_ZZZ : sve2_int_two_way_absdiff_accum_long<0b1, "uabal">;
4844+
defm SABAL_ZZZ : sve2_int_two_way_absdiff_accum_long<0b0, "sabal", int_aarch64_sve_sabal>;
4845+
defm UABAL_ZZZ : sve2_int_two_way_absdiff_accum_long<0b1, "uabal", int_aarch64_sve_uabal>;
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48474847
// SVE2 integer dot product
48484848
def SDOT_ZZZ_BtoH : sve_intx_dot<0b01, 0b00000, 0b0, "sdot", ZPR16, ZPR8>;

‎llvm/lib/Target/AArch64/SVEInstrFormats.td‎

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4695,10 +4695,15 @@ multiclass sve2_int_absdiff_accum_long<bits<2> opc, string asm,
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def : SVE_3_Op_Pat<nxv2i64, op, nxv2i64, nxv4i32, nxv4i32, !cast<Instruction>(NAME # _D)>;
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}
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multiclass sve2_int_two_way_absdiff_accum_long<bit U, string asm> {
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multiclass sve2_int_two_way_absdiff_accum_long<bit U, string asm,
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SDPatternOperator op> {
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def _BtoH : sve2_int_absdiff_accum<0b001, { 0b01, U, 0b1 }, asm, ZPR16, ZPR8>;
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def _HtoS : sve2_int_absdiff_accum<0b010, { 0b01, U, 0b1 }, asm, ZPR32, ZPR16>;
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def _StoD : sve2_int_absdiff_accum<0b011, { 0b01, U, 0b1 }, asm, ZPR64, ZPR32>;
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def : SVE_3_Op_Pat<nxv8i16, op, nxv8i16, nxv16i8, nxv16i8, !cast<Instruction>(NAME # _BtoH)>;
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def : SVE_3_Op_Pat<nxv4i32, op, nxv4i32, nxv8i16, nxv8i16, !cast<Instruction>(NAME # _HtoS)>;
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def : SVE_3_Op_Pat<nxv2i64, op, nxv2i64, nxv4i32, nxv4i32, !cast<Instruction>(NAME # _StoD)>;
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}
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multiclass sve2_int_addsub_long_carry<bits<2> opc, string asm,

‎llvm/test/CodeGen/AArch64/sve2p3-intrinsics/sve2p3-intrinsics-abal.ll‎

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2p3 -enable-subreg-liveness -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme2p3 -enable-subreg-liveness -force-streaming -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme,+sve2p3 -enable-subreg-liveness -force-streaming -verify-machineinstrs < %s | FileCheck %s
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define <vscale x 8 x i16> @test_svabal_s16(<vscale x 8 x i16> %zda, <vscale x 16 x i8> %zn, <vscale x 16 x i8> %zm) {
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; CHECK-LABEL: test_svabal_s16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sabal z0.h, z1.b, z1.b
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; CHECK-NEXT: ret
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%res = call <vscale x 8 x i16> @llvm.aarch64.sve.sabal.nxv8i16(<vscale x 8 x i16> %zda, <vscale x 16 x i8> %zn, <vscale x 16 x i8> %zn)
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ret <vscale x 8 x i16> %res
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}
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define <vscale x 4 x i32> @test_svabal_s32(<vscale x 4 x i32> %zda, <vscale x 8 x i16> %zn, <vscale x 8 x i16> %zm) {
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; CHECK-LABEL: test_svabal_s32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sabal z0.s, z1.h, z1.h
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; CHECK-NEXT: ret
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%res = call <vscale x 4 x i32> @llvm.aarch64.sve.sabal.nxv4i32(<vscale x 4 x i32> %zda, <vscale x 8 x i16> %zn, <vscale x 8 x i16> %zn)
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ret <vscale x 4 x i32> %res
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}
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define <vscale x 2 x i64> @test_svabal_s64(<vscale x 2 x i64> %zda, <vscale x 4 x i32> %zn, <vscale x 4 x i32> %zm) {
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; CHECK-LABEL: test_svabal_s64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sabal z0.d, z1.s, z1.s
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; CHECK-NEXT: ret
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%res = call <vscale x 2 x i64> @llvm.aarch64.sve.sabal.nxv2i64(<vscale x 2 x i64> %zda, <vscale x 4 x i32> %zn, <vscale x 4 x i32> %zn)
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ret <vscale x 2 x i64> %res
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}
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define <vscale x 8 x i16> @test_svabal_u16(<vscale x 8 x i16> %zda, <vscale x 16 x i8> %zn, <vscale x 16 x i8> %zm) {
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; CHECK-LABEL: test_svabal_u16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: uabal z0.h, z1.b, z1.b
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; CHECK-NEXT: ret
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%res = call <vscale x 8 x i16> @llvm.aarch64.sve.uabal.nxv8i16(<vscale x 8 x i16> %zda, <vscale x 16 x i8> %zn, <vscale x 16 x i8> %zn)
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ret <vscale x 8 x i16> %res
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}
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define <vscale x 4 x i32> @test_svabal_u32(<vscale x 4 x i32> %zda, <vscale x 8 x i16> %zn, <vscale x 8 x i16> %zm) {
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; CHECK-LABEL: test_svabal_u32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: uabal z0.s, z1.h, z1.h
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; CHECK-NEXT: ret
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%res = call <vscale x 4 x i32> @llvm.aarch64.sve.uabal.nxv4i32(<vscale x 4 x i32> %zda, <vscale x 8 x i16> %zn, <vscale x 8 x i16> %zn)
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ret <vscale x 4 x i32> %res
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}
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define <vscale x 2 x i64> @test_svabal_u64(<vscale x 2 x i64> %zda, <vscale x 4 x i32> %zn, <vscale x 4 x i32> %zm) {
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; CHECK-LABEL: test_svabal_u64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: uabal z0.d, z1.s, z1.s
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; CHECK-NEXT: ret
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%res = call <vscale x 2 x i64> @llvm.aarch64.sve.uabal.nxv2i64(<vscale x 2 x i64> %zda, <vscale x 4 x i32> %zn, <vscale x 4 x i32> %zn)
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ret <vscale x 2 x i64> %res
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}

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