Add RISC-V architecture support

This commit adds full support for RISC-V 64-bit architecture to brpc.

Changes include:
- Add RISC-V atomic operations implementation
- Add RISC-V architecture detection in build system
- Add RISC-V context switching (bthread support)
- Add RISC-V clock cycle counter support (rdcycle)
- Update CMake and Makefile for RISC-V compilation

All core functionalities have been tested and verified in QEMU RISC-V
environment, including:
- Atomic operations (32-bit and 64-bit)
- Memory barriers
- Context switching
- Clock cycle counting

Co-authored-by: gong-flying <gongxiaofei24@iscas.ac.cn>

Author: Dayuxiaoshui

CMakeLists.txt

@@ -170,6 +170,9 @@ if(CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
     elseif((CMAKE_SYSTEM_PROCESSOR MATCHES "aarch64"))
         # segmentation fault in libcontext
         set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -fno-gcse")
+    elseif((CMAKE_SYSTEM_PROCESSOR MATCHES "riscv64"))
+        # RISC-V specific optimizations
+        set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=rv64gc")
     endif()
     if(NOT (CMAKE_CXX_COMPILER_VERSION VERSION_LESS 7.0))
         set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wno-aligned-new")

Makefile

@@ -44,6 +44,10 @@ ifeq ($(shell test $(GCC_VERSION) -ge 40400; echo $$?),0)
     CXXFLAGS+=-msse4 -msse4.2
   endif
 endif
+# RISC-V specific optimizations
+ifeq ($(shell uname -m),riscv64)
+  CXXFLAGS+=-march=rv64gc
+endif
 #not solved yet
 ifeq ($(CC),gcc)
   ifeq ($(shell test $(GCC_VERSION) -ge 70000; echo $$?),0)