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raiden00plraiden00pl
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boards/arm/stm32f7: switch board common to boards/arm/common/stm32
switch stm32f7 board common to boards/arm/common/stm32. Move the STM32F7-only board-common features into the shared directory so they are available to every STM32 family: - bmi270, cs4344, can_setup, cansock_setup, reset, romfs_initialize and spitest - the duplicate stm32_bh1750 is removed (already present in common). Signed-off-by: raiden00pl <raiden00@railab.me>
1 parent 64d89eb commit 08fef3a

24 files changed

Lines changed: 270 additions & 510 deletions

‎boards/Kconfig‎

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -5206,10 +5206,7 @@ endif
52065206
if ARCH_CHIP_SAMV7
52075207
source "boards/arm/samv7/common/Kconfig"
52085208
endif
5209-
if ARCH_CHIP_STM32F7
5210-
source "boards/arm/stm32f7/common/Kconfig"
5211-
endif
5212-
if ARCH_CHIP_STM32C0 || ARCH_CHIP_STM32F0 || ARCH_CHIP_STM32F1 || ARCH_CHIP_STM32F2 || ARCH_CHIP_STM32F3 || ARCH_CHIP_STM32F4 || ARCH_CHIP_STM32G0 || ARCH_CHIP_STM32G4 || ARCH_CHIP_STM32L0 || ARCH_CHIP_STM32L1
5209+
if ARCH_CHIP_STM32C0 || ARCH_CHIP_STM32F0 || ARCH_CHIP_STM32F1 || ARCH_CHIP_STM32F2 || ARCH_CHIP_STM32F3 || ARCH_CHIP_STM32F4 || ARCH_CHIP_STM32F7 || ARCH_CHIP_STM32G0 || ARCH_CHIP_STM32G4 || ARCH_CHIP_STM32L0 || ARCH_CHIP_STM32L1
52135210
source "boards/arm/common/stm32/Kconfig"
52145211
endif
52155212
if ARCH_CHIP_RP2040

‎boards/arm/common/stm32/Kconfig‎

Lines changed: 176 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -69,3 +69,179 @@ config BOARD_STM32_HALL3PHASE_SAMPLES
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default 10
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7171
endif # SENSORS_HALL3PHASE
72+
73+
config STM32_ROMFS
74+
bool "Automount baked-in ROMFS image"
75+
default n
76+
depends on FS_ROMFS
77+
---help---
78+
Select STM32_ROMFS_IMAGEFILE, STM32_ROMFS_DEV_MINOR, STM32_ROMFS_MOUNTPOINT
79+
80+
config STM32_ROMFS_DEV_MINOR
81+
int "Minor for the block device backing the data"
82+
depends on STM32_ROMFS
83+
default 64
84+
85+
config STM32_ROMFS_MOUNTPOINT
86+
string "Mountpoint of the custom romfs image"
87+
depends on STM32_ROMFS
88+
default "/rom"
89+
90+
config STM32_ROMFS_IMAGEFILE
91+
string "ROMFS image file to include into build"
92+
depends on STM32_ROMFS
93+
default "../../../rom.img"
94+
95+
config STM32_SPI_TEST
96+
bool "Enable SPI test"
97+
default n
98+
---help---
99+
Enable Spi test - initialize and configure SPI to send
100+
STM32_SPI_TEST_MESSAGE text. The text is sent on the
101+
selected SPI Buses with the configured parameters.
102+
Note the CS lines will not be asserted.
103+
104+
if STM32_SPI_TEST
105+
106+
config STM32_SPI_TEST_MESSAGE
107+
string "Text to Send on SPI Bus(es)"
108+
default "Hello World"
109+
depends on STM32_SPI_TEST
110+
---help---
111+
Text to sent on SPI bus(es)
112+
113+
config STM32_SPI1_TEST
114+
bool "Test SPI bus 1"
115+
default n
116+
depends on STM32_SPI_TEST
117+
---help---
118+
Enable Spi test - on SPI BUS 1
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120+
if STM32_SPI1_TEST
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122+
config STM32_SPI1_TEST_FREQ
123+
int "SPI 1 Clock Freq in Hz"
124+
default 1000000
125+
depends on STM32_SPI1_TEST
126+
---help---
127+
Sets SPI 1 Clock Freq
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config STM32_SPI1_TEST_BITS
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int "SPI 1 number of bits"
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default 8
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depends on STM32_SPI1_TEST
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---help---
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Sets SPI 1 bit length
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choice
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prompt "SPI BUS 1 Clock Mode"
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default STM32_SPI1_TEST_MODE3
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---help---
140+
Sets SPI 1 clock mode
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config STM32_SPI1_TEST_MODE0
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bool "CPOL=0 CPHA=0"
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config STM32_SPI1_TEST_MODE1
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bool "CPOL=0 CPHA=1"
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config STM32_SPI1_TEST_MODE2
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bool "CPOL=1 CPHA=0"
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config STM32_SPI1_TEST_MODE3
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bool "CPOL=1 CPHA=1"
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endchoice # "SPI BUS 1 Clock Mode"
155+
156+
endif # STM32_SPI1_TEST
157+
158+
config STM32_SPI2_TEST
159+
bool "Test SPI bus 2"
160+
default n
161+
depends on STM32_SPI_TEST
162+
---help---
163+
Enable Spi test - on SPI BUS 2
164+
165+
if STM32_SPI2_TEST
166+
167+
config STM32_SPI2_TEST_FREQ
168+
int "SPI 2 Clock Freq in Hz"
169+
default 12000000
170+
depends on STM32_SPI2_TEST
171+
---help---
172+
Sets SPI 2 Clock Freq
173+
174+
config STM32_SPI2_TEST_BITS
175+
int "SPI 2 number of bits"
176+
default 8
177+
depends on STM32_SPI2_TEST
178+
---help---
179+
Sets SPI 2 bit length
180+
181+
choice
182+
prompt "SPI BUS 2 Clock Mode"
183+
default STM32_SPI2_TEST_MODE3
184+
---help---
185+
Sets SPI 2 clock mode
186+
187+
config STM32_SPI2_TEST_MODE0
188+
bool "CPOL=0 CPHA=0"
189+
190+
config STM32_SPI2_TEST_MODE1
191+
bool "CPOL=0 CPHA=1"
192+
193+
config STM32_SPI2_TEST_MODE2
194+
bool "CPOL=1 CPHA=0"
195+
196+
config STM32_SPI2_TEST_MODE3
197+
bool "CPOL=1 CPHA=1"
198+
199+
endchoice # "SPI BUS 2 Clock Mode"
200+
201+
endif # STM32_SPI2_TEST
202+
203+
config STM32_SPI3_TEST
204+
bool "Test SPI bus 3"
205+
default n
206+
depends on STM32_SPI_TEST
207+
---help---
208+
Enable Spi test - on SPI BUS 3
209+
210+
if STM32_SPI3_TEST
211+
212+
config STM32_SPI3_TEST_FREQ
213+
int "SPI 3 Clock Freq in Hz"
214+
default 40000000
215+
depends on STM32_SPI3_TEST
216+
---help---
217+
Sets SPI 3 Clock Freq
218+
219+
config STM32_SPI3_TEST_BITS
220+
int "SPI 3 number of bits"
221+
default 8
222+
depends on STM32_SPI3_TEST
223+
---help---
224+
Sets SPI 3 bit length
225+
226+
choice
227+
prompt "SPI BUS 3 Clock Mode"
228+
default STM32_SPI3_TEST_MODE3
229+
---help---
230+
Sets SPI 3 clock mode
231+
232+
config STM32_SPI3_TEST_MODE0
233+
bool "CPOL=0 CPHA=0"
234+
235+
config STM32_SPI3_TEST_MODE1
236+
bool "CPOL=0 CPHA=1"
237+
238+
config STM32_SPI3_TEST_MODE2
239+
bool "CPOL=1 CPHA=0"
240+
241+
config STM32_SPI3_TEST_MODE3
242+
bool "CPOL=1 CPHA=1"
243+
244+
endchoice # "SPI BUS 3 Clock Mode"
245+
246+
endif # STM32_SPI3_TEST
247+
endif # STM32_SPI_TEST

boards/arm/stm32f7/common/include/stm32_bmi270.h renamed to boards/arm/common/stm32/include/stm32_bmi270.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/****************************************************************************
2-
* boards/arm/stm32f7/common/include/stm32_bmi270.h
2+
* boards/arm/common/stm32/include/stm32_bmi270.h
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*
@@ -20,8 +20,8 @@
2020
*
2121
****************************************************************************/
2222

23-
#ifndef __BOARDS_ARM_STM32_COMMON_INCLUDE_STM32_BMI270_H
24-
#define __BOARDS_ARM_STM32_COMMON_INCLUDE_STM32_BMI270_H
23+
#ifndef __BOARDS_ARM_COMMON_STM32_INCLUDE_STM32_BMI270_H
24+
#define __BOARDS_ARM_COMMON_STM32_INCLUDE_STM32_BMI270_H
2525

2626
/****************************************************************************
2727
* Included Files
@@ -79,4 +79,4 @@ int board_bmi270_initialize(int devno, int busno);
7979
}
8080
#endif
8181

82-
#endif /* __BOARDS_ARM_STM32_COMMON_INCLUDE_STM32_BMI270_H */
82+
#endif /* __BOARDS_ARM_COMMON_STM32_INCLUDE_STM32_BMI270_H */

boards/arm/stm32f7/common/include/stm32_can_setup.h renamed to boards/arm/common/stm32/include/stm32_can_setup.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/****************************************************************************
2-
* boards/arm/stm32f7/common/include/stm32_can_setup.h
2+
* boards/arm/common/stm32/include/stm32_can_setup.h
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*
@@ -20,8 +20,8 @@
2020
*
2121
****************************************************************************/
2222

23-
#ifndef __BOARDS_ARM_STM32_COMMON_INCLUDE_STM32_CAN_SETUP_H
24-
#define __BOARDS_ARM_STM32_COMMON_INCLUDE_STM32_CAN_SETUP_H
23+
#ifndef __BOARDS_ARM_COMMON_STM32_INCLUDE_STM32_CAN_SETUP_H
24+
#define __BOARDS_ARM_COMMON_STM32_INCLUDE_STM32_CAN_SETUP_H
2525

2626
/****************************************************************************
2727
* Included Files
@@ -70,4 +70,4 @@ int stm32_can_setup(void);
7070
}
7171
#endif
7272

73-
#endif /* __BOARDS_ARM_STM32_COMMON_INCLUDE_STM32_CAN_SETUP_H */
73+
#endif /* __BOARDS_ARM_COMMON_STM32_INCLUDE_STM32_CAN_SETUP_H */

boards/arm/stm32f7/common/include/stm32_cansock_setup.h renamed to boards/arm/common/stm32/include/stm32_cansock_setup.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/****************************************************************************
2-
* boards/arm/stm32f7/common/include/stm32_cansock_setup.h
2+
* boards/arm/common/stm32/include/stm32_cansock_setup.h
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*
@@ -20,8 +20,8 @@
2020
*
2121
****************************************************************************/
2222

23-
#ifndef __BOARDS_ARM_STM32_COMMON_INCLUDE_STM32_CANSOCK_SETUP_H
24-
#define __BOARDS_ARM_STM32_COMMON_INCLUDE_STM32_CANSOCK_SETUP_H
23+
#ifndef __BOARDS_ARM_COMMON_STM32_INCLUDE_STM32_CANSOCK_SETUP_H
24+
#define __BOARDS_ARM_COMMON_STM32_INCLUDE_STM32_CANSOCK_SETUP_H
2525

2626
/****************************************************************************
2727
* Included Files
@@ -70,4 +70,4 @@ int stm32_cansock_setup(void);
7070
}
7171
#endif
7272

73-
#endif /* __BOARDS_ARM_STM32_COMMON_INCLUDE_STM32_CANSOCK_SETUP_H */
73+
#endif /* __BOARDS_ARM_COMMON_STM32_INCLUDE_STM32_CANSOCK_SETUP_H */

boards/arm/stm32f7/common/include/stm32_cs4344.h renamed to boards/arm/common/stm32/include/stm32_cs4344.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/****************************************************************************
2-
* boards/arm/stm32f7/common/include/stm32_cs4344.h
2+
* boards/arm/common/stm32/include/stm32_cs4344.h
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*
@@ -20,8 +20,8 @@
2020
*
2121
****************************************************************************/
2222

23-
#ifndef __BOARDS_ARM_STM32_COMMON_INCLUDE_STM32_CS4344_H
24-
#define __BOARDS_ARM_STM32_COMMON_INCLUDE_STM32_CS4344_H
23+
#ifndef __BOARDS_ARM_COMMON_STM32_INCLUDE_STM32_CS4344_H
24+
#define __BOARDS_ARM_COMMON_STM32_INCLUDE_STM32_CS4344_H
2525

2626
/****************************************************************************
2727
* Included Files
@@ -81,4 +81,4 @@ int board_cs4344_initialize(int devno, int port);
8181
}
8282
#endif
8383

84-
#endif /* __BOARDS_ARM_STM32_COMMON_INCLUDE_STM32_CS4344_H */
84+
#endif /* __BOARDS_ARM_COMMON_STM32_INCLUDE_STM32_CS4344_H */

boards/arm/stm32f7/common/include/stm32_romfs.h renamed to boards/arm/common/stm32/include/stm32_romfs.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/****************************************************************************
2-
* boards/arm/stm32f7/common/include/stm32_romfs.h
2+
* boards/arm/common/stm32/include/stm32_romfs.h
33
*
44
* SPDX-License-Identifier: BSD-3-Clause
55
* SPDX-FileCopyrightText: 2017 Tomasz Wozniak. All rights reserved.
@@ -34,8 +34,8 @@
3434
*
3535
****************************************************************************/
3636

37-
#ifndef __BOARDS_ARM_STM32_COMMON_INCLUDE_STM32_ROMFS_H
38-
#define __BOARDS_ARM_STM32_COMMON_INCLUDE_STM32_ROMFS_H
37+
#ifndef __BOARDS_ARM_COMMON_STM32_INCLUDE_STM32_ROMFS_H
38+
#define __BOARDS_ARM_COMMON_STM32_INCLUDE_STM32_ROMFS_H
3939

4040
/****************************************************************************
4141
* Included Files
@@ -74,4 +74,4 @@ int stm32_romfs_initialize(void);
7474

7575
#endif /* CONFIG_STM32_ROMFS */
7676

77-
#endif /* __BOARDS_ARM_STM32_COMMON_INCLUDE_STM32_ROMFS_H */
77+
#endif /* __BOARDS_ARM_COMMON_STM32_INCLUDE_STM32_ROMFS_H */

boards/arm/stm32f7/common/include/stm32_spitest.h renamed to boards/arm/common/stm32/include/stm32_spitest.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/****************************************************************************
2-
* boards/arm/stm32f7/common/include/stm32_spitest.h
2+
* boards/arm/common/stm32/include/stm32_spitest.h
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*
@@ -20,8 +20,8 @@
2020
*
2121
****************************************************************************/
2222

23-
#ifndef __BOARDS_ARM_STM32_COMMON_INCLUDE_STM32_SPITEST_H
24-
#define __BOARDS_ARM_STM32_COMMON_INCLUDE_STM32_SPITEST_H
23+
#ifndef __BOARDS_ARM_COMMON_STM32_INCLUDE_STM32_SPITEST_H
24+
#define __BOARDS_ARM_COMMON_STM32_INCLUDE_STM32_SPITEST_H
2525

2626
/****************************************************************************
2727
* Included Files
@@ -73,4 +73,4 @@ int stm32_spidev_bus_test(void);
7373
}
7474
#endif
7575

76-
#endif /* __BOARDS_ARM_STM32_COMMON_INCLUDE_STM32_SPITEST_H */
76+
#endif /* __BOARDS_ARM_COMMON_STM32_INCLUDE_STM32_SPITEST_H */

‎boards/arm/common/stm32/src/CMakeLists.txt‎

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Original file line numberDiff line numberDiff line change
@@ -180,4 +180,33 @@ if(CONFIG_INPUT_MPR121_KEYPAD)
180180
list(APPEND SRCS stm32_mpr121.c)
181181
endif()
182182

183+
if(CONFIG_SENSORS_BMI270_I2C)
184+
list(APPEND SRCS stm32_bmi270.c)
185+
endif()
186+
187+
if(CONFIG_AUDIO_CS4344)
188+
list(APPEND SRCS stm32_cs4344.c)
189+
endif()
190+
191+
if(CONFIG_STM32_CAN)
192+
if(CONFIG_STM32_CAN_CHARDRIVER)
193+
list(APPEND SRCS stm32_can_setup.c)
194+
endif()
195+
if(CONFIG_STM32_CAN_SOCKET)
196+
list(APPEND SRCS stm32_cansock_setup.c)
197+
endif()
198+
endif()
199+
200+
if(CONFIG_BOARDCTL_RESET)
201+
list(APPEND SRCS stm32_reset.c)
202+
endif()
203+
204+
if(CONFIG_STM32_ROMFS)
205+
list(APPEND SRCS stm32_romfs_initialize.c)
206+
endif()
207+
208+
if(CONFIG_STM32_SPI_TEST)
209+
list(APPEND SRCS stm32_spitest.c)
210+
endif()
211+
183212
target_sources(board PRIVATE ${SRCS})

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