boards/arm/stm32: switch nucleo-f412zg console to USART3 VCP

Enable USART3 support for STM32F412 and use it as the default NUCLEO-F412ZG nsh console path.

The ST-LINK virtual COM port on this board is wired to USART3 on PD8/PD9. Restore USART2 to its header-pin routing, switch the nsh defconfig to USART3, and update the board documentation to match the shipped solder-bridge configuration described in issue #17722.

Signed-off-by: aviralgarg05 <gargaviral99@gmail.com>

Author: aviralgarg05

Documentation/platforms/arm/stm32f4/boards/nucleo-f412zg/index.rst

@@ -123,7 +123,8 @@ Pins and Connectors::
     TXD: PA2   CN9 pin 2(See SB13, 14, 62, 63). CN10 pin 35
          PD5
 
-    UART2 is the default in all of these configurations.
+USART2 is available on the board headers. It is not the default ``nsh``
+console path.
 
 TTL to RS-232 converter connection::
 
@@ -153,6 +154,30 @@ To configure USART2 as the console::
     CONFIG_USART2_PARITY=0
     CONFIG_USART2_2STOP=0
 
+USART3
+------
+
+Pins and Connectors::
+
+    RXD: PD9
+    TXD: PD8
+
+By default the board solder bridges connect USART3 to the on-board
+ST-LINK Virtual COM Port. This is the default ``nsh`` console path in
+NuttX.
+
+To configure USART3 as the console::
+
+    CONFIG_STM32_USART3=y
+    CONFIG_USART3_SERIALDRIVER=y
+    CONFIG_USART3_SERIAL_CONSOLE=y
+    CONFIG_USART3_RXBUFSIZE=256
+    CONFIG_USART3_TXBUFSIZE=256
+    CONFIG_USART3_BAUD=115200
+    CONFIG_USART3_BITS=8
+    CONFIG_USART3_PARITY=0
+    CONFIG_USART3_2STOP=0
+
 USART6
 ------
 
@@ -178,28 +203,10 @@ To configure USART6 as the console::
 Virtual COM Port
 ----------------
 
-Yet another option is to use UART2 and the USB virtual COM port.  This
-option may be more convenient for long term development, but is painful
-to use during board bring-up.
-
-Solder Bridges.  This configuration requires:
-
-- SB62 and SB63 Open: PA2 and PA3 on STM32 MCU are disconnected to D1
-  and D0 (pin 7 and pin 8) on Arduino connector CN9 and ST Morpho
-  connector CN10.
-
-- SB13 and SB14 Closed:  PA2 and PA3 on STM32F103C8T6 (ST-LINK MCU) are
-  connected to PA3 and PA2 on STM32 MCU to have USART communication
-  between them. Thus SB61, SB62 and SB63 should be OFF.
-
-Configuring USART2 is the same as given above.
-
-Question:  What BAUD should be configure to interface with the Virtual
-COM port?  115200 8N1?
-
-Default:
-As shipped, SB62 and SB63 are open and SB13 and SB14 closed, so the
-virtual COM port is enabled.
+The NUCLEO-F412ZG ST-LINK virtual COM port is connected to USART3 on
+PD8/PD9. As shipped, the default solder bridge configuration enables
+this routing, so the default ``nsh`` configuration uses USART3 for the
+console.
 
 Configurations
 ==============
@@ -208,8 +215,8 @@ nsh
 ---
 
 Configures the NuttShell (nsh) located at apps/examples/nsh for the
-Nucleo-F410RB board.  The Configuration enables the serial interfaces
-on UART2.  Support for builtin applications is enabled, but in the base
+Nucleo-F412ZG board.  The configuration enables the serial interfaces
+on USART3.  Support for builtin applications is enabled, but in the base
 configuration no builtin applications are selected (see NOTES below).
 
 NOTES:

arch/arm/src/stm32/Kconfig

@@ -1686,6 +1686,7 @@ config STM32_STM32F412
 	select STM32_HAVE_TIM12
 	select STM32_HAVE_TIM13
 	select STM32_HAVE_TIM14
+	select STM32_HAVE_USART3
 	select STM32_HAVE_USART2
 	select STM32_HAVE_USART6
 	select STM32_HAVE_I2C1

boards/arm/stm32/nucleo-f412zg/configs/nsh/defconfig

@@ -51,9 +51,9 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 CONFIG_STM32_FLASH_PREFETCH=y
 CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_SERIAL_DISABLE_REORDERING=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART3=y
 CONFIG_SYSTEM_NSH=y
 CONFIG_TASK_NAME_SIZE=32
 CONFIG_TIMER=y
-CONFIG_USART2_SERIAL_CONSOLE=y
+CONFIG_USART3_SERIAL_CONSOLE=y
 CONFIG_USEC_PER_TICK=1000

boards/arm/stm32/nucleo-f412zg/include/board.h

@@ -125,6 +125,14 @@
 #  define GPIO_USART2_RX GPIO_USART2_RX_2
 #  define GPIO_USART2_TX GPIO_USART2_TX_2
 
+/* USART3 (ST-LINK Virtual COM Port):
+ *  RXD: PD9
+ *  TXD: PD8
+ */
+
+#  define GPIO_USART3_RX GPIO_USART3_RX_3
+#  define GPIO_USART3_TX GPIO_USART3_TX_3
+
 /* USART6:
  *  RXD: PG9    CN10 pin 16
  *  TXD: PG14   CN10 pin 14