feat(pmbt): add pmbt extension support

[ninolomata]

Summary

Add initial RISC-V Svpbmt support for selecting page-based memory types in Bao page-table entries.

This change:

• adds PBMT PTE field definitions
• allows PBMT bits in RISC-V PTE flags when CPU_EXT_SVPBMT is enabled
• marks device mappings as PBMT I/O mappings
• enables henvcfg.PBMTE during hypervisor init when Svpbmt is configured
• adds platform configuration plumbing for CPU_EXT_SVPBMT

Implementation

The patch:

• adds PBMT encodings for:
  • PTE_PBMT_PMA
  • PTE_PBMT_NC
  • PTE_PBMT_IO
• extends the RISC-V PTE flag mask to include PBMT bits only when Svpbmt is enabled
• adds extension-specific PTE flag plumbing so future PTE extensions can contribute their own masks/flags
• updates device mapping flags to use PTE_PBMT_IO when Svpbmt is enabled
• checks Svpbmt availability by setting and reading back henvcfg.PBMTE
• moves platform CPU extension macros into an assembler-safe plat/cpu_ext.h header so page-table code can use them without pulling C-only platform declarations into assembly

Requirements to run

Running this support requires coordinated support from Bao and QEMU.

Bao configuration

Enable Svpbmt in the platform CPU extension configuration:

#define CPU_EXT_SVPBMT 1

When enabled, Bao will:

set henvcfg.PBMTE
allow PBMT bits in PTEs
use PBMT I/O attributes for device mappings

QEMU

A QEMU version with Svpbmt support is required.

For QEMU virt platforms, make sure the selected CPU exposes Svpbmt, for example with an appropriate CPU option such as:

svpbmt=true