Commit 3f30b97
Phase 2.2: ToolBar and StatusBar Integration for Simulation Speed Control (#485)
* Phase 2.2: Add ToolBar/StatusBar simulation controls and speed indicator integration
Agent-Logs-Url: https://github.com/bedaHovorka/interlockSim/sessions/a05d505b-27f4-4dc3-8ad6-c336a6ca4ec8
Co-authored-by: bedaHovorka <5263405+bedaHovorka@users.noreply.github.com>
* Fix code review: safe cast, kotlin.math.abs import, function name typo, named constant
Agent-Logs-Url: https://github.com/bedaHovorka/interlockSim/sessions/a05d505b-27f4-4dc3-8ad6-c336a6ca4ec8
Co-authored-by: bedaHovorka <5263405+bedaHovorka@users.noreply.github.com>
* Address code review: import order, debug logging, flushEDT() helpers in tests
Agent-Logs-Url: https://github.com/bedaHovorka/interlockSim/sessions/a05d505b-27f4-4dc3-8ad6-c336a6ca4ec8
Co-authored-by: bedaHovorka <5263405+bedaHovorka@users.noreply.github.com>
* Changes before error encountered
Agent-Logs-Url: https://github.com/bedaHovorka/interlockSim/sessions/f4316065-c3a6-47a4-be98-31cf8f27dd5d
Co-authored-by: bedaHovorka <5263405+bedaHovorka@users.noreply.github.com>
* Fix Frame.kt simulation-mode layout diagram to show StatusBar
The class-level ASCII diagram omitted StatusBar from the simulation mode
view. The implementation keeps StatusBar visible throughout (speed
indicator uses its separate speedLabel); the diagram now matches.
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
* Fix flaky stopHidesToolBarSimulationControls: add missing flushEDT()
The test was missing the EDT drain call that the sibling test
stopResetsStatusBarSpeedIndicator already has. Without it, the
monitor thread's invokeLater callback races the invokeAndWait verify
task on slow CI runners, causing a non-deterministic 10s timeout.
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
* Bump stopHidesToolBarSimulationControls @timeout 10s -> 30s
CI runs on ubuntu-latest with no Xvfb, default headless mode, and parallel
test forks. The cumulative latch + flushEDT + invokeAndWait budget exceeds
the previous 10s cap under contention even though the test logic is sound.
30s gives ~3x headroom while still failing fast on a true logic regression
(internal latches still cap themselves at 5s and 10s).
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
---------
Co-authored-by: copilot-swe-agent[bot] <198982749+Copilot@users.noreply.github.com>
Co-authored-by: bedaHovorka <5263405+bedaHovorka@users.noreply.github.com>
Co-authored-by: Bedrich Hovorka <bedrich.hovorka@gmail.com>
Co-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>1 parent fefac01 commit 3f30b97
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- desktop-ui/src
- main/kotlin/cz/vutbr/fit/interlockSim/gui
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