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riscv_debug: Give names to semihosting NOPs and GPR A1
1 parent e8ded39 commit c694bd6

1 file changed

Lines changed: 15 additions & 4 deletions

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src/target/riscv_debug.c

Lines changed: 15 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -113,6 +113,8 @@
113113

114114
/* GPR a0, aka x10 is used as a bounce buffer for our progbuf CSR I/O */
115115
#define RV_GPR_A0 0x100aU
116+
/* GPR a1, aka x11, is used as semihosting argument */
117+
#define RV_GPR_A1 0x100bU
116118

117119
/*
118120
* Instructions for reading and writing CSRs through a0
@@ -125,6 +127,15 @@
125127
#define RV_CSRW_A0 0x00051073U
126128
#define RV_EBREAK 0x00100073U
127129

130+
/*
131+
* A semihosting call is three consecutive uncompressed instructions:
132+
* 0x01f01013 slli zero, zero 0x1f;
133+
* 0x00100073 ebreak;
134+
* 0x40705013 srai zero, zero, 7.
135+
*/
136+
#define RV_ENTRY_NOP 0x01f01013U
137+
#define RV_EXIT_NOP 0x40705013U
138+
128139
#define RV_VENDOR_JEP106_CONT_MASK 0x7fffff80U
129140
#define RV_VENDOR_JEP106_CODE_MASK 0x7fU
130141

@@ -907,15 +918,15 @@ static bool riscv_hostio_request(target_s *const target)
907918
{
908919
/* Read out syscall number from a0/x10 and first argument from a1/x11 */
909920
uint32_t syscall = 0U;
910-
target_reg_read(target, 10, &syscall, sizeof(syscall));
921+
target_reg_read(target, RV_GPR_A0, &syscall, sizeof(syscall));
911922
uint32_t a1 = 0U;
912-
target_reg_read(target, 11, &a1, sizeof(a1));
923+
target_reg_read(target, RV_GPR_A1, &a1, sizeof(a1));
913924

914925
/* Hand off to the main semihosting implementation */
915926
const int32_t result = semihosting_request(target, syscall, a1);
916927

917928
/* Write the result back to the target */
918-
target_reg_write(target, 10, &result, sizeof(result));
929+
target_reg_write(target, RV_GPR_A0, &result, sizeof(result));
919930
/* Return if the request was in any way interrupted */
920931
return target->tc->interrupted;
921932
}
@@ -1197,7 +1208,7 @@ static target_halt_reason_e riscv_halt_poll(target_s *const target, target_addr6
11971208
uint32_t instructions[3] = {0};
11981209
target_mem32_read(target, &instructions, program_counter - 4U, 12);
11991210
/* A semihosting call is three consecutive uncompressed instructions: slli zero, zero 0x1f; ebreak, srai zero, zero, 7. */
1200-
if (instructions[0] == 0x01f01013 && instructions[1] == RV_EBREAK && instructions[2] == 0x40705013) {
1211+
if (instructions[0] == RV_ENTRY_NOP && instructions[1] == RV_EBREAK && instructions[2] == RV_EXIT_NOP) {
12011212
if (riscv_hostio_request(target))
12021213
return TARGET_HALT_REQUEST;
12031214

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