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113 | 113 |
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114 | 114 | /* GPR a0, aka x10 is used as a bounce buffer for our progbuf CSR I/O */ |
115 | 115 | #define RV_GPR_A0 0x100aU |
| 116 | +/* GPR a1, aka x11, is used as semihosting argument */ |
| 117 | +#define RV_GPR_A1 0x100bU |
116 | 118 |
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117 | 119 | /* |
118 | 120 | * Instructions for reading and writing CSRs through a0 |
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125 | 127 | #define RV_CSRW_A0 0x00051073U |
126 | 128 | #define RV_EBREAK 0x00100073U |
127 | 129 |
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| 130 | +/* |
| 131 | + * A semihosting call is three consecutive uncompressed instructions: |
| 132 | + * 0x01f01013 slli zero, zero 0x1f; |
| 133 | + * 0x00100073 ebreak; |
| 134 | + * 0x40705013 srai zero, zero, 7. |
| 135 | + */ |
| 136 | +#define RV_ENTRY_NOP 0x01f01013U |
| 137 | +#define RV_EXIT_NOP 0x40705013U |
| 138 | + |
128 | 139 | #define RV_VENDOR_JEP106_CONT_MASK 0x7fffff80U |
129 | 140 | #define RV_VENDOR_JEP106_CODE_MASK 0x7fU |
130 | 141 |
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@@ -907,15 +918,15 @@ static bool riscv_hostio_request(target_s *const target) |
907 | 918 | { |
908 | 919 | /* Read out syscall number from a0/x10 and first argument from a1/x11 */ |
909 | 920 | uint32_t syscall = 0U; |
910 | | - target_reg_read(target, 10, &syscall, sizeof(syscall)); |
| 921 | + target_reg_read(target, RV_GPR_A0, &syscall, sizeof(syscall)); |
911 | 922 | uint32_t a1 = 0U; |
912 | | - target_reg_read(target, 11, &a1, sizeof(a1)); |
| 923 | + target_reg_read(target, RV_GPR_A1, &a1, sizeof(a1)); |
913 | 924 |
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914 | 925 | /* Hand off to the main semihosting implementation */ |
915 | 926 | const int32_t result = semihosting_request(target, syscall, a1); |
916 | 927 |
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917 | 928 | /* Write the result back to the target */ |
918 | | - target_reg_write(target, 10, &result, sizeof(result)); |
| 929 | + target_reg_write(target, RV_GPR_A0, &result, sizeof(result)); |
919 | 930 | /* Return if the request was in any way interrupted */ |
920 | 931 | return target->tc->interrupted; |
921 | 932 | } |
@@ -1197,7 +1208,7 @@ static target_halt_reason_e riscv_halt_poll(target_s *const target, target_addr6 |
1197 | 1208 | uint32_t instructions[3] = {0}; |
1198 | 1209 | target_mem32_read(target, &instructions, program_counter - 4U, 12); |
1199 | 1210 | /* A semihosting call is three consecutive uncompressed instructions: slli zero, zero 0x1f; ebreak, srai zero, zero, 7. */ |
1200 | | - if (instructions[0] == 0x01f01013 && instructions[1] == RV_EBREAK && instructions[2] == 0x40705013) { |
| 1211 | + if (instructions[0] == RV_ENTRY_NOP && instructions[1] == RV_EBREAK && instructions[2] == RV_EXIT_NOP) { |
1201 | 1212 | if (riscv_hostio_request(target)) |
1202 | 1213 | return TARGET_HALT_REQUEST; |
1203 | 1214 |
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