|
| 1 | +# Black Magic Debug Probe Firmware for WeAct Studio BluePill-Plus boards |
| 2 | + |
| 3 | +This platform allows using various BluePill-Plus boards as a Black Magic Probe. |
| 4 | + |
| 5 | +[BluePill-Plus](https://github.com/WeActStudio/BluePill-Plus) is based on STM32F103CB or GD32F303CC; |
| 6 | + |
| 7 | +[BluePill-Plus-GD32](https://github.com/WeActStudio/WeActStudio.BluePill-Plus-GD32) is based on GD32F103CB. SoC runs at up to 108 MHz, but because of USB FS device clock restrictions 96 MHz is used. |
| 8 | + |
| 9 | +[BluePill-Plus-APM32](https://github.com/WeActStudio/WeActStudio.BluePill-Plus-APM32) is based on APM32F103CB (untested). |
| 10 | + |
| 11 | +[BluePill-Plus-CH32](https://github.com/WeActStudio/WeActStudio.BluePill-Plus-CH32) is based on CH32F103C8 (CM3) or CH32V103C8 or CH32V203C8 (RISC-V) and unsupported (flash too small, non-Cortex-M). |
| 12 | + |
| 13 | +| SoC | Core |Clock, MHz|SRAM, KiB|Flash, KiB| |
| 14 | +|-------------|------------|----------|---------|----------| |
| 15 | +| STM32F103CB | Cortex-M3 | 72 | 20 | 128 (2WS)| |
| 16 | +| GD32F103CB | Cortex-M3 | 96 | 20 | 128 (0WS)| |
| 17 | +| GD32F303CC | Cortex-M4F | 120 | 48 | 256 (0WS)| |
| 18 | +| APM32F103CB | Cortex-M3 | 96 | 20 | 128 (0WS)| |
| 19 | + |
| 20 | +## Pinout |
| 21 | + |
| 22 | +| Function | Pinout | Cluster | |
| 23 | +| --------------- | ------ | --------- | |
| 24 | +| TDI | PB6 | JTAG/SWD | |
| 25 | +| TDO/TRACESWO | PB7 | JTAG/SWD | |
| 26 | +| TCK/SWCLK | PB8 | JTAG/SWD | |
| 27 | +| TMS/SWDIO | PB9 | JTAG/SWD | |
| 28 | +| nRST | PA5 | JTAG/SWD | |
| 29 | +| TRST (optional) | PA6 | JTAG/SWD | |
| 30 | +| UART TX | PA2 | USB USART | |
| 31 | +| UART RX | PA3 | USB USART | |
| 32 | +| LED idle run | PB2 | LED | |
| 33 | +| LED error | PB10 | LED | |
| 34 | +| LED UART | PB11 | LED | |
| 35 | +| User button KEY | PA0 | | |
| 36 | + |
| 37 | +USB Full-Speed PHY is on PA11/PA12 with a fixed 1.5 kOhm external pull-up resistor. |
| 38 | + |
| 39 | +SWJ-DP is on PA13/14/15/PB3/4, those pins are kept in default function (Inception debug possible). |
| 40 | + |
| 41 | +TODO: add support for onboard SPI flash on PA4/5/6/7 (SPI1) and PB12/13/14/15 (SPI2). |
| 42 | + |
| 43 | +## Instructions for build system |
| 44 | + |
| 45 | +0. Clone the repo and libopencm3 submodule, install toolchains, meson, etc. |
| 46 | + |
| 47 | +```sh |
| 48 | +git clone https://github.com/blackmagic-debug/blackmagic.git --depth=2000 |
| 49 | +cd blackmagic |
| 50 | +``` |
| 51 | + |
| 52 | +1. Create a build configuration for specific platform (WeActStudio BluePill-Plus) with specific options |
| 53 | + |
| 54 | +```sh |
| 55 | +meson setup build --cross-file=cross-file/bluepillplus.ini |
| 56 | +``` |
| 57 | + |
| 58 | +2. Compile the firmware and bootloader |
| 59 | + |
| 60 | +```sh |
| 61 | +ninja -C build |
| 62 | +ninja -C build boot-bin |
| 63 | +``` |
| 64 | + |
| 65 | +3. Flash the BMD bootloader into first 8 KiB of memory if it's empty, using USART1, or only flash the BMD Firmware at an offset, using USB DFU. |
| 66 | + |
| 67 | +For other firmware upgrade instructions see the [Firmware Upgrade](https://black-magic.org/upgrade.html) section. |
| 68 | + |
| 69 | +### Using the BMD Bootloader |
| 70 | +If you flashed the bootloader using the above instructions, it may be invoked using the following: |
| 71 | +- Force the F1 into BMD bootloader mode: |
| 72 | + - Hold down KEY |
| 73 | + - Tap NRST |
| 74 | + - Release KEY |
| 75 | + |
| 76 | +The BMD bootloader also recognizes RCC Reset reason when nRST is pressed, and `dfu-util --detach` (implemented via magic flags in main SRAM). |
| 77 | + |
| 78 | +Once activated the BMD bootloader may be used to flash the device using 'bmputil,' available [here](https://github.com/blackmagic-debug/bmputil). |
| 79 | + |
| 80 | +## Performance |
| 81 | + |
| 82 | +System clock is set to 72 MHz, expecting a 8 MHz HSE crystal. On GD32 chips, 96 and 120 MHz are also an option. |
| 83 | + |
| 84 | +Because of low expectations to signal integrity or quality wiring, default SWD frequency is reduced to 2 MHz, but in practice 6 MHz is possible, JTAG is slower. |
| 85 | + |
| 86 | +Aux serial runs via USART2 DMA on APB1 (Pclk = 36 MHz) at 549..2250000 baud. |
| 87 | + |
| 88 | +TraceSWO Async capture runs via USART1 DMA on APB2 (Pclk = 72 MHz) at 1098..4500000 baud. |
| 89 | + |
| 90 | +SPI ports are set to Pclk/8 each (use with `bmpflash`). As SPI1 pins may conflict with certain functions, and platform code does not bother restoring them, please soft-reset the probe when done with SPI operations. |
| 91 | + |
| 92 | +## More details |
| 93 | + |
| 94 | +* ST MaskROM is the read-only System Memory bootloader which starts up per BOOT0-triggered SYSCFG mem-remap. It talks USART AN2606 so you can use stm32flash etc. However, it does not implement USB DFU, which is why a BMD bootloader is provided here. |
| 95 | +* BMD bootloader is the port of BMP bootloader which |
| 96 | + a) has a fixed compatible PLL config; |
| 97 | + b) understands buttons, drives LED, does not touch other GPIOs, talks USB DfuSe, ~~has MS OS descriptors for automatic driver installation on Windows~~, uses same libopencm3 code so you can verify hardware config via a smaller binary; |
| 98 | + c) erases and writes to internal Flash ~2x faster than MaskROM USART at 460800 baud (verify?) without an external USB-UART bridge dongle. |
0 commit comments