Skip to content

Commit f5f329f

Browse files
Add support for RISC-V mcontext
1 parent 51822c8 commit f5f329f

1 file changed

Lines changed: 2 additions & 0 deletions

File tree

backward.hpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4215,6 +4215,8 @@ class SignalHandling {
42154215
#elif defined(__ppc__) || defined(__powerpc) || defined(__powerpc__) || \
42164216
defined(__POWERPC__)
42174217
error_addr = reinterpret_cast<void *>(uctx->uc_mcontext.regs->nip);
4218+
#elif defined(__riscv)
4219+
error_addr = reinterpret_cast<void *>(uctx->uc_mcontext.__gregs[REG_PC]);
42184220
#elif defined(__s390x__)
42194221
error_addr = reinterpret_cast<void *>(uctx->uc_mcontext.psw.addr);
42204222
#elif defined(__APPLE__) && defined(__x86_64__)

0 commit comments

Comments
 (0)