@@ -70,10 +70,9 @@ func toProtoNodeSpec(hw *HardwareProfile) *nodev1.NodeSpec {
7070 StorageBytes : st .StorageBytes ,
7171 StorageType : st .StorageType ,
7272 }
73- // TODO(BRE2-801): uncomment when proto dep is updated
74- // if st.Name != "" {
75- // storageSpec.Device = &st.Name
76- // }
73+ if st .Name != "" {
74+ storageSpec .Device = & st .Name
75+ }
7776 proto .Storage = append (proto .Storage , storageSpec )
7877 }
7978
@@ -87,46 +86,42 @@ func toProtoNodeSpec(hw *HardwareProfile) *nodev1.NodeSpec {
8786 proto .OsVersion = & hw .OSVersion
8887 }
8988
90- // TODO(BRE2-801): uncomment when proto dep is updated
91- // if hw.ProductName != "" {
92- // proto.ProductName = &hw.ProductName
93- // }
89+ if hw .ProductName != "" {
90+ proto .ProductName = & hw .ProductName
91+ }
9492
9593 for _ , g := range hw .GPUs {
9694 pg := & nodev1.GPUSpec {
9795 Model : g .Model ,
9896 Count : g .Count ,
9997 MemoryBytes : g .MemoryBytes ,
10098 }
101- // TODO(BRE2-801): uncomment when proto dep is updated
102- // if g.Architecture != "" {
103- // pg.GpuArchitecture = &g.Architecture
104- // }
99+ if g .Architecture != "" {
100+ pg .GpuArchitecture = & g .Architecture
101+ }
105102 proto .Gpus = append (proto .Gpus , pg )
106103 }
107104
108- // TODO(BRE2-801): uncomment when proto dep is updated
109- // InterconnectSpec uses oneof: NVLinkDetails or PCIeDetails
110- // for _, ic := range hw.Interconnects {
111- // spec := &nodev1.InterconnectSpec{Device: ic.Device}
112- // switch ic.Type {
113- // case "NVLink":
114- // spec.Details = &nodev1.InterconnectSpec_Nvlink{
115- // Nvlink: &nodev1.NVLinkDetails{
116- // ActiveLinks: int32(ic.ActiveLinks),
117- // Version: ic.Version,
118- // },
119- // }
120- // case "PCIe":
121- // spec.Details = &nodev1.InterconnectSpec_Pcie{
122- // Pcie: &nodev1.PCIeDetails{
123- // Generation: int32(ic.Generation),
124- // Width: int32(ic.Width),
125- // },
126- // }
127- // }
128- // proto.Interconnects = append(proto.Interconnects, spec)
129- // }
105+ for _ , ic := range hw .Interconnects {
106+ spec := & nodev1.InterconnectSpec {Device : ic .Device }
107+ switch ic .Type {
108+ case "NVLink" :
109+ spec .Details = & nodev1.InterconnectSpec_Nvlink {
110+ Nvlink : & nodev1.NVLinkDetails {
111+ ActiveLinks : int32 (ic .ActiveLinks ),
112+ Version : ic .Version ,
113+ },
114+ }
115+ case "PCIe" :
116+ spec .Details = & nodev1.InterconnectSpec_Pcie {
117+ Pcie : & nodev1.PCIeDetails {
118+ Generation : int32 (ic .Generation ),
119+ Width : int32 (ic .Width ),
120+ },
121+ }
122+ }
123+ proto .Interconnects = append (proto .Interconnects , spec )
124+ }
130125
131126 return proto
132127}
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