|
| 1 | +cbuild-run: |
| 2 | + generated-by: csolution version 0.0.0+gc1fb4eb2 |
| 3 | + solution: ../data/TestRunDebug/no-dbgconf.csolution.yml |
| 4 | + target-type: ARMCM3 |
| 5 | + target-set: <default> |
| 6 | + compiler: AC6 |
| 7 | + device: ARM::RteTest_ARMCM3 |
| 8 | + device-pack: ARM::RteTest_DFP@0.1.1 |
| 9 | + output: |
| 10 | + - file: out/run-debug/ARMCM3/run-debug.axf |
| 11 | + info: generate by run-debug+ARMCM3 |
| 12 | + type: elf |
| 13 | + load: symbols |
| 14 | + - file: out/run-debug/ARMCM3/run-debug.hex |
| 15 | + info: generate by run-debug+ARMCM3 |
| 16 | + type: hex |
| 17 | + load: image |
| 18 | + - file: out/run-debug/ARMCM3/run-debug.bin |
| 19 | + info: generate by run-debug+ARMCM3 |
| 20 | + type: bin |
| 21 | + load: none |
| 22 | + system-resources: |
| 23 | + memory: |
| 24 | + - name: IROM1 |
| 25 | + access: rx |
| 26 | + start: 0x00000000 |
| 27 | + size: 0x00040000 |
| 28 | + from-pack: ARM::RteTest_DFP@0.1.1 |
| 29 | + - name: IRAM1 |
| 30 | + access: rwx |
| 31 | + start: 0x20000000 |
| 32 | + size: 0x00020000 |
| 33 | + from-pack: ARM::RteTest_DFP@0.1.1 |
| 34 | + system-descriptions: |
| 35 | + - file: ${CMSIS_PACK_ROOT}/ARM/RteTest_DFP/0.1.1/Device/ARM/SVD/ARMCM3.svd |
| 36 | + type: svd |
| 37 | + debugger: |
| 38 | + name: CMSIS-DAP@pyOCD |
| 39 | + protocol: swd |
| 40 | + clock: 10000000 |
| 41 | + gdbserver: |
| 42 | + - port: 3333 |
| 43 | + debug-vars: |
| 44 | + vars: | |
| 45 | + __var DbgMCU_CR = 0x00000007; // DBGMCU_CR: DBG_SLEEP, DBG_STOP, DBG_STANDBY |
| 46 | + __var TraceClk_Pin = 0x00040002; // PE2 |
| 47 | + __var TraceD0_Pin = 0x00040003; // PE3 |
| 48 | + __var TraceD1_Pin = 0x00040004; // PE4 |
| 49 | + debug-sequences: |
| 50 | + - name: DebugDeviceUnlock |
| 51 | + blocks: |
| 52 | + - execute: | |
| 53 | + Sequence("CheckID"); |
| 54 | + - name: DebugCoreStart |
| 55 | + blocks: |
| 56 | + - execute: | |
| 57 | + // Replication of Standard Functionality |
| 58 | + Write32(0xE000EDF0, 0xA05F0001); // Enable Core Debug via DHCSR |
| 59 | + - info: DbgMCU registers |
| 60 | + execute: | |
| 61 | + // Device Specific Debug Setup |
| 62 | + Write32(0x40021018, Read32(0x40021018) | 0x00400000); // Set RCC_APB2ENR.DBGMCUEN |
| 63 | + - name: CheckID |
| 64 | + blocks: |
| 65 | + - execute: | |
| 66 | + __var pidr1 = 0; |
| 67 | + __var pidr2 = 0; |
| 68 | + __var jep106id = 0; |
| 69 | + __var ROMTableBase = 0; |
| 70 | +
|
| 71 | + __ap = 0; // AHB-AP |
| 72 | +
|
| 73 | + ROMTableBase = ReadAP(0xF8) & ~0x3; |
| 74 | +
|
| 75 | + pidr1 = Read32(ROMTableBase + 0x0FE4); |
| 76 | + pidr2 = Read32(ROMTableBase + 0x0FE8); |
| 77 | + jep106id = ((pidr2 & 0x7) << 4 ) | ((pidr1 >> 4) & 0xF); |
| 78 | + - if: jep106id != 0x20 |
| 79 | + execute: | |
| 80 | + Query(0, "Incorrect ID! Abort connection", 1); |
| 81 | + Message(2, "Incorrect ID! Abort connection."); |
| 82 | + - name: DebugPortStop |
| 83 | + blocks: |
| 84 | + - execute: | |
| 85 | + __var connectionFlash = ( __connection & 0xF ) == 2 ; |
| 86 | + __var FLASH_BASE = 0x40022000 ; |
| 87 | + __var FLASH_CR = FLASH_BASE + 0x10 ; |
| 88 | + __var OBL_LAUNCH_BIT = ( 1 << 13 ) ; |
| 89 | + __var FLASH_CR_Value = 0 ; |
| 90 | + __var DoDebugPortStop = 1 ; |
| 91 | + __var DP_CTRL_STAT = 0x4 ; |
| 92 | + __var DP_SELECT = 0x8 ; |
| 93 | + - if: connectionFlash && DoDebugPortStop |
| 94 | + execute: | |
| 95 | + DoDebugPortStop = 0 ; |
| 96 | + FLASH_CR_Value = Read32( FLASH_CR ) ; |
| 97 | + __errorcontrol = 1 ; |
| 98 | + // write OBL_LAUNCH bit (causes a reset) |
| 99 | + Write32( FLASH_CR, FLASH_CR_Value | ( OBL_LAUNCH_BIT ) ) ; |
| 100 | + __errorcontrol = 0 ; |
| 101 | + - if: DoDebugPortStop |
| 102 | + execute: | |
| 103 | + // Switch to DP Register Bank 0 |
| 104 | + WriteDP(DP_SELECT, 0x00000000); |
| 105 | + // Power Down Debug port |
| 106 | + WriteDP(DP_CTRL_STAT, 0x00000000); |
| 107 | + programming: |
| 108 | + - algorithm: ${CMSIS_PACK_ROOT}/ARM/RteTest_DFP/0.1.1/Device/ARM/Flash/FAMILY.FLM |
| 109 | + start: 0x00000000 |
| 110 | + size: 0x00040000 |
| 111 | + ram-start: 0x20000000 |
| 112 | + ram-size: 0x00020000 |
0 commit comments