feat(hexagon): add Hexagon ISA target support

Add interpreter and AOT execution support for Qualcomm Hexagon DSP:
invokeNative trampoline, ELF relocation handler with PLT stubs,
wamrc --target=hexagon with auto -small-data, SIMD enablement, and
cross-compilation platform cmake.

Author: androm3da

build-scripts/build_llvm.py

@@ -108,7 +108,7 @@ def build_llvm(llvm_dir, platform, backends, projects, use_clang=False, extra_fl
     LLVM_TARGETS_TO_BUILD = [
         '-DLLVM_TARGETS_TO_BUILD:STRING="' + ";".join(normal_backends) + '"'
         if normal_backends
-        else '-DLLVM_TARGETS_TO_BUILD:STRING="AArch64;ARM;Mips;RISCV;X86"'
+        else '-DLLVM_TARGETS_TO_BUILD:STRING="AArch64;ARM;Hexagon;Mips;RISCV;X86"'
     ]
 
     # if not on ARC platform, but want to add expeirmental backend ARC as target
@@ -243,6 +243,7 @@ def main():
             "AArch64",
             "ARC",
             "ARM",
+            "Hexagon",
             "Mips",
             "RISCV",
             "WebAssembly",

build-scripts/config_common.cmake

@@ -45,6 +45,8 @@ elseif (WAMR_BUILD_TARGET STREQUAL "RISCV32_ILP32")
   add_definitions(-DBUILD_TARGET_RISCV32_ILP32)
 elseif (WAMR_BUILD_TARGET STREQUAL "ARC")
   add_definitions(-DBUILD_TARGET_ARC)
+elseif (WAMR_BUILD_TARGET STREQUAL "HEXAGON")
+  add_definitions(-DBUILD_TARGET_HEXAGON)
 else ()
   message (FATAL_ERROR "-- WAMR build target isn't set")
 endif ()

core/config.h

@@ -22,7 +22,8 @@
     && !defined(BUILD_TARGET_RISCV32_ILP32D) \
     && !defined(BUILD_TARGET_RISCV32_ILP32F) \
     && !defined(BUILD_TARGET_RISCV32_ILP32) \
-    && !defined(BUILD_TARGET_ARC)
+    && !defined(BUILD_TARGET_ARC) \
+    && !defined(BUILD_TARGET_HEXAGON)
 /* clang-format on */
 #if defined(__x86_64__) || defined(__x86_64)
 #define BUILD_TARGET_X86_64
@@ -52,6 +53,8 @@
 #define BUILD_TARGET_RISCV32_ILP32D
 #elif defined(__arc__)
 #define BUILD_TARGET_ARC
+#elif defined(__hexagon__)
+#define BUILD_TARGET_HEXAGON
 #else
 #error "Build target isn't set"
 #endif
@@ -282,7 +285,7 @@
  * natural alignment. */
 #ifndef WASM_CPU_SUPPORTS_UNALIGNED_SIMD_ACCESS
 #if defined(BUILD_TARGET_X86_32) || defined(BUILD_TARGET_X86_64) \
-    || defined(BUILD_TARGET_AARCH64)
+    || defined(BUILD_TARGET_AARCH64) || defined(BUILD_TARGET_HEXAGON)
 #define WASM_CPU_SUPPORTS_UNALIGNED_SIMD_ACCESS 1
 #else
 #define WASM_CPU_SUPPORTS_UNALIGNED_SIMD_ACCESS 0

core/iwasm/aot/aot_loader.c

@@ -275,6 +275,7 @@ GET_U16_FROM_ADDR(const uint8 *p)
 #define E_MACHINE_ARC_COMPACT 93    /* ARC International ARCompact */
 #define E_MACHINE_ARC_COMPACT2 195  /* Synopsys ARCompact V2 */
 #define E_MACHINE_XTENSA 94         /* Tensilica Xtensa Architecture */
+#define E_MACHINE_HEXAGON 164       /* Qualcomm Hexagon */
 #define E_MACHINE_RISCV 243         /* RISC-V 32/64 */
 #define E_MACHINE_WIN_I386 0x14c    /* Windows i386 architecture */
 #define E_MACHINE_WIN_X86_64 0x8664 /* Windows x86-64 architecture */
@@ -419,6 +420,9 @@ get_aot_file_target(AOTTargetInfo *target_info, char *target_buf,
              * Use const strings here */
             machine_type = target_info->arch;
             break;
+        case E_MACHINE_HEXAGON:
+            machine_type = "hexagon";
+            break;
         case E_MACHINE_MIPS:
             machine_type = "mips";
             break;