Handling misaligned memory accesses

[tage64]

I have a risc-v processor that doesn't support misaligned memory accesses. I ahead-of-time compile a wasm program with Wamrc but when I run it I get a trap for a misaligned load. I know that WebAssembly allows unaligned memory accesses so this isn't surprising but I wonder if it is possible to adjust load/stores to check for alignment when generating the LLVM-IR during compilation?

In core/iwasm/common/wasm_runtime_common.h there are several macros for doing unaligned stores/loads : STORE_I64, STORE_U32, LOAD_I64, LOAD_I16, ... I imagine something similar to these: Whenever the Wasm code wants to make a load or store, Wamrc emits instructions similar to these macros.

Is this possible today, or would it be hard to implement?

[TianlongLiang]

I don't think it's possible today. To make aot support misaligned memory accesses, we basically need to add LLVMSetAlignment(st, 1); for every ld/st instruction

[tage64]

Yes, but how hard would that be? I am not well acquainted with the aot code, but after generating the LLVM-IR, can't we just do a pass over the entire IR and set the alignment to 1 for all relevant instructions?

[TianlongLiang]

I think, as you said, a customized pass is probably good enough, and it won't be too hard if you are familiar with LLVM. You can give it a try or submit a new RFC issue to describe the problem and implementation to see whether other people are interested and willing to do it.

[tage64]

I'll give it a try. Are there any flags that I need to pass to wamrc to make LLVM understand that my CPU doesn't support unaligned accesses? I guess that LLVM will then emit instructions similar to the STORE_*/LOAD_* macros in wasm_runtime_common.h?

[TianlongLiang]

I think --enable-llvm-passes and --mllvm can add/set some LLVM related flag, you can try this first. LLVMCreateTargetMachine in aot_llvm.c is where actual set cpu feature flag, you can take a look at there too

[tage64]

I made a very simple proof of concept where I made an extra pass over the LLVM-IR and set the alignment of all loads/storse to 1. It worked in my case.

https://github.com/tage64/wasm-micro-runtime

[BilelGho]

@tage64 Sorry to swoop in. I just happened to run into a similar issue one year ago. How was the wasm you are testing with generated ? Is it manually assembled or was it compiled from a source programming language? Because my understanding at that time is that wasm generated by the LLVM backend is expected to be naturally aligned

[tage64]

Yes, it might work with LLVM, but Wasmtime doesn't support LLVM as backend for ahead-of-time compilation.

[yamt]

I ahead-of-time compile a wasm program with Wamrc but when I run it I get a trap for a misaligned load.

when alignment is not known, the backend should perform accesses in a safer way.
eg. byte-to-byte access.
doesn't it happen for risc-v?
cf. the description of #3552