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[Cranelift] folds two shifts over add|sub|and (#11640)
* [Cranelift] add opts and tests * [Cranelift] add opts and tests * [Cranelift] add opts and tests * [Cranelift] update tests
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cranelift/codegen/src/opts/shifts.isle

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@@ -305,3 +305,8 @@
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(rule (simplify (rotl ty x (iconst_u kty k)))
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(if-let false (u64_eq k (u64_and k (ty_shift_mask ty))))
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(rotl ty x (iconst_u kty (u64_and k (ty_shift_mask ty)))))
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(rule (simplify (band ty (ishl ty x z) (ishl ty y z))) (ishl ty (band ty x y) z))
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(rule (simplify (isub ty (ishl ty x z) (ishl ty y z))) (ishl ty (isub ty x y) z))
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(rule (simplify (iadd ty (ishl ty x z) (ishl ty y z))) (ishl ty (iadd ty x y) z))
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test optimize precise-output
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set opt_level=speed
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target x86_64
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function %test1(i8, i8, i8) -> i8 {
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block0(v0: i8, v1: i8, v3: i8):
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v2 = ishl v0, v1
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v4 = ishl v3, v1
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v5 = iadd v2, v4
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return v5
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}
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; function %test1(i8, i8, i8) -> i8 fast {
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; block0(v0: i8, v1: i8, v3: i8):
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; v6 = iadd v0, v3
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; v7 = ishl v6, v1
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; return v7
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; }
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function %test2(i16, i16, i16) -> i16 {
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block0(v0: i16, v1: i16, v3: i16):
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v2 = ishl v0, v1
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v4 = ishl v3, v1
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v5 = iadd v2, v4
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return v5
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}
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; function %test2(i16, i16, i16) -> i16 fast {
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; block0(v0: i16, v1: i16, v3: i16):
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; v6 = iadd v0, v3
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; v7 = ishl v6, v1
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; return v7
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; }
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function %test3(i32, i32, i32) -> i32 {
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block0(v0: i32, v1: i32, v3: i32):
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v2 = ishl v0, v1
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v4 = ishl v3, v1
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v5 = iadd v2, v4
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return v5
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}
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; function %test3(i32, i32, i32) -> i32 fast {
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; block0(v0: i32, v1: i32, v3: i32):
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; v6 = iadd v0, v3
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; v7 = ishl v6, v1
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; return v7
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; }
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function %test4(i64, i64, i64) -> i64 {
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block0(v0: i64, v1: i64, v3: i64):
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v2 = ishl v0, v1
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v4 = ishl v3, v1
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v5 = iadd v2, v4
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return v5
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}
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; function %test4(i64, i64, i64) -> i64 fast {
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; block0(v0: i64, v1: i64, v3: i64):
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; v6 = iadd v0, v3
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; v7 = ishl v6, v1
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; return v7
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; }
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test optimize precise-output
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set opt_level=speed
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target x86_64
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function %test1(i8, i8, i8) -> i8 {
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block0(v0: i8, v1: i8, v3: i8):
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v2 = ishl v0, v1
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v4 = ishl v3, v1
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v5 = band v2, v4
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return v5
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}
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; function %test1(i8, i8, i8) -> i8 fast {
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; block0(v0: i8, v1: i8, v3: i8):
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; v6 = band v0, v3
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; v7 = ishl v6, v1
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; return v7
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; }
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function %test2(i16, i16, i16) -> i16 {
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block0(v0: i16, v1: i16, v3: i16):
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v2 = ishl v0, v1
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v4 = ishl v3, v1
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v5 = band v2, v4
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return v5
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}
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; function %test2(i16, i16, i16) -> i16 fast {
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; block0(v0: i16, v1: i16, v3: i16):
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; v6 = band v0, v3
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; v7 = ishl v6, v1
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; return v7
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; }
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function %test3(i32, i32, i32) -> i32 {
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block0(v0: i32, v1: i32, v3: i32):
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v2 = ishl v0, v1
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v4 = ishl v3, v1
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v5 = band v2, v4
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return v5
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}
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; function %test3(i32, i32, i32) -> i32 fast {
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; block0(v0: i32, v1: i32, v3: i32):
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; v6 = band v0, v3
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; v7 = ishl v6, v1
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; return v7
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; }
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function %test4(i64, i64, i64) -> i64 {
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block0(v0: i64, v1: i64, v3: i64):
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v2 = ishl v0, v1
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v4 = ishl v3, v1
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v5 = band v2, v4
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return v5
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}
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; function %test4(i64, i64, i64) -> i64 fast {
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; block0(v0: i64, v1: i64, v3: i64):
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; v6 = band v0, v3
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; v7 = ishl v6, v1
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; return v7
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; }
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test optimize precise-output
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set opt_level=speed
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target x86_64
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function %test1(i8, i8, i8) -> i8 {
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block0(v0: i8, v1: i8, v3: i8):
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v2 = ishl v0, v1
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v4 = ishl v3, v1
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v5 = isub v2, v4
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return v5
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}
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; function %test1(i8, i8, i8) -> i8 fast {
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; block0(v0: i8, v1: i8, v3: i8):
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; v6 = isub v0, v3
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; v7 = ishl v6, v1
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; return v7
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; }
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function %test2(i16, i16, i16) -> i16 {
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block0(v0: i16, v1: i16, v3: i16):
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v2 = ishl v0, v1
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v4 = ishl v3, v1
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v5 = isub v2, v4
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return v5
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}
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; function %test2(i16, i16, i16) -> i16 fast {
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; block0(v0: i16, v1: i16, v3: i16):
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; v6 = isub v0, v3
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; v7 = ishl v6, v1
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; return v7
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; }
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function %test3(i32, i32, i32) -> i32 {
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block0(v0: i32, v1: i32, v3: i32):
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v2 = ishl v0, v1
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v4 = ishl v3, v1
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v5 = isub v2, v4
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return v5
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}
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; function %test3(i32, i32, i32) -> i32 fast {
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; block0(v0: i32, v1: i32, v3: i32):
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; v6 = isub v0, v3
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; v7 = ishl v6, v1
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; return v7
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; }
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function %test4(i64, i64, i64) -> i64 {
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block0(v0: i64, v1: i64, v3: i64):
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v2 = ishl v0, v1
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v4 = ishl v3, v1
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v5 = isub v2, v4
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return v5
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}
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; function %test4(i64, i64, i64) -> i64 fast {
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; block0(v0: i64, v1: i64, v3: i64):
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; v6 = isub v0, v3
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; v7 = ishl v6, v1
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; return v7
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; }
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