Skip to content

Commit af61742

Browse files
vineetgarcvineetgarc
committed
ARC: Boot Digilent#2: Verbose Boot reporting / feature verification
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
1 parent f46121b commit af61742

7 files changed

Lines changed: 490 additions & 11 deletions

File tree

‎arch/arc/Makefile‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,8 @@ export PLATFORM
2020
cflags-y += -Iarch/arc/plat-$(PLATFORM)/include
2121
cflags-y += -mA7 -fno-common -pipe -fno-builtin -D__linux__
2222

23+
LINUXINCLUDE += -include ${src}/arch/arc/include/asm/defines.h
24+
2325
ifdef CONFIG_ARC_CURR_IN_REG
2426
# For a global register defintion, make sure it gets passed to every file
2527
# We had a customer reported bug where some code built in kernel was NOT using

‎arch/arc/include/asm/arcregs.h‎

Lines changed: 112 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -12,8 +12,26 @@
1212
#ifdef __KERNEL__
1313

1414
/* Build Configuration Registers */
15+
#define ARC_REG_DCCMBASE_BCR 0x61 /* DCCM Base Addr */
16+
#define ARC_REG_CRC_BCR 0x62
17+
#define ARC_REG_DVFB_BCR 0x64
18+
#define ARC_REG_EXTARITH_BCR 0x65
1519
#define ARC_REG_VECBASE_BCR 0x68
20+
#define ARC_REG_PERIBASE_BCR 0x69
21+
#define ARC_REG_FP_BCR 0x6B /* Single-Precision FPU */
22+
#define ARC_REG_DPFP_BCR 0x6C /* Dbl Precision FPU */
1623
#define ARC_REG_MMU_BCR 0x6f
24+
#define ARC_REG_DCCM_BCR 0x74 /* DCCM Present + SZ */
25+
#define ARC_REG_TIMERS_BCR 0x75
26+
#define ARC_REG_ICCM_BCR 0x78
27+
#define ARC_REG_XY_MEM_BCR 0x79
28+
#define ARC_REG_MAC_BCR 0x7a
29+
#define ARC_REG_MUL_BCR 0x7b
30+
#define ARC_REG_SWAP_BCR 0x7c
31+
#define ARC_REG_NORM_BCR 0x7d
32+
#define ARC_REG_MIXMAX_BCR 0x7e
33+
#define ARC_REG_BARREL_BCR 0x7f
34+
#define ARC_REG_D_UNCACH_BCR 0x6A
1735

1836
/* status32 Bits Positions */
1937
#define STATUS_H_BIT 0 /* CPU Halted */
@@ -88,16 +106,6 @@
88106
#define TIMER_CTRL_IE (1 << 0) /* Interupt when Count reachs limit */
89107
#define TIMER_CTRL_NH (1 << 1) /* Count only when CPU NOT halted */
90108

91-
#if defined(CONFIG_ARC_MMU_V1)
92-
#define CONFIG_ARC_MMU_VER 1
93-
#elif defined(CONFIG_ARC_MMU_V2)
94-
#define CONFIG_ARC_MMU_VER 2
95-
#elif defined(CONFIG_ARC_MMU_V3)
96-
#define CONFIG_ARC_MMU_VER 3
97-
#else
98-
#error "Error: MMU ver"
99-
#endif
100-
101109
/* MMU Management regs */
102110
#define ARC_REG_TLBPD0 0x405
103111
#define ARC_REG_TLBPD1 0x406
@@ -277,6 +285,13 @@ struct arc_fpu {
277285
***************************************************************
278286
* Build Configuration Registers, with encoded hardware config
279287
*/
288+
struct bcr_identity {
289+
#ifdef CONFIG_CPU_BIG_ENDIAN
290+
unsigned int chip_id:16, cpu_id:8, family:8;
291+
#else
292+
unsigned int family:8, cpu_id:8, chip_id:16;
293+
#endif
294+
};
280295

281296
struct bcr_mmu_1_2 {
282297
#ifdef CONFIG_CPU_BIG_ENDIAN
@@ -296,6 +311,38 @@ struct bcr_mmu_3 {
296311
#endif
297312
};
298313

314+
#define EXTN_SWAP_VALID 0x1
315+
#define EXTN_NORM_VALID 0x2
316+
#define EXTN_MINMAX_VALID 0x2
317+
#define EXTN_BARREL_VALID 0x2
318+
319+
struct bcr_extn {
320+
#ifdef CONFIG_CPU_BIG_ENDIAN
321+
unsigned int pad:20, crc:1, ext_arith:2, mul:2, barrel:2, minmax:2,
322+
norm:2, swap:1;
323+
#else
324+
unsigned int swap:1, norm:2, minmax:2, barrel:2, mul:2, ext_arith:2,
325+
crc:1, pad:20;
326+
#endif
327+
};
328+
329+
/* DSP Options Ref Manual */
330+
struct bcr_extn_mac_mul {
331+
#ifdef CONFIG_CPU_BIG_ENDIAN
332+
unsigned int pad:16, type:8, ver:8;
333+
#else
334+
unsigned int ver:8, type:8, pad:16;
335+
#endif
336+
};
337+
338+
struct bcr_extn_xymem {
339+
#ifdef CONFIG_CPU_BIG_ENDIAN
340+
unsigned int ram_org:2, num_banks:4, bank_sz:4, ver:8;
341+
#else
342+
unsigned int ver:8, bank_sz:4, num_banks:4, ram_org:2;
343+
#endif
344+
};
345+
299346
struct bcr_cache {
300347
#ifdef CONFIG_CPU_BIG_ENDIAN
301348
unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;
@@ -304,6 +351,48 @@ struct bcr_cache {
304351
#endif
305352
};
306353

354+
struct bcr_perip {
355+
#ifdef CONFIG_CPU_BIG_ENDIAN
356+
unsigned int start:8, pad2:8, sz:8, pad:8;
357+
#else
358+
unsigned int pad:8, sz:8, pad2:8, start:8;
359+
#endif
360+
};
361+
struct bcr_iccm {
362+
#ifdef CONFIG_CPU_BIG_ENDIAN
363+
unsigned int base:16, pad:5, sz:3, ver:8;
364+
#else
365+
unsigned int ver:8, sz:3, pad:5, base:16;
366+
#endif
367+
};
368+
369+
/* DCCM Base Address Register: ARC_REG_DCCMBASE_BCR */
370+
struct bcr_dccm_base {
371+
#ifdef CONFIG_CPU_BIG_ENDIAN
372+
unsigned int addr:24, ver:8;
373+
#else
374+
unsigned int ver:8, addr:24;
375+
#endif
376+
};
377+
378+
/* DCCM RAM Configuration Register: ARC_REG_DCCM_BCR */
379+
struct bcr_dccm {
380+
#ifdef CONFIG_CPU_BIG_ENDIAN
381+
unsigned int res:21, sz:3, ver:8;
382+
#else
383+
unsigned int ver:8, sz:3, res:21;
384+
#endif
385+
};
386+
387+
/* Both SP and DP FPU BCRs have same format */
388+
struct bcr_fp {
389+
#ifdef CONFIG_CPU_BIG_ENDIAN
390+
unsigned int fast:1, ver:8;
391+
#else
392+
unsigned int ver:8, fast:1;
393+
#endif
394+
};
395+
307396
/*
308397
*******************************************************************
309398
* Generic structures to hold build configuration used at runtime
@@ -317,9 +406,22 @@ struct cpuinfo_arc_cache {
317406
unsigned int has_aliasing, sz, line_len, assoc, ver;
318407
};
319408

409+
struct cpuinfo_arc_ccm {
410+
unsigned int base_addr, sz;
411+
};
412+
320413
struct cpuinfo_arc {
321414
struct cpuinfo_arc_cache icache, dcache;
322415
struct cpuinfo_arc_mmu mmu;
416+
struct bcr_identity core;
417+
unsigned int timers;
418+
unsigned int vec_base;
419+
unsigned int uncached_base;
420+
struct cpuinfo_arc_ccm iccm, dccm;
421+
struct bcr_extn extn;
422+
struct bcr_extn_xymem extn_xymem;
423+
struct bcr_extn_mac_mul extn_mac_mul;
424+
struct bcr_fp fp, dpfp;
323425
};
324426

325427
extern struct cpuinfo_arc cpuinfo_arc700[];

‎arch/arc/include/asm/defines.h‎

Lines changed: 56 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,56 @@
1+
/*
2+
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3+
*
4+
* This program is free software; you can redistribute it and/or modify
5+
* it under the terms of the GNU General Public License version 2 as
6+
* published by the Free Software Foundation.
7+
*/
8+
9+
#ifndef __ARC_ASM_DEFINES_H__
10+
#define __ARC_ASM_DEFINES_H__
11+
12+
#if defined(CONFIG_ARC_MMU_V1)
13+
#define CONFIG_ARC_MMU_VER 1
14+
#elif defined(CONFIG_ARC_MMU_V2)
15+
#define CONFIG_ARC_MMU_VER 2
16+
#elif defined(CONFIG_ARC_MMU_V3)
17+
#define CONFIG_ARC_MMU_VER 3
18+
#endif
19+
20+
#ifdef CONFIG_ARC_HAS_LLSC
21+
#define __CONFIG_ARC_HAS_LLSC_VAL 1
22+
#else
23+
#define __CONFIG_ARC_HAS_LLSC_VAL 0
24+
#endif
25+
26+
#ifdef CONFIG_ARC_HAS_SWAPE
27+
#define __CONFIG_ARC_HAS_SWAPE_VAL 1
28+
#else
29+
#define __CONFIG_ARC_HAS_SWAPE_VAL 0
30+
#endif
31+
32+
#ifdef CONFIG_ARC_HAS_RTSC
33+
#define __CONFIG_ARC_HAS_RTSC_VAL 1
34+
#else
35+
#define __CONFIG_ARC_HAS_RTSC_VAL 0
36+
#endif
37+
38+
#ifdef CONFIG_ARC_MMU_SASID
39+
#define __CONFIG_ARC_MMU_SASID_VAL 1
40+
#else
41+
#define __CONFIG_ARC_MMU_SASID_VAL 0
42+
#endif
43+
44+
#ifdef CONFIG_ARC_HAS_ICACHE
45+
#define __CONFIG_ARC_HAS_ICACHE 1
46+
#else
47+
#define __CONFIG_ARC_HAS_ICACHE 0
48+
#endif
49+
50+
#ifdef CONFIG_ARC_HAS_DCACHE
51+
#define __CONFIG_ARC_HAS_DCACHE 1
52+
#else
53+
#define __CONFIG_ARC_HAS_DCACHE 0
54+
#endif
55+
56+
#endif /* __ARC_ASM_DEFINES_H__ */

‎arch/arc/include/asm/setup.h‎

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,20 @@
1313

1414
#define COMMAND_LINE_SIZE 256
1515

16+
/*
17+
* Data structure to map a ID to string
18+
* Used a lot for bootup reporting of hardware diversity
19+
*/
20+
struct id_to_str {
21+
int id;
22+
const char *str;
23+
};
24+
25+
struct cpuinfo_data {
26+
struct id_to_str info;
27+
int up_range;
28+
};
29+
1630
extern int root_mountflags, end_mem;
1731
extern int running_on_hw;
1832

0 commit comments

Comments
 (0)