4646#include "RISCVGenCompressedInstructionsInfo.inc"
4747
4848#include "RISCVMapping.h"
49+ #include "../../Mapping.h"
4950
5051#define CONCAT (a , b ) CONCAT_(a, b)
5152#define CONCAT_ (a , b ) a##_##b
@@ -372,9 +373,12 @@ void RISCV_LLVM_printInstruction(MCInst *MI, SStream *O,
372373{
373374 MI -> MRI = (MCRegisterInfo * )info ;
374375
376+ MCInst_setIsAlias (MI , false);
377+ // print the exact instruction text and done
375378 if (MI -> csh -> syntax & CS_OPT_SYNTAX_NO_ALIAS_TEXT ) {
376379 printInstruction (MI , MI -> address , O );
377380 } else {
381+ /* the instruction might be an alias, including in the case of a compressed instruction */
378382 MCInst Uncompressed ;
379383 MCInst_Init (& Uncompressed , MI -> csh -> arch );
380384
@@ -387,9 +391,22 @@ void RISCV_LLVM_printInstruction(MCInst *MI, SStream *O,
387391 Uncompressed .flat_insn = MI -> flat_insn ;
388392 }
389393
390- if (printAliasInstr (McInstr , MI -> address , O ))
391- MI -> isAliasInstr = true;
392- else
394+ if (printAliasInstr (McInstr , MI -> address , O )) {
395+ MCInst_setIsAlias (MI , true);
396+ if (!map_use_alias_details (MI ) && detail_is_set (MI )) {
397+ // disable actual printing
398+ SStream_Close (O );
399+ memset (MI -> flat_insn -> detail -> riscv .operands , 0 ,
400+ sizeof (MI -> flat_insn -> detail -> riscv
401+ .operands ));
402+ MI -> flat_insn -> detail -> riscv .op_count = 0 ;
403+ // re-disassemble again in order to obtain the full details
404+ // including the whole operands array
405+ printInstruction (MI , MI -> address , O );
406+ // re-open the stream to restore the usual state
407+ SStream_Open (O );
408+ }
409+ } else
393410 printInstruction (McInstr , MI -> address , O );
394411 }
395412 RISCV_add_groups (MI );
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