gpio: introduce AfType + unified Pin::set_as_af + Speed::to_mode

Mirrors embassy-stm32 gpio_v1's `AfType` struct and the `set_as_af`
method on `SealedPin`. Drivers can now express any pin direction
(input-with-pull, output push-pull, output open-drain) as a single
`AfType` value built via `AfType::input(pull)` or
`AfType::output(output_type, speed)`, and feed it through one
`set_as_af()` call instead of juggling `set_as_af_output(AFType,
Speed)` + `set_as_input(Pull)` plus a separate `afio_remap()` call.

`Speed::to_mode()` is added as a const helper so `AfType::output` can
stay `const fn`. The pre-existing `From<Speed> for vals::Mode` now
delegates to it.

Drops the previous `From<AFType> for vals::Cnf` direction-overloaded
constants in favor of the explicit `AfType::output` constructor. The
old `set_as_af_output`/`set_as_input` methods remain for backwards
compatibility but new code should reach for `set_as_af` via the
`new_pin!` / `set_as_af!` macros added in the next commit.

Author: andelf

src/gpio.rs

@@ -33,23 +33,29 @@ pub enum Speed {
     High = 0b11,
 }
 
-#[cfg(any(gpio_v3, gpio_v0))]
-impl From<Speed> for vals::Mode {
-    fn from(value: Speed) -> Self {
-        use Speed::*;
-
-        match value {
-            Medium => vals::Mode::OUTPUT_10MHZ,
-            Low => vals::Mode::OUTPUT_2MHZ,
-            High => vals::Mode::OUTPUT_50MHZ,
+impl Speed {
+    /// Compile-time conversion to the `MODEy` field value, family-aware.
+    /// gpio_x0 collapses every speed to OUTPUT_50MHZ — its GPIO doesn't
+    /// expose the slower modes.
+    #[cfg(any(gpio_v3, gpio_v0))]
+    pub const fn to_mode(self) -> vals::Mode {
+        match self {
+            Speed::Medium => vals::Mode::OUTPUT_10MHZ,
+            Speed::Low => vals::Mode::OUTPUT_2MHZ,
+            Speed::High => vals::Mode::OUTPUT_50MHZ,
         }
     }
+
+    #[cfg(gpio_x0)]
+    pub const fn to_mode(self) -> vals::Mode {
+        vals::Mode::OUTPUT_50MHZ
+    }
 }
 
-#[cfg(gpio_x0)]
 impl From<Speed> for vals::Mode {
-    fn from(_value: Speed) -> Self {
-        vals::Mode::OUTPUT_50MHZ
+    #[inline]
+    fn from(value: Speed) -> Self {
+        value.to_mode()
     }
 }
 
@@ -459,6 +465,45 @@ impl From<AFType> for vals::Cnf {
     }
 }
 
+/// Bundle of mode/cnf/pull settings for an alternate-function pin.
+///
+/// Mirrors embassy-stm32's `gpio_v1::AfType`. Drivers pass a single
+/// `AfType` per pin to `Pin::set_as_af()` (via the `new_pin!` /
+/// `set_as_af!` macros) instead of juggling separate `set_as_af_output` /
+/// `set_as_input` calls. On qingke V0/V3 GPIO the AF concept is the same
+/// regardless of direction: input pins set MODE=Input + CNF=Floating/Pull,
+/// output pins set MODE=2/10/50MHz + CNF=AF_PushPull/AF_OpenDrain.
+#[derive(Copy, Clone)]
+pub struct AfType {
+    mode: vals::Mode,
+    cnf: vals::Cnf,
+    pull: Pull,
+}
+
+impl AfType {
+    /// Input AF pin (e.g. UART RX, SPI MISO).
+    pub const fn input(pull: Pull) -> Self {
+        let cnf = match pull {
+            Pull::None => vals::Cnf::FLOATING_IN__OPEN_DRAIN_OUT,
+            // PULL_IN and AF_PUSH_PULL_OUT share the same CNF encoding (0b10);
+            // for input mode this means "input with pull-up/down" and pull
+            // direction comes from ODR via `set_pull` below.
+            _ => vals::Cnf::PULL_IN__AF_PUSH_PULL_OUT,
+        };
+        Self { mode: vals::Mode::INPUT, cnf, pull }
+    }
+
+    /// Output AF pin (e.g. UART TX, SPI MOSI/SCK, I2C SCL/SDA).
+    pub const fn output(output_type: OutputType, speed: Speed) -> Self {
+        let cnf = match output_type {
+            OutputType::PushPull => vals::Cnf::PULL_IN__AF_PUSH_PULL_OUT,
+            #[cfg(not(gpio_x0))]
+            OutputType::OpenDrain => vals::Cnf::AF_OPEN_DRAIN_OUT,
+        };
+        Self { mode: speed.to_mode(), cnf, pull: Pull::None }
+    }
+}
+
 /// Alternate function type settings, CNF, when MODE>0b00
 
 pub(crate) trait SealedPin {
@@ -569,6 +614,15 @@ pub(crate) trait SealedPin {
         self.set_mode_cnf(speed.into(), af_type.into());
     }
 
+    /// Unified AF configuration — preferred by `new_pin!` / `set_as_af!`.
+    /// Mirrors embassy-stm32's `Pin::set_as_af` (gpio_v1 signature).
+    /// `cfg(not(afio))` chips (future H4) will take an extra `af_num: u8`.
+    #[inline]
+    fn set_as_af(&self, af_type: AfType) {
+        self.set_mode_cnf(af_type.mode, af_type.cnf);
+        self.set_pull(af_type.pull);
+    }
+
     /// Analog mode, both input and output
     #[inline]
     fn set_as_analog(&self) {