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Metapac migration#3

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aq1018 wants to merge 19 commits into
mainfrom
metapac-migration
Open

Metapac migration#3
aq1018 wants to merge 19 commits into
mainfrom
metapac-migration

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@aq1018 aq1018 commented May 16, 2026

Rewrites this repo on top of ch32-metapac; replaces the legacy Keil/cargo-flash setup with Rust crates that build directly off the IP-version metadata.

Highlights

  • One algo crate per (flash IP version, CPU arch) pair under algos/; each emits three bins (usr / sys / ob) for the writable regions. VND (factory ESIG) is read-only and skipped.
  • xtask builds every algo crate, extracts each ELF into a RawFlashAlgorithm, and emits one probe-rs target YAML per family to generated/.
  • Chip detection wired through ChipDetectionMethod::WchLink; V2/V3 _ram_code splits resolve via ObRefinement over OB.USER bits 5-7.
  • Per-algo CI matrix (build + fmt + clippy + render) pinned to a ch32-data commit.

Supported chips

Algo crate Flash IP Target triple Chip families Variants
algos/v0 flash_v0 riscv32ec-unknown-none-elf CH32V003, CH641 6
algos/v00x flash_v00x riscv32ec_zmmul-unknown-none-elf CH32V002/4/5/6/7, CH32M007 6
algos/v1 flash_v1 riscv32imac-unknown-none-elf CH32V103 4
algos/f1 flash_v1 thumbv7m-none-eabi CH32F103 (Cortex-M3) 3
algos/v3 flash_v3 riscv32imac-unknown-none-elf CH32V2xx, CH32V3xx 65
algos/x0 flash_x0 riscv32imac-unknown-none-elf CH32X033/034/035, CH643 10
algos/l1 flash_l1 riscv32imac-unknown-none-elf CH32L103 6

100 target variants across 7 family YAMLs.

@aq1018 aq1018 force-pushed the metapac-migration branch 2 times, most recently from a5212bc to 238f254 Compare May 16, 2026 04:22
@aq1018 aq1018 force-pushed the metapac-migration branch from 238f254 to 51ebe13 Compare May 16, 2026 04:37
@aq1018 aq1018 force-pushed the metapac-migration branch from 1f92ba1 to 2d457e2 Compare May 17, 2026 07:39
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