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Further cleanup of RISC-V coprocessor
1 parent 7891c39 commit 2fcb08c

9 files changed

Lines changed: 79 additions & 160 deletions

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‎readme.md‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -403,11 +403,13 @@ features a bare-metal startup _without_ using any of the SDK.
403403
The bare-metal startup was taken from the work of
404404
[Chalandi/Baremetal_esp32s3_nosdk](https://github.com/Chalandi/Baremetal_esp32s3_nosdk).
405405
The dual-core system first boots core0 which subsequently
406-
starts up core1. Blinky runs in the standard `ref_app`
406+
starts up core1 and also starts up the RISC-V coprocessor core.
407+
Blinky runs in the standard `ref_app`
407408
on core0 toggling `port7` while an endless timer loop on core1
408409
toggles `port6`. The LED ports togle in near unison at $\frac{1}{2}~\text{Hz}$.
409410
Self-procured LEDs and resistors need to be fitted in order to observe
410-
blinky on this particular board.
411+
blinky on this particular board. The RISC-V coprocessor
412+
toggles `port17` at a randomly selected frequency of $\sim\frac{2}{3}~\text{Hz}$.
411413

412414
The NXP(R) OM13093 LPC11C24 board ARM(R) Cortex(R)-M0+ configuration
413415
called `target lpc11c24` toggles the LED on `port0.8`.

‎ref_app/src/mcal/xtensa_esp32_s3/mcal_cpu.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -123,11 +123,11 @@ auto mcal::cpu::post_init() noexcept -> void
123123
// Set the private cpu timer1 for core0.
124124
set_cpu_private_timer1(mcal::gpt::timer1_reload());
125125

126-
// Use core0 to start the RISC-V core.
127-
Mcu_StartCoProcessorRiscV();
128-
129126
// Use core0 to start core1.
130127
Mcu_StartCore1();
128+
129+
// Use core0 to start the RISC-V core.
130+
Mcu_StartCoProcessorRiscV();
131131
}
132132

133133
auto mcal::cpu::init() -> void

‎ref_app/target/micros/xtensa_esp32_s3/startup/coprocessor_binary.S‎

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -2,26 +2,26 @@
22
.global coprocessor_bin
33
coprocessor_bin:
44
.byte 0x6F, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
5-
.byte 0x17, 0x11, 0x00, 0x00, 0x13, 0x01, 0x01, 0x42, 0x6F, 0x00, 0x00, 0x0C, 0xA9, 0x67, 0x83, 0xA6
5+
.byte 0x17, 0x11, 0x00, 0x00, 0x13, 0x01, 0x01, 0x42, 0x6F, 0x00, 0x40, 0x0C, 0xA9, 0x67, 0x83, 0xA6
66
.byte 0xC7, 0x4C, 0xB7, 0x05, 0x08, 0x00, 0x37, 0x06, 0x00, 0x10, 0xCD, 0x8E, 0x23, 0xA6, 0xD7, 0x4C
77
.byte 0x23, 0xA8, 0x07, 0x46, 0x83, 0xA6, 0xC7, 0x40, 0x13, 0x87, 0x07, 0x40, 0xD1, 0x8E, 0x23, 0xA6
88
.byte 0xD7, 0x40, 0x03, 0xA6, 0x87, 0x4C, 0x4D, 0x8E, 0x23, 0xA4, 0xC7, 0x4C, 0x23, 0xA6, 0x07, 0x46
99
.byte 0x83, 0xA6, 0xC7, 0x40, 0x37, 0x06, 0x00, 0x18, 0xD1, 0x8E, 0x23, 0xA6, 0xD7, 0x40, 0x23, 0x20
10-
.byte 0x07, 0x00, 0xB7, 0x06, 0x00, 0x08, 0xB7, 0x07, 0x10, 0x00, 0xFD, 0x17, 0xFD, 0xFF, 0x1C, 0x43
11-
.byte 0xB5, 0x8F, 0x1C, 0xC3, 0xCD, 0xBF, 0x00, 0x00, 0x37, 0x07, 0x0C, 0x60, 0x9D, 0x46, 0xBA, 0x87
12-
.byte 0x14, 0xC7, 0x13, 0x07, 0x10, 0x40, 0xB8, 0xD3, 0x82, 0x80, 0x00, 0x00, 0xB7, 0x37, 0x1D, 0x8F
13-
.byte 0x37, 0x87, 0x00, 0x60, 0x93, 0x87, 0xA7, 0x12, 0x23, 0x2C, 0xF7, 0x0A, 0x23, 0x2E, 0x07, 0x08
14-
.byte 0xB7, 0x06, 0x00, 0x40, 0x23, 0x2A, 0xD7, 0x0A, 0xB7, 0x46, 0xD8, 0x50, 0x23, 0x2C, 0x07, 0x0A
15-
.byte 0xB7, 0xF7, 0x01, 0x60, 0x93, 0x86, 0x16, 0xAA, 0xF4, 0xD3, 0x23, 0xA4, 0x07, 0x04, 0x37, 0x47
16-
.byte 0x00, 0x60, 0x23, 0xA2, 0x07, 0x06, 0x23, 0x22, 0x07, 0x00, 0x23, 0x28, 0x07, 0x00, 0xFD, 0x56
17-
.byte 0x54, 0xD3, 0x14, 0xDB, 0x82, 0x80, 0x00, 0x00, 0x41, 0x11, 0x06, 0xC6, 0x22, 0xC4, 0x26, 0xC2
18-
.byte 0x75, 0x37, 0x59, 0x3F, 0xB7, 0x16, 0x00, 0x50, 0x83, 0xA7, 0x86, 0x00, 0x7D, 0x56, 0x93, 0x86
19-
.byte 0x86, 0x00, 0x63, 0x83, 0xC7, 0x02, 0xD8, 0x42, 0x63, 0x00, 0xC7, 0x02, 0x81, 0x47, 0x09, 0xCB
20-
.byte 0x98, 0x42, 0x3E, 0x97, 0x23, 0x00, 0x07, 0x00, 0xD8, 0x42, 0x85, 0x07, 0xE3, 0xEA, 0xE7, 0xFE
21-
.byte 0x9C, 0x46, 0xA1, 0x06, 0xE3, 0x91, 0xC7, 0xFE, 0xB7, 0x17, 0x00, 0x50, 0x83, 0xA7, 0x07, 0x00
22-
.byte 0x37, 0x14, 0x00, 0x50, 0xFD, 0x54, 0x13, 0x04, 0x44, 0x00, 0x63, 0x87, 0x97, 0x00, 0x82, 0x97
23-
.byte 0x1C, 0x40, 0x11, 0x04, 0xE3, 0x9D, 0x97, 0xFE, 0xD5, 0x35, 0x01, 0x00, 0x01, 0x00, 0xF5, 0xBF
24-
.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
10+
.byte 0x07, 0x00, 0xB7, 0x06, 0x00, 0x08, 0xB7, 0x07, 0x0C, 0x00, 0x01, 0x00, 0xFD, 0x17, 0xF5, 0xFF
11+
.byte 0x1C, 0x43, 0xB5, 0x8F, 0x1C, 0xC3, 0xC5, 0xBF, 0x00, 0x00, 0x00, 0x00, 0x37, 0x07, 0x0C, 0x60
12+
.byte 0x9D, 0x46, 0xBA, 0x87, 0x14, 0xC7, 0x13, 0x07, 0x10, 0x40, 0xB8, 0xD3, 0x82, 0x80, 0x00, 0x00
13+
.byte 0xB7, 0x37, 0x1D, 0x8F, 0x37, 0x87, 0x00, 0x60, 0x93, 0x87, 0xA7, 0x12, 0x23, 0x2C, 0xF7, 0x0A
14+
.byte 0x23, 0x2E, 0x07, 0x08, 0xB7, 0x06, 0x00, 0x40, 0x23, 0x2A, 0xD7, 0x0A, 0xB7, 0x46, 0xD8, 0x50
15+
.byte 0x23, 0x2C, 0x07, 0x0A, 0xB7, 0xF7, 0x01, 0x60, 0x93, 0x86, 0x16, 0xAA, 0xF4, 0xD3, 0x23, 0xA4
16+
.byte 0x07, 0x04, 0x37, 0x47, 0x00, 0x60, 0x23, 0xA2, 0x07, 0x06, 0x23, 0x22, 0x07, 0x00, 0x23, 0x28
17+
.byte 0x07, 0x00, 0xFD, 0x56, 0x54, 0xD3, 0x14, 0xDB, 0x82, 0x80, 0x00, 0x00, 0x41, 0x11, 0x06, 0xC6
18+
.byte 0x22, 0xC4, 0x26, 0xC2, 0x75, 0x37, 0x59, 0x3F, 0xB7, 0x16, 0x00, 0x50, 0x83, 0xA7, 0x86, 0x00
19+
.byte 0x7D, 0x56, 0x93, 0x86, 0x86, 0x00, 0x63, 0x83, 0xC7, 0x02, 0xD8, 0x42, 0x63, 0x00, 0xC7, 0x02
20+
.byte 0x81, 0x47, 0x09, 0xCB, 0x98, 0x42, 0x3E, 0x97, 0x23, 0x00, 0x07, 0x00, 0xD8, 0x42, 0x85, 0x07
21+
.byte 0xE3, 0xEA, 0xE7, 0xFE, 0x9C, 0x46, 0xA1, 0x06, 0xE3, 0x91, 0xC7, 0xFE, 0xB7, 0x17, 0x00, 0x50
22+
.byte 0x83, 0xA7, 0x07, 0x00, 0x37, 0x14, 0x00, 0x50, 0xFD, 0x54, 0x13, 0x04, 0x44, 0x00, 0x63, 0x87
23+
.byte 0x97, 0x00, 0x82, 0x97, 0x1C, 0x40, 0x11, 0x04, 0xE3, 0x9D, 0x97, 0xFE, 0xC5, 0x35, 0x01, 0x00
24+
.byte 0x01, 0x00, 0xF5, 0xBF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
2525
.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
2626
.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
2727
.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

‎ref_app/target/micros/xtensa_esp32_s3_riscv_cop/startup/from_no_sdk/Code/Appli/main.cpp‎

Lines changed: 22 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1,24 +1,32 @@
1+
///////////////////////////////////////////////////////////////////////////////
2+
// Copyright Christopher Kormanyos 2025.
3+
// Distributed under the Boost Software License,
4+
// Version 1.0. (See accompanying file LICENSE_1_0.txt
5+
// or copy at http://www.boost.org/LICENSE_1_0.txt)
6+
//
7+
8+
// Originally from:
19
/******************************************************************************************
210
Filename : main.c
3-
11+
412
Core : RISC-V
5-
13+
614
MCU : ESP32-S3
7-
15+
816
Author : Chalandi Amine
9-
17+
1018
Owner : Chalandi Amine
11-
19+
1220
Date : 22.02.2025
13-
21+
1422
Description : Application main function for ULP-RISC-V Co-processor
15-
23+
1624
******************************************************************************************/
1725

1826
//=============================================================================
1927
// Includes
2028
//=============================================================================
21-
#include<stdint.h>
29+
#include <cstdint>
2230

2331
//=============================================================================
2432
// Prototypes
@@ -41,7 +49,6 @@
4149
//=============================================================================
4250
// Macros
4351
//=============================================================================
44-
#define TOGGLE_GPIO18() RTC_GPIO_OUT_REG ^= (1ul << (10 + 18))
4552
#define TOGGLE_GPIO17() RTC_GPIO_OUT_REG ^= (1ul << (10 + 17))
4653

4754

@@ -68,7 +75,11 @@ int main()
6875

6976
for(;;)
7077
{
71-
for(uint32_t i=0; i< 0x100000; i++);
72-
TOGGLE_GPIO17();
78+
for(uint32_t i = 0; i < 0xC0000; i++)
79+
{
80+
__asm("nop");
81+
}
82+
83+
TOGGLE_GPIO17();
7384
}
7485
}

‎ref_app/target/micros/xtensa_esp32_s3_riscv_cop/startup/from_no_sdk/Code/Mcal/Mcu.cpp‎

Lines changed: 9 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,11 @@
1+
///////////////////////////////////////////////////////////////////////////////
2+
// Copyright Christopher Kormanyos 2025.
3+
// Distributed under the Boost Software License,
4+
// Version 1.0. (See accompanying file LICENSE_1_0.txt
5+
// or copy at http://www.boost.org/LICENSE_1_0.txt)
6+
//
7+
8+
// Originally from:
19
/******************************************************************************************
210
Filename : Mcu.c
311
@@ -19,8 +27,6 @@
1927
// Includes
2028
//=============================================================================
2129

22-
//#include "esp32s3.h"
23-
2430
#include <mcal_reg.h>
2531

2632
#include <cstdint>
@@ -32,41 +38,17 @@ void Mcu_InitCore(void);
3238

3339
void Mcu_ClockInit(void)
3440
{
35-
#if 0
36-
/* set the core clock to 240 MHz and APB clock to 80 MHz*/
37-
SYSTEM->CPU_PERI_CLK_EN.reg = 7;
38-
SYSTEM->SYSCLK_CONF.reg = 0x401;
39-
#else
4041
// Set the core clock to 240 MHz and APB clock to 80 MHz.
4142

4243
// SYSTEM->CPU_PERI_CLK_EN.reg = 7;
4344
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::system::cpu_peri_clk_en, static_cast<std::uint32_t>(UINT32_C(7))>::reg_set();
4445

4546
//SYSTEM->SYSCLK_CONF.reg = 0x401;
4647
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::system::sysclk_conf, static_cast<std::uint32_t>(UINT32_C(0x00000401))>::reg_set();
47-
#endif
4848
}
4949

5050
void Mcu_InitCore(void)
5151
{
52-
#if 0
53-
/* disable the super watchdog */
54-
RTC_CNTL->SWD_WPROTECT.reg = 0x8F1D312A;
55-
RTC_CNTL->WDTCONFIG1.reg = 0;
56-
RTC_CNTL->SWD_CONF.reg = (1ul << 30);
57-
RTC_CNTL->SWD_WPROTECT.reg = 0;
58-
59-
/* disable Timer Group 0 WDT */
60-
TIMG0->WDTWPROTECT.reg = 0x50D83AA1;
61-
TIMG0->WDTCONFIG0.reg = 0;
62-
TIMG0->WDTWPROTECT.reg = 0;
63-
64-
/* set all gpio as output low */
65-
GPIO->ENABLE_W1TS.reg = 0xFFFFFFFF;
66-
GPIO->ENABLE1_W1TS.reg = 0xFFFFFFFF;
67-
GPIO->OUT.reg = 0;
68-
GPIO->OUT1.reg = 0;
69-
#else
7052
// Disable the super watchdog.
7153

7254
// RTC_CNTL->SWD_WPROTECT.reg = 0x8F1D312A;
@@ -88,6 +70,7 @@ void Mcu_InitCore(void)
8870
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::timg0::wdtwprotect, static_cast<std::uint32_t>(UINT32_C(0x00000000))>::reg_set();
8971

9072
// Set all gpio as output low.
73+
9174
//GPIO->OUT.reg = 0;
9275
//GPIO->OUT1.reg = 0;
9376
//GPIO->ENABLE_W1TS.reg = 0xFFFFFFFF;
@@ -96,7 +79,6 @@ void Mcu_InitCore(void)
9679
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::gpio::out1, static_cast<std::uint32_t>(UINT32_C(0x00000000))>::reg_set();
9780
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::gpio::enable_w1ts, static_cast<std::uint32_t>(UINT32_C(0xFFFFFFFF))>::reg_set();
9881
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::gpio::enable1_w1ts, static_cast<std::uint32_t>(UINT32_C(0xFFFFFFFF))>::reg_set();
99-
#endif
10082
}
10183

10284
} // extern "C"

‎ref_app/target/micros/xtensa_esp32_s3_riscv_cop/startup/from_no_sdk/Code/Startup/IntVectTable.S‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,12 @@
1+
/******************************************************************************************
2+
// Copyright Christopher Kormanyos 2025.
3+
// Distributed under the Boost Software License,
4+
// Version 1.0. (See accompanying file LICENSE_1_0.txt
5+
// or copy at http://www.boost.org/LICENSE_1_0.txt)
6+
//
7+
******************************************************************************************/
8+
9+
/* Originally from: */
110
/******************************************************************************************
211
Filename : IntVectTable.S
312

‎ref_app/target/micros/xtensa_esp32_s3_riscv_cop/startup/from_no_sdk/Code/Startup/Startup.c‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,10 @@
1+
///////////////////////////////////////////////////////////////////////////////
2+
// Copyright Christopher Kormanyos 2025.
3+
// Distributed under the Boost Software License,
4+
// Version 1.0. (See accompanying file LICENSE_1_0.txt
5+
// or copy at http://www.boost.org/LICENSE_1_0.txt)
6+
//
7+
18
// ***************************************************************************************
29
// Filename : Startup.c
310
//

‎ref_app/target/micros/xtensa_esp32_s3_riscv_cop/startup/from_no_sdk/Code/Startup/boot.S‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,12 @@
1+
/******************************************************************************************
2+
// Copyright Christopher Kormanyos 2025.
3+
// Distributed under the Boost Software License,
4+
// Version 1.0. (See accompanying file LICENSE_1_0.txt
5+
// or copy at http://www.boost.org/LICENSE_1_0.txt)
6+
//
7+
******************************************************************************************/
8+
9+
/* Originally from: */
110
/******************************************************************************************
211
Filename : boot.S
312

‎ref_app/target/micros/xtensa_esp32_s3_riscv_cop/startup/from_no_sdk/Code/Startup/custom_ops.h‎

Lines changed: 0 additions & 101 deletions
This file was deleted.

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