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ckormanyosckormanyos
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Finish C++-ification BL602 with LD-script TBD
1 parent c3b8e49 commit 99a3fde

11 files changed

Lines changed: 60 additions & 1260 deletions

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‎ref_app/ref_app.vcxproj‎

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<ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
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<ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
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</ClInclude>
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<ClInclude Include="src\mcal\bl602_sifive_e24_riscv\BL602.h">
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<ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
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<ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
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</ClInclude>
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<ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_benchmark.h">
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<ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
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<ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>

‎ref_app/ref_app.vcxproj.filters‎

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<ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_benchmark.h">
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<Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
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</ClInclude>
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<ClInclude Include="src\mcal\bl602_sifive_e24_riscv\BL602.h">
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<Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
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</ClInclude>
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</ItemGroup>
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<ItemGroup>
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<None Include="src\util\STL\algorithm">

‎ref_app/src/mcal/bl602_sifive_e24_riscv/BL602.h‎

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‎ref_app/src/mcal/bl602_sifive_e24_riscv/mcal_benchmark.h‎

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{
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namespace benchmark
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{
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using benchmark_port_type = mcal::port::port_pin;
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using benchmark_port_type = mcal::port::port_pin<unsigned { UINT8_C(4) }>;
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}
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}
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‎ref_app/src/mcal/bl602_sifive_e24_riscv/mcal_cpu.h‎

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#ifndef MCAL_CPU_2025_07_30_H
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#define MCAL_CPU_2025_07_30_H
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#if defined(__cplusplus)
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#include <cstdint>
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#else
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#include <stdint.h>
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#endif
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#if defined(__cplusplus)
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extern "C"
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{
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#endif
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void mcal_cpu_secure_acquire_spin_lock(volatile uint32_t*);
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void mcal_cpu_secure_release_spin_lock(volatile uint32_t*);
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static inline void mcal_cpu_nop(void);
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#if defined(__cplusplus)
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}
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#endif
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#if defined(__cplusplus)
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namespace mcal
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{
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namespace cpu
@@ -38,25 +19,7 @@
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inline auto post_init() -> void { }
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inline auto nop() noexcept -> void { asm volatile("nop"); }
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struct secure
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{
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static auto acquire_spin_lock(volatile std::uint32_t* p_sync) noexcept -> void { mcal_cpu_secure_acquire_spin_lock(p_sync); }
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static auto release_spin_lock(volatile std::uint32_t* p_sync) noexcept -> void { mcal_cpu_secure_release_spin_lock(p_sync); }
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};
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}
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}
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#endif
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#if defined(__cplusplus)
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extern "C"
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{
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#endif
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static inline void mcal_cpu_nop(void) { __asm volatile("nop"); }
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#if defined(__cplusplus)
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}
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#endif
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#endif // MCAL_CPU_2025_07_30_H

‎ref_app/src/mcal/bl602_sifive_e24_riscv/mcal_led.cpp‎

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///////////////////////////////////////////////////////////////////////////////
2-
// Copyright Christopher Kormanyos 2025.
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// Copyright Christopher Kormanyos 2007 - 2025.
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// Distributed under the Boost Software License,
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// Version 1.0. (See accompanying file LICENSE_1_0.txt
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// or copy at http://www.boost.org/LICENSE_1_0.txt)
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//
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8-
#include <mcal_led/mcal_led_boolean_state_base.h>
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#include <mcal_led.h>
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#include <mcal_reg.h>
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#include <util/utility/util_time.h>
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namespace
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{
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constexpr std::uint32_t GPIO_FUN_SDIO { UINT32_C( 1) };
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constexpr std::uint32_t GPIO_FUN_FLASH { UINT32_C( 2) };
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constexpr std::uint32_t GPIO_FUN_SPI { UINT32_C( 4) };
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constexpr std::uint32_t GPIO_FUN_I2C { UINT32_C( 6) };
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constexpr std::uint32_t GPIO_FUN_UART { UINT32_C( 7) };
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constexpr std::uint32_t GPIO_FUN_PWM { UINT32_C( 8) };
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constexpr std::uint32_t GPIO_FUN_EXT_PA { UINT32_C( 9) };
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constexpr std::uint32_t GPIO_FUN_ANALOG { UINT32_C(10) };
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constexpr std::uint32_t GPIO_FUN_SWGPIO { UINT32_C(11) };
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constexpr std::uint32_t GPIO_FUN_JTAG { UINT32_C(14) };
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} // anonymous namespace
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class led_port_tmp_bl606 : public mcal::led::led_boolean_state_base
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{
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public:
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led_port_tmp_bl606() noexcept
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{
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// Configure IO3 as output, low.
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// glb->GPIO_CFGCTL1.bit.reg_gpio_3_func_sel = GPIO_FUN_SWGPIO;
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// glb->GPIO_CFGCTL1.bit.reg_gpio_3_ie = 0ul;
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// glb->GPIO_CFGCTL1.bit.reg_gpio_3_smt = 0ul;
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// glb->GPIO_CFGCTL1.bit.reg_gpio_3_drv = 0ul;
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// glb->GPIO_CFGCTL34.bit.reg_gpio_3_oe = 1ul;
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mcal::reg::reg_access_static<std::uintptr_t, std::uint32_t, mcal::reg::gpio_cfgctl1, static_cast<std::uint32_t>(GPIO_FUN_SWGPIO << 24U)>::template reg_msk<static_cast<std::uint32_t>(UINT32_C(0xF) << 24U)>();
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mcal::reg::reg_access_static<std::uintptr_t, std::uint32_t, mcal::reg::gpio_cfgctl1, UINT32_C(16)>::bit_clr();
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mcal::reg::reg_access_static<std::uintptr_t, std::uint32_t, mcal::reg::gpio_cfgctl1, UINT32_C(17)>::bit_clr();
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mcal::reg::reg_access_static<std::uintptr_t, std::uint32_t, mcal::reg::gpio_cfgctl1, UINT32_C(0) << 18U>::template reg_msk<UINT32_C(3) << 18U>();
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mcal::reg::reg_access_static<std::uintptr_t, std::uint32_t, mcal::reg::gpio_cfgctl34, UINT32_C(3)>::bit_set();
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}
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~led_port_tmp_bl606() override = default;
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auto toggle() noexcept -> void override
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{
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// Toggle the IO3 pin.
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// glb->GPIO_CFGCTL32.bit.reg_gpio_3_o ^= 1ul;
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mcal::reg::reg_access_static<std::uintptr_t, std::uint32_t, mcal::reg::gpio_cfgctl32, UINT32_C(3)>::bit_not();
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using base_class_type = led_boolean_state_base;
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base_class_type::toggle();
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}
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};
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#include <mcal_led/mcal_led_port.h>
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auto mcal::led::led0() -> mcal::led::led_base&
6012
{
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using led0_led_type = led_port_tmp_bl606;
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using led0_port_type = mcal::port::port_pin<unsigned { UINT8_C(3) }>;
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15+
using led0_led_type = mcal::led::led_port<led0_port_type>;
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static led0_led_type l0;
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return l0;
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}
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‎ref_app/src/mcal/bl602_sifive_e24_riscv/mcal_led.h‎

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///////////////////////////////////////////////////////////////////////////////
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// Copyright Christopher Kormanyos 2007 - 2024.
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// Copyright Christopher Kormanyos 2007 - 2025.
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// Distributed under the Boost Software License,
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// Version 1.0. (See accompanying file LICENSE_1_0.txt
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// or copy at http://www.boost.org/LICENSE_1_0.txt)

‎ref_app/src/mcal/bl602_sifive_e24_riscv/mcal_osc.cpp‎

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///////////////////////////////////////////////////////////////////////////////
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// Copyright Christopher Kormanyos 2007 - 2024.
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// Copyright Christopher Kormanyos 2007 - 2025.
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// Distributed under the Boost Software License,
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// Version 1.0. (See accompanying file LICENSE_1_0.txt
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// or copy at http://www.boost.org/LICENSE_1_0.txt)

‎ref_app/src/mcal/bl602_sifive_e24_riscv/mcal_port.h‎

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2323
void init(const config_type*);
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25+
template<const unsigned PortIndex>
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class port_pin
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{
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private:
29+
static constexpr std::uint32_t GPIO_FUN_SDIO { UINT32_C( 1) };
30+
static constexpr std::uint32_t GPIO_FUN_FLASH { UINT32_C( 2) };
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static constexpr std::uint32_t GPIO_FUN_SPI { UINT32_C( 4) };
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static constexpr std::uint32_t GPIO_FUN_I2C { UINT32_C( 6) };
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static constexpr std::uint32_t GPIO_FUN_UART { UINT32_C( 7) };
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static constexpr std::uint32_t GPIO_FUN_PWM { UINT32_C( 8) };
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static constexpr std::uint32_t GPIO_FUN_EXT_PA { UINT32_C( 9) };
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static constexpr std::uint32_t GPIO_FUN_ANALOG { UINT32_C(10) };
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static constexpr std::uint32_t GPIO_FUN_SWGPIO { UINT32_C(11) };
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static constexpr std::uint32_t GPIO_FUN_JTAG { UINT32_C(14) };
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40+
static constexpr std::uint32_t port_index { static_cast<std::uint32_t>(PortIndex) };
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42+
static constexpr bool odd_index { ((PortIndex % unsigned { UINT8_C(2) }) != unsigned { UINT8_C(0) }) };
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44+
static constexpr std::uintptr_t
45+
cfgctl
46+
{
47+
static_cast<std::uintptr_t>
48+
(
49+
mcal::reg::gpio_cfgctl0 + (port_index / 2U) * 4U
50+
)
51+
};
52+
53+
static constexpr unsigned cfgctl_bpos_reg_gpio_3_func_sel { odd_index ? UINT8_C(24) : UINT8_C(24) - UINT8_C(16) };
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static constexpr unsigned cfgctl_bpos_reg_gpio_3_ie { odd_index ? UINT8_C(16) : UINT8_C(16) - UINT8_C(16) };
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static constexpr unsigned cfgctl_bpos_reg_gpio_3_smt { odd_index ? UINT8_C(17) : UINT8_C(17) - UINT8_C(16) };
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static constexpr unsigned cfgctl_bpos_reg_gpio_3_drv { odd_index ? UINT8_C(18) : UINT8_C(18) - UINT8_C(16) };
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2758
public:
2859
static auto set_direction_output() noexcept -> void
2960
{
30-
// Not yet implemented.
61+
mcal::reg::reg_access_static<std::uintptr_t, std::uint32_t, cfgctl, static_cast<std::uint32_t>(GPIO_FUN_SWGPIO << cfgctl_bpos_reg_gpio_3_func_sel)>::template reg_msk<static_cast<std::uint32_t>(UINT32_C(0xF) << cfgctl_bpos_reg_gpio_3_func_sel)>();
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mcal::reg::reg_access_static<std::uintptr_t, std::uint32_t, cfgctl, cfgctl_bpos_reg_gpio_3_ie>::bit_clr();
63+
mcal::reg::reg_access_static<std::uintptr_t, std::uint32_t, cfgctl, cfgctl_bpos_reg_gpio_3_smt>::bit_clr();
64+
mcal::reg::reg_access_static<std::uintptr_t, std::uint32_t, cfgctl, UINT32_C(0) << cfgctl_bpos_reg_gpio_3_drv>::template reg_msk<UINT32_C(3) << cfgctl_bpos_reg_gpio_3_drv>();
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66+
mcal::reg::reg_access_static<std::uintptr_t, std::uint32_t, mcal::reg::gpio_cfgctl34, port_index>::bit_set();
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}
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3369
static auto set_direction_input() noexcept -> void
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5490
static auto toggle_pin() noexcept -> void
5591
{
56-
// Not yet implemented.
92+
mcal::reg::reg_access_static<std::uintptr_t, std::uint32_t, mcal::reg::gpio_cfgctl32, port_index>::bit_not();
5793
}
5894
};
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}

‎ref_app/src/mcal/bl602_sifive_e24_riscv/mcal_pwm.h‎

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///////////////////////////////////////////////////////////////////////////////
2-
// Copyright Christopher Kormanyos 2007 - 2020.
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// Copyright Christopher Kormanyos 2007 - 2025.
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// Distributed under the Boost Software License,
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// Version 1.0. (See accompanying file LICENSE_1_0.txt
55
// or copy at http://www.boost.org/LICENSE_1_0.txt)

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