esp32s3 cleanup and add cop main

Author: ckormanyos

ref_app/target.vcxproj

@@ -1146,6 +1146,7 @@
     <ClCompile Include="target\micros\xtensa_esp32_s3\startup\crt0_init_ram.cpp" />
     <ClCompile Include="target\micros\xtensa_esp32_s3\startup\crt1.cpp" />
     <ClCompile Include="target\micros\xtensa_esp32_s3\startup\Std\StdLib.cpp" />
+    <ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Appli\main.cpp" />
     <ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Startup\Startup.c" />
   </ItemGroup>
   <ItemGroup>

ref_app/target.vcxproj.filters

@@ -295,6 +295,9 @@
     <Filter Include="micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Startup">
       <UniqueIdentifier>{66ae9aa3-915d-4366-9492-87cdb30add93}</UniqueIdentifier>
     </Filter>
+    <Filter Include="micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Appli">
+      <UniqueIdentifier>{7b9aadde-8fde-47da-bd4b-d348e1b2778d}</UniqueIdentifier>
+    </Filter>
   </ItemGroup>
   <ItemGroup>
     <None Include="target\app\make\app_files.gmk">
@@ -992,6 +995,9 @@
     <ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Startup\Startup.c">
       <Filter>micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Startup</Filter>
     </ClCompile>
+    <ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Appli\main.cpp">
+      <Filter>micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Appli</Filter>
+    </ClCompile>
   </ItemGroup>
   <ItemGroup>
     <Text Include="target\micros\bcm2835_raspi_b\startup\SD_CARD\PiZero\config.txt">

ref_app/target/micros/xtensa_esp32_s3/make/xtensa_esp32_s3.ld

@@ -54,6 +54,8 @@ SECTIONS
     . = ALIGN(4);
     *(.vector*)
     . = ALIGN(4);
+    *(.startup*)
+    . = ALIGN(4);
     *(.literal)
     . = ALIGN(4);
     *(.literal*)

ref_app/target/micros/xtensa_esp32_s3/make/xtensa_esp32_s3_flags.gmk

@@ -63,7 +63,6 @@ TGT_AFLAGS    =
 
 TGT_LDFLAGS   = -nostartfiles                                                     \
                 -nostdlib                                                         \
-                -e _start                                                         \
                 -L$(PATH_TGT)/startup/Std/lib_call0_abi                           \
                 -Wl,--gc-sections                                                 \
                 -Wl,-Map,$(APP).map                                               \

ref_app/target/micros/xtensa_esp32_s3/startup/boot.S

@@ -31,7 +31,7 @@
 
   \return
 ********************************************************************************************/
-.section .text
+.section .startup,"ax"
 .type _start, @function
 .align 4
 .extern __CORE0_STACK_TOP

ref_app/target/micros/xtensa_esp32_s3_riscv_cop/make/xtensa_esp32_s3_riscv_cop_files.gmk

@@ -9,7 +9,10 @@
 # File list of the ESP32-S3 RISC-V coprocessor files in the project
 # ------------------------------------------------------------------------------
 
+FILES_CPP      :=
+
 FILES_TGT      := $(PATH_APP)/mcal/mcal_gcc_cxx_completion                                \
+                  $(PATH_TGT)/startup/from_no_sdk/Appli/main                              \
                   $(PATH_TGT)/startup/from_no_sdk/Startup/boot                            \
                   $(PATH_TGT)/startup/from_no_sdk/Startup/IntVectTable                    \
                   $(PATH_TGT)/startup/from_no_sdk/Startup/Startup

ref_app/target/micros/xtensa_esp32_s3_riscv_cop/startup/from_no_sdk/Appli/main.cpp

@@ -0,0 +1,25 @@
+/******************************************************************************************
+  Filename    : main.c
+  
+  Core        : RISC-V
+  
+  MCU         : ESP32-S3
+    
+  Author      : Chalandi Amine
+ 
+  Owner       : Chalandi Amine
+  
+  Date        : 22.02.2025
+  
+  Description : Application main function for ULP-RISC-V Co-processor
+  
+******************************************************************************************/
+
+int main()
+{
+  for(;;)
+  {
+    ;
+  }
+}
+