Support BL602 sifive E24 risc-v target

[ckormanyos]

Prototyping is available as sample at Chalandi/Baremetal_BL602_SiFive_E24_RISC-V.

[ckormanyos]

OK a local board setup is fully functional based on the above-mentioned sample. It can now be adapted to the ref_app. As usual, we will begin with a 1-to-1 port of the original work and evolve that into the standard ref_app C++ form.

[ckormanyos]

Partial adaption to the ref_app standard form is complete. It still needs C++-ification of the registers and the implementation of the (mostly stubbed) MCAL. The timer is running. Wdt will simply be stubbed.

[ckormanyos]

Adaption is mostly finished for ref_app. Small adaptions to the linker script are anticipated for running all the benchmarks (TBD). And with this effort, we can clost this issue.

Benchmark compatibility will be handled in a futur issue.

[ckormanyos]

See also #683 and #684