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1 change: 0 additions & 1 deletion ref_app/src/mcal/xtensa_esp32_s3/mcal_cpu.h
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,6 @@
#define MY_PROGMEM

#include <cstdint>
#include <type_traits>

namespace mcal { namespace cpu {

Expand Down
10 changes: 6 additions & 4 deletions ref_app/src/mcal/xtensa_esp32_s3_riscv_cop/mcal_cpu.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -6,11 +6,13 @@
//

#include <mcal_cpu.h>

auto mcal::cpu::post_init() noexcept -> void
{
}
#include <mcal_osc.h>
#include <mcal_port.h>
#include <mcal_wdg.h>

auto mcal::cpu::init() -> void
{
mcal::wdg::init(nullptr);
mcal::port::init(nullptr);
mcal::osc::init(nullptr);
}
3 changes: 1 addition & 2 deletions ref_app/src/mcal/xtensa_esp32_s3_riscv_cop/mcal_cpu.h
Original file line number Diff line number Diff line change
Expand Up @@ -11,13 +11,12 @@
#define MY_PROGMEM

#include <cstdint>
#include <type_traits>

namespace mcal { namespace cpu {

auto init() -> void;

auto post_init() noexcept -> void;
inline auto post_init() noexcept -> void { }

inline auto nop() noexcept -> void { asm volatile("nop"); }

Expand Down
7 changes: 7 additions & 0 deletions ref_app/src/mcal/xtensa_esp32_s3_riscv_cop/mcal_osc.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -10,4 +10,11 @@

void mcal::osc::init(const config_type*)
{
// Set the core clock to 240 MHz and APB clock to 80 MHz.

// SYSTEM->CPU_PERI_CLK_EN.reg = 7;
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::system::cpu_peri_clk_en, static_cast<std::uint32_t>(UINT32_C(7))>::reg_set();

//SYSTEM->SYSCLK_CONF.reg = 0x401;
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::system::sysclk_conf, static_cast<std::uint32_t>(UINT32_C(0x00000401))>::reg_set();
}
172 changes: 171 additions & 1 deletion ref_app/src/mcal/xtensa_esp32_s3_riscv_cop/mcal_reg.h

Large diffs are not rendered by default.

19 changes: 19 additions & 0 deletions ref_app/src/mcal/xtensa_esp32_s3_riscv_cop/mcal_wdg.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,25 @@

void mcal::wdg::init(const config_type*)
{
// Disable the super watchdog.

// RTC_CNTL->SWD_WPROTECT.reg = 0x8F1D312A;
// RTC_CNTL->WDTCONFIG1.reg = 0;
// RTC_CNTL->SWD_CONF.reg = (1ul << 30);
// RTC_CNTL->SWD_WPROTECT.reg = 0;
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::rtc_cntl::swd_wprotect, static_cast<std::uint32_t>(UINT32_C(0x8F1D312A))>::reg_set();
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::rtc_cntl::wdtconfig1, static_cast<std::uint32_t>(UINT32_C(0x00000000))>::reg_set();
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::rtc_cntl::swd_conf, static_cast<std::uint32_t>(UINT32_C(0x40000000))>::reg_set();
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::rtc_cntl::swd_wprotect, static_cast<std::uint32_t>(UINT32_C(0x00000000))>::reg_set();

// Disable Timer Group 0 WDT.

// TIMG0->WDTWPROTECT.reg = 0x50D83AA1;
// TIMG0->WDTCONFIG0.reg = 0;
// TIMG0->WDTWPROTECT.reg = 0;
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::timg0::wdtwprotect, static_cast<std::uint32_t>(UINT32_C(0x50D83AA1))>::reg_set();
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::timg0::wdtconfig0, static_cast<std::uint32_t>(UINT32_C(0x00000000))>::reg_set();
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::timg0::wdtwprotect, static_cast<std::uint32_t>(UINT32_C(0x00000000))>::reg_set();
}

void mcal::wdg::secure::trigger()
Expand Down
14 changes: 7 additions & 7 deletions ref_app/target.vcxproj
Original file line number Diff line number Diff line change
Expand Up @@ -1041,9 +1041,9 @@
<None Include="target\micros\xtensa_esp32_s3_riscv_cop\make\xtensa_esp32_s3_riscv_cop.ld" />
<None Include="target\micros\xtensa_esp32_s3_riscv_cop\make\xtensa_esp32_s3_riscv_cop_files.gmk" />
<None Include="target\micros\xtensa_esp32_s3_riscv_cop\make\xtensa_esp32_s3_riscv_cop_flags.gmk" />
<None Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Startup\boot.S" />
<None Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Startup\IntVectTable.S" />
<None Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Scripts\bin2asm.py" />
<None Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\boot.S" />
<None Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\IntVectTable.S" />
<None Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\Scripts\bin2asm.py" />
</ItemGroup>
<ItemGroup>
<ClCompile Include="target\micros\am335x\startup\crt0.cpp" />
Expand Down Expand Up @@ -1148,10 +1148,10 @@
<ClCompile Include="target\micros\xtensa_esp32_s3\startup\crt0_init_ram.cpp" />
<ClCompile Include="target\micros\xtensa_esp32_s3\startup\crt1.cpp" />
<ClCompile Include="target\micros\xtensa_esp32_s3\startup\Std\StdLib.cpp" />
<ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Appli\main.cpp" />
<ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Startup\crt0.cpp" />
<ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Startup\crt0_init_ram.cpp" />
<ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Startup\crt1.cpp" />
<ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\crt0.cpp" />
<ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\crt0_init_ram.cpp" />
<ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\crt1.cpp" />
<ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\main.cpp" />
</ItemGroup>
<ItemGroup>
<Text Include="target\micros\bcm2835_raspi_b\startup\SD_CARD\PiZero\config.txt" />
Expand Down
46 changes: 17 additions & 29 deletions ref_app/target.vcxproj.filters
Original file line number Diff line number Diff line change
Expand Up @@ -289,19 +289,7 @@
<Filter Include="micros\xtensa_esp32_s3_riscv_cop\startup">
<UniqueIdentifier>{a71738e7-0c88-4bb9-a1bd-3a5ffd125490}</UniqueIdentifier>
</Filter>
<Filter Include="micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk">
<UniqueIdentifier>{bb1fed00-c4cd-4e52-833d-16cf0f69bc10}</UniqueIdentifier>
</Filter>
<Filter Include="micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code">
<UniqueIdentifier>{de099968-fa17-4f75-b098-50ed5325d04f}</UniqueIdentifier>
</Filter>
<Filter Include="micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Appli">
<UniqueIdentifier>{7b9aadde-8fde-47da-bd4b-d348e1b2778d}</UniqueIdentifier>
</Filter>
<Filter Include="micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Startup">
<UniqueIdentifier>{66ae9aa3-915d-4366-9492-87cdb30add93}</UniqueIdentifier>
</Filter>
<Filter Include="micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Scripts">
<Filter Include="micros\xtensa_esp32_s3_riscv_cop\startup\Scripts">
<UniqueIdentifier>{1a0b187b-0ef0-4365-b263-303097393b67}</UniqueIdentifier>
</Filter>
</ItemGroup>
Expand Down Expand Up @@ -684,17 +672,17 @@
<None Include="target\micros\xtensa_esp32_s3_riscv_cop\make\xtensa_esp32_s3_riscv_cop_flags.gmk">
<Filter>micros\xtensa_esp32_s3_riscv_cop\make</Filter>
</None>
<None Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Startup\IntVectTable.S">
<Filter>micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Startup</Filter>
<None Include="target\micros\xtensa_esp32_s3\startup\coprocessor_binary.S">
<Filter>micros\xtensa_esp32_s3\startup</Filter>
</None>
<None Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Startup\boot.S">
<Filter>micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Startup</Filter>
<None Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\Scripts\bin2asm.py">
<Filter>micros\xtensa_esp32_s3_riscv_cop\startup\Scripts</Filter>
</None>
<None Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Scripts\bin2asm.py">
<Filter>micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Scripts</Filter>
<None Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\boot.S">
<Filter>micros\xtensa_esp32_s3_riscv_cop\startup</Filter>
</None>
<None Include="target\micros\xtensa_esp32_s3\startup\coprocessor_binary.S">
<Filter>micros\xtensa_esp32_s3\startup</Filter>
<None Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\IntVectTable.S">
<Filter>micros\xtensa_esp32_s3_riscv_cop\startup</Filter>
</None>
</ItemGroup>
<ItemGroup>
Expand Down Expand Up @@ -1004,17 +992,17 @@
<ClCompile Include="target\micros\xtensa_esp32_s3\startup\Std\StdLib.cpp">
<Filter>micros\xtensa_esp32_s3\startup\Std</Filter>
</ClCompile>
<ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Appli\main.cpp">
<Filter>micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Appli</Filter>
<ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\crt0.cpp">
<Filter>micros\xtensa_esp32_s3_riscv_cop\startup</Filter>
</ClCompile>
<ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Startup\crt1.cpp">
<Filter>micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Startup</Filter>
<ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\crt0_init_ram.cpp">
<Filter>micros\xtensa_esp32_s3_riscv_cop\startup</Filter>
</ClCompile>
<ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Startup\crt0.cpp">
<Filter>micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Startup</Filter>
<ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\crt1.cpp">
<Filter>micros\xtensa_esp32_s3_riscv_cop\startup</Filter>
</ClCompile>
<ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Startup\crt0_init_ram.cpp">
<Filter>micros\xtensa_esp32_s3_riscv_cop\startup\from_no_sdk\Code\Startup</Filter>
<ClCompile Include="target\micros\xtensa_esp32_s3_riscv_cop\startup\main.cpp">
<Filter>micros\xtensa_esp32_s3_riscv_cop\startup</Filter>
</ClCompile>
</ItemGroup>
<ItemGroup>
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -15,20 +15,6 @@ GCC_PREFIX = xtensa-esp32s3-elf

TGT_SUFFIX = elf

WARN_FLAGS := -Wall \
-Wextra \
-Wpointer-arith \
-Wno-maybe-uninitialized \
-Wno-unused-function \
-Wno-unused-but-set-variable \
-Wno-unused-variable \
-Wno-deprecated-declarations \
-Wno-unused-parameter \
-Wno-unused-but-set-parameter \
-Wno-missing-field-initializers \
-Wno-sign-compare \
-Wno-main


include $(PATH_TGT_MAKE)/$(TGT)_flags_extra.gmk

Expand All @@ -47,6 +33,7 @@ TGT_ALLFLAGS = -O1
-fno-stack-protector \
-nostdlib \
-gdwarf-4 \
-ffreestanding \
-DCONFIG_IDF_TARGET_ESP32S3 \
-DI_KNOW_WHAT_I_AM_DOING

Expand Down
58 changes: 37 additions & 21 deletions ref_app/target/micros/xtensa_esp32_s3/startup/Std/StdLib.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -23,6 +23,7 @@

******************************************************************************************/

#include <cstddef>
#include <cstdint>
#include <cstring>

Expand All @@ -32,13 +33,15 @@ typedef signed long long DItype __attribute__((mode (DI)));
typedef unsigned long long UDItype __attribute__((mode (DI)));
typedef unsigned int USItype __attribute__((mode (SI)));

extern int __builtin_clzll(long long unsigned int);
extern int __builtin_clzll(unsigned long long);

#define DWtype DItype
#define UDWtype UDItype
#define UWtype USItype

UDWtype __udivdi3 (UDWtype n, UDWtype d);
UDWtype __udivmoddi4 (UDWtype n, UDWtype d, UDWtype *rp);
UDWtype __umoddi3 (UDWtype u, UDWtype v);

UDWtype __udivdi3 (UDWtype n, UDWtype d)
{
Expand Down Expand Up @@ -69,8 +72,8 @@ UDWtype __udivmoddi4 (UDWtype n, UDWtype d, UDWtype *rp)

if (y <= r)
{
lz1 = __builtin_clzll (d);
lz2 = __builtin_clzll (n);
lz1 = static_cast<USItype>(__builtin_clzll(static_cast<unsigned long long>(d)));
lz2 = static_cast<USItype>(__builtin_clzll(static_cast<unsigned long long>(n)));

k = lz1 - lz2;
y = (y << k);
Expand Down Expand Up @@ -128,39 +131,48 @@ UDWtype __udivmoddi4 (UDWtype n, UDWtype d, UDWtype *rp)
return q;
}

#if defined(__GNUC__)
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wcast-align"
#endif

void* memset(void* str, int c, size_t n)
{
uint8_t *ptr = (uint8_t*) str;
uint32_t value = (uint8_t) c;
std::uint8_t* ptr { reinterpret_cast<std::uint8_t*>(str) };

const std::uint8_t uc { static_cast<std::uint8_t>(c) };

std::uint32_t value = static_cast<std::uint32_t>(uc);

// Set value to repeat the byte across a 32-bit word.
value |= value << 8;
value |= value << 16;
value |= value << unsigned { UINT8_C( 8) };
value |= value << unsigned { UINT8_C(16) };

// Align to the next 32-bit boundary.
while (((uintptr_t)ptr & 3) && n > 0)
while ( (static_cast<unsigned>(reinterpret_cast<std::uintptr_t>(ptr) & unsigned { UINT8_C(3) }) != 0U)
&& (n > std::size_t { UINT8_C(0) }))
{
*ptr++ = (uint8_t) c;
*ptr++ = uc;

--n;
}

// Set memory in 32-bit chunks.
uint32_t* ptr32 = (uint32_t*) ptr;
std::uint32_t* ptr32 { reinterpret_cast<std::uint32_t*>(ptr) };

while (n >= 4)
while (n >= std::size_t { UINT8_C(4) })
{
*ptr32++ = value;

n -= 4;
n -= std::size_t { UINT8_C(4) };
}

// Handle any remaining bytes.
ptr = (uint8_t*) ptr32;
ptr = reinterpret_cast<std::uint8_t*>(ptr32);

while (n > 0)
while (n > std::size_t { UINT8_C(0) })
{
*ptr++ = (uint8_t) c;
*ptr++ = uc;

--n;
}
Expand All @@ -170,8 +182,8 @@ void* memset(void* str, int c, size_t n)

void* memcpy (void* dest, const void* src, size_t n)
{
uint8_t *d = (uint8_t*) dest;
const uint8_t* s = (const uint8_t*) src;
std::uint8_t* d { reinterpret_cast<std::uint8_t*>(dest) };
const std::uint8_t* s { reinterpret_cast<const uint8_t*>(src) };

// Align destination to the next 32-bit boundary.
while (((uintptr_t) d & 3) && n > 0)
Expand All @@ -183,8 +195,8 @@ void* memcpy (void* dest, const void* src, size_t n)

// Copy memory in 32-bit chunks.

uint32_t *d32 = (uint32_t*) d;
const uint32_t* s32 = (const uint32_t*) s;
std::uint32_t* d32 { reinterpret_cast<std::uint32_t*>(d) };
const std::uint32_t* s32 { reinterpret_cast<const uint32_t*>(s) };

while (n >= 4)
{
Expand All @@ -195,8 +207,8 @@ void* memcpy (void* dest, const void* src, size_t n)

// Handle any remaining bytes.

d = (uint8_t*) d32;
s = (const uint8_t*) s32;
d = reinterpret_cast<std::uint8_t*>(d32);
s = reinterpret_cast<const uint8_t*>(s32);

while (n > 0)
{
Expand All @@ -208,4 +220,8 @@ void* memcpy (void* dest, const void* src, size_t n)
return dest;
}

#if defined(__GNUC__)
#pragma GCC diagnostic pop
#endif

} // extern "C"
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