diff --git a/ref_app/src/app/benchmark/readme.md b/ref_app/src/app/benchmark/readme.md index 3f0f0caa5..563f620c7 100644 --- a/ref_app/src/app/benchmark/readme.md +++ b/ref_app/src/app/benchmark/readme.md @@ -81,16 +81,17 @@ template class. A very wide range of microcontroller performance classes is shown in the following table. The benchmark used is a ${\sim}100$ decimal digit AGM $\pi$ calculation. -| Target | runtime $[ms]$ | relative | -|--------------------|-----------------|------------| -| `am6254_soc` | 0.37 | 1.0 | -| `am335x` | 1.5 | 4.1 | -| `stm32f446` | 5.1 | 14 | -| `rpi_pico2_rp2350` | 6.3 | 17 | -| `wch_ch32v307` | 8.0 | 22 | -| `xtensa_esp32_s3` | 9.1 | 25 | -| `rpi_pico_rp2040` | 19 | 51 | -| `avr` | 410 | 1100 | +| Target | runtime $[ms]$ | relative | +|---------------------------|-----------------|------------| +| `am6254_soc` | 0.37 | 1.0 | +| `am335x` | 1.5 | 4.1 | +| `stm32f446` | 5.1 | 14 | +| `rpi_pico2_rp2350` | 6.3 | 17 | +| `wch_ch32v307` | 8.0 | 22 | +| `xtensa_esp32_s3` | 9.1 | 25 | +| `bl602_sifive_e24_riscv` | 11 | 30 | +| `rpi_pico_rp2040` | 19 | 51 | +| `avr` | 410 | 1100 | There are strikingly differing performance classes for the $8$-bit MICROCHIP(R) AVR controller of the ARDUINO @@ -113,7 +114,9 @@ with a result of $5.1~{\text{ms}}$. The $32$-bit RISC-V controller (having a novel _open-source_ core) on the `wch_ch32v307` board boasts a quite respectable -time of $8.0~{\text{ms}}$. +time of $8.0~{\text{ms}}$. A different $32$-bit RISC-V controller +on target `bl602_sifive_e24_riscv` has similar performance, +running the benchmark in about $11~{\text{ms}}$. Running on only one core (core0) of the $32$-bit controller of the `xtensa_esp32_s3` board results in diff --git a/ref_app/src/mcal/bl602_sifive_e24_riscv/mcal_port.h b/ref_app/src/mcal/bl602_sifive_e24_riscv/mcal_port.h index fe7df7753..22869e292 100644 --- a/ref_app/src/mcal/bl602_sifive_e24_riscv/mcal_port.h +++ b/ref_app/src/mcal/bl602_sifive_e24_riscv/mcal_port.h @@ -73,12 +73,12 @@ static auto set_pin_high() noexcept -> void { - // Not yet implemented. + mcal::reg::reg_access_static::bit_set(); } static auto set_pin_low() noexcept -> void { - // Not yet implemented. + mcal::reg::reg_access_static::bit_clr(); } static auto read_input_value() noexcept -> bool diff --git a/ref_app/target.vcxproj b/ref_app/target.vcxproj index 0ac75349f..623c140fd 100644 --- a/ref_app/target.vcxproj +++ b/ref_app/target.vcxproj @@ -1132,8 +1132,10 @@ + + + - diff --git a/ref_app/target.vcxproj.filters b/ref_app/target.vcxproj.filters index aae9c270f..b8c817461 100644 --- a/ref_app/target.vcxproj.filters +++ b/ref_app/target.vcxproj.filters @@ -1094,7 +1094,13 @@ micros\bl602_sifive_e24_riscv\startup - + + micros\bl602_sifive_e24_riscv\startup + + + micros\bl602_sifive_e24_riscv\startup + + micros\bl602_sifive_e24_riscv\startup diff --git a/ref_app/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv.ld b/ref_app/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv.ld index 0d5ca027b..121609539 100644 --- a/ref_app/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv.ld +++ b/ref_app/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv.ld @@ -15,6 +15,8 @@ ******************************************************************************************/ +INPUT(libc.a libm.a libgcc.a) + /****************************************************************************************** ELF Entrypoint ******************************************************************************************/ @@ -23,20 +25,15 @@ ENTRY(_start) /****************************************************************************************** Globals ******************************************************************************************/ -__FLASH_START_ADDRESS = 0x23000000; -__FLASH_SIZE = 2M; -__ITCM_START_ADDRESS = 0x22008000; -__ITCM_SIZE = 48K; +__STACK_SIZE = 4K; -__DTCM_START_ADDRESS = 0x42014000; -__DTCM_SIZE = 48K; +__RAM_START_ADDRESS = 0x42020000; +__RAM_SIZE = 64K - __STACK_SIZE; -__STACK_START_ADDRESS = 0x42020000; -__STACK_SIZE = 1K; +__STACK_START_ADDRESS = __RAM_START_ADDRESS + __RAM_SIZE; -__RAM_START_ADDRESS = 0x42020000 + __STACK_SIZE; -__RAM_SIZE = 64K - __STACK_SIZE; +__ROM_START_ADDRESS = 0x23000000; /****************************************************************************************** Memory configuration @@ -44,11 +41,12 @@ __RAM_SIZE = 64K - __STACK_SIZE; MEMORY { - FLASH(rx) : ORIGIN = __FLASH_START_ADDRESS, LENGTH = __FLASH_SIZE - ITCM(rx) : ORIGIN = __ITCM_START_ADDRESS, LENGTH = __ITCM_SIZE - DTCM(rx) : ORIGIN = __DTCM_START_ADDRESS, LENGTH = __DTCM_SIZE - STACK(rw) : ORIGIN = __STACK_START_ADDRESS, LENGTH = __STACK_SIZE - RAM(rwx) : ORIGIN = __RAM_START_ADDRESS, LENGTH = __RAM_SIZE + BOOT(rx) : ORIGIN = 0x23000000, LENGTH = 0x100 + START(rx) : ORIGIN = 0x23000100, LENGTH = 0x300 + ROM(rx) : ORIGIN = 0x23000400, LENGTH = 256K - 0x400 + SRAM(rwx) : ORIGIN = __RAM_START_ADDRESS, LENGTH = 32K + RAM(rwx) : ORIGIN = __RAM_START_ADDRESS + 32K, LENGTH = __RAM_SIZE - 32K + STACK(rw) : ORIGIN = __STACK_START_ADDRESS, LENGTH = __STACK_SIZE } /****************************************************************************************** @@ -56,104 +54,135 @@ MEMORY ******************************************************************************************/ SECTIONS { - /* Program code (text) */ - .text : ALIGN(4) + . = __ROM_START_ADDRESS; + + .boot : ALIGN(0x10) { - PROVIDE(__CODE_BASE_ADDRESS = .); *(.boot) - *(.text) - . = ALIGN(4); - } > FLASH + . = ALIGN(0x10); + *(.boot*) + . = ALIGN(0x10); + } > BOOT = 0x5555 - /* Read-only data (.rodata) */ - .rodata : ALIGN(4) + .startup : ALIGN(0x10) { - PROVIDE(__RODATA_BASE_ADDRESS = .); - *(.rodata) - } > FLASH + *(.startup) + . = ALIGN(0x10); + *(.startup*) + . = ALIGN(0x10); + } > START = 0x5555 - /* Section for constructors */ - .ctors : ALIGN(4) + /* Program code (text) */ + .text : ALIGN(0x100) { - PROVIDE(__CTOR_LIST__ = .); - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - LONG(-1) ; - PROVIDE(__CTOR_END__ = .); + _ctors_begin = .; + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array*)) + _ctors_end = .; + *(.progmem*) . = ALIGN(4); - } > FLASH - + *(.text) + . = ALIGN(4); + *(.text*) + . = ALIGN(4); + *(.rodata) + . = ALIGN(4); + *(.rodata*) + . = ALIGN(4); + *(.srodata) + . = ALIGN(4); + *(.srodata*) + . = ALIGN(4); + *(.glue_7) + . = ALIGN(4); + *(.glue_7t) + . = ALIGN(4); + } > ROM - /* Section for destructors */ - .dtors : ALIGN(4) + .riscv.extab : { - PROVIDE(__DTOR_LIST__ = .); - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - KEEP (*(SORT(.fini_array.*))) - KEEP (*(.fini_array)) - LONG(-1) ; - PROVIDE(__DTOR_END__ = .); - . = ALIGN(4); - } > FLASH - - /* Runtime clear table */ - .clear_sec : ALIGN(4) + . = ALIGN(4); + *(.riscv.extab) + *(.gnu.linkonce.riscvextab.*) + . = ALIGN(4); + } > ROM + + .exidx : { - PROVIDE(__RUNTIME_CLEAR_TABLE = .) ; - LONG(0 + ADDR(.bss)); LONG(SIZEOF(.bss)); - LONG(-1); LONG(-1); . = ALIGN(4); - } > FLASH + PROVIDE(__exidx_start = .); + *(.riscv.exidx*) + . = ALIGN(4); + PROVIDE(__exidx_end = .); + } > ROM + + . = __RAM_START_ADDRESS; + . = ALIGN(4); - /* Runtime copy table */ - .copy_sec : ALIGN(4) + /* The ROM-to-RAM initialized sdata section */ + .sdata : ALIGN(4) { - PROVIDE(__RUNTIME_COPY_TABLE = .) ; - LONG(LOADADDR(.data)); LONG(0 + ADDR(.data)); LONG(SIZEOF(.data)); - LONG(LOADADDR(.sdata)); LONG(0 + ADDR(.sdata)); LONG(SIZEOF(.sdata)); - LONG(-1); LONG(-1); LONG(-1); + _sdata_begin = .; + *(.sdata) . = ALIGN(4); - PROVIDE(__CODE_END_ADDRESS = .); - } > FLASH + KEEP (*(.sdata)) + *(.sdata*) + . = ALIGN(4); + KEEP (*(.sdata*)) + _sdata_end = .; + } > SRAM AT > ROM - /* The ROM-to-RAM initialized data sections */ - .data : ALIGN(4) + /* The ROM-to-RAM initialized data section */ + .data : ALIGN(4) { + _data_begin = .; *(.data) + . = ALIGN(4); + KEEP (*(.data)) *(.data*) . = ALIGN(4); - } > RAM AT>FLASH - - .sdata : ALIGN(4) + KEEP (*(.data*)) + _data_end = .; + } > RAM AT > ROM + + /* The uninitialized (zero-cleared) sbss section */ + .sbss : ALIGN(4) { - *(.sdata) + _sbss_begin = .; + *(.sbss) . = ALIGN(4); - } > RAM AT>FLASH - - + KEEP (*(.sbss)) + *(.sbss*) + . = ALIGN(4); + KEEP (*(.sbss*)) + _sbss_end = .; + } > SRAM - /* The uninitialized (zero-cleared) data sections */ + /* The uninitialized (zero-cleared) bss section */ .bss : ALIGN(4) { + _bss_begin = .; *(.bss) - *(.bss*) . = ALIGN(4); - } > RAM - - .sbss : ALIGN(4) - { - *(.sbss) + KEEP (*(.bss)) + *(.bss*) . = ALIGN(4); + KEEP (*(.bss*)) + _bss_end = .; } > RAM + PROVIDE(end = .); + PROVIDE(_fini = .); + + . = __STACK_START_ADDRESS; + /* stack definition */ .stack : { . = ALIGN(MAX(__STACK_SIZE , .), 8); - PROVIDE(__STACK_TOP = .) ; + PROVIDE(__initial_stack_pointer = .) ; } > STACK + _srom_data_begin = LOADADDR(.sdata); + _rom_data_begin = LOADADDR(.data); } diff --git a/ref_app/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv_files.gmk b/ref_app/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv_files.gmk index 47f364a14..e17947ba7 100644 --- a/ref_app/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv_files.gmk +++ b/ref_app/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv_files.gmk @@ -9,7 +9,9 @@ # File list of the target-specific files in the project # ------------------------------------------------------------------------------ -FILES_TGT = $(PATH_APP)/mcal/mcal_gcc_cxx_completion \ - $(PATH_TGT)/Code/Startup/boot \ - $(PATH_TGT)/startup/intvect \ - $(PATH_TGT)/startup/Startup +FILES_TGT = $(PATH_APP)/mcal/mcal_gcc_cxx_completion \ + $(PATH_TGT)/Code/Startup/boot \ + $(PATH_TGT)/startup/crt0 \ + $(PATH_TGT)/startup/crt0_init_ram \ + $(PATH_TGT)/startup/crt1 \ + $(PATH_TGT)/startup/intvect diff --git a/ref_app/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv_flags.gmk b/ref_app/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv_flags.gmk index f1528873b..e0bff2de9 100644 --- a/ref_app/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv_flags.gmk +++ b/ref_app/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv_flags.gmk @@ -15,17 +15,12 @@ GCC_VERSION := 15.2.0 TGT_SUFFIX = elf -ARCH := -mcpu=sifive-e24 \ - -mabi=ilp32 \ - -msmall-data-limit=0 \ - -falign-functions=4 - TGT_ALLFLAGS = -O2 \ - $(ARCH) \ - -DPRINTF_INCLUDE_CONFIG_H \ - -fomit-frame-pointer \ - -fno-reorder-blocks-and-partition \ - -fno-reorder-functions + -ffast-math \ + -mcpu=sifive-e24 \ + -mabi=ilp32 \ + -msmall-data-limit=32 \ + -falign-functions=4 TGT_CFLAGS = -std=c11 \ diff --git a/ref_app/target/micros/bl602_sifive_e24_riscv/startup/Startup.c b/ref_app/target/micros/bl602_sifive_e24_riscv/startup/Startup.c deleted file mode 100644 index 1fb7dfe6a..000000000 --- a/ref_app/target/micros/bl602_sifive_e24_riscv/startup/Startup.c +++ /dev/null @@ -1,188 +0,0 @@ -/////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2025. -// Distributed under the Boost Software License, -// Version 1.0. (See accompanying file LICENSE_1_0.txt -// or copy at http://www.boost.org/LICENSE_1_0.txt) -// - -// Originally from: -// *************************************************************************************** -// Filename : Startup.c -// -// Author : Chalandi Amine -// -// Owner : Chalandi Amine -// -// Date : 11.03.2020 -// -// Description : C/C++ Runtime Setup (Crt0) -// -// *************************************************************************************** -//========================================================================================= -// Types definitions -//========================================================================================= -typedef struct -{ - unsigned long sourceAddr; /* Source Address (section in ROM memory) */ - unsigned long targetAddr; /* Target Address (section in RAM memory) */ - unsigned long size; /* length of section (bytes) */ -} runtimeCopyTable_t; - -typedef struct -{ - unsigned long addr; /* Source Address (section in RAM memory) */ - unsigned long size; /* Length of section (bytes) */ -} runtimeClearTable_t; - -//========================================================================================= -// Linker variables -//========================================================================================= -extern const runtimeCopyTable_t __RUNTIME_COPY_TABLE[]; -extern const runtimeClearTable_t __RUNTIME_CLEAR_TABLE[]; -extern unsigned long __CTOR_LIST__[]; - -//========================================================================================= -// Defines -//========================================================================================= -#define __STARTUP_RUNTIME_COPYTABLE (runtimeCopyTable_t*)(&__RUNTIME_COPY_TABLE[0]) -#define __STARTUP_RUNTIME_CLEARTABLE (runtimeClearTable_t*)(&__RUNTIME_CLEAR_TABLE[0]) -#define __STARTUP_RUNTIME_CTORS (unsigned long*)(&__CTOR_LIST__[0]) - -//========================================================================================= -// Function prototype -//========================================================================================= -void Startup_Init(void); -static void Startup_InitRam(void); -static void Startup_InitCtors(void); -static void Startup_RunApplication(void); -static void Startup_Unexpected_Exit(void); -static void Startup_InitMcuSystem(void); - -//========================================================================================= -// Extern function prototype -//========================================================================================= -int main(void) __attribute__((used,noinline)); - -//----------------------------------------------------------------------------------------- -/// \brief Startup_Init function -/// -/// \param void -/// -/// \return void -//----------------------------------------------------------------------------------------- -void Startup_Init(void) __attribute__((used,noinline)); - -void Startup_Init(void) -{ - /* Initialize the MCU system */ - Startup_InitMcuSystem(); - - /* Initialize the RAM memory */ - Startup_InitRam(); - - /* Initialize the non-local C++ objects */ - Startup_InitCtors(); - - /* Run the main application */ - Startup_RunApplication(); - -} - -//----------------------------------------------------------------------------------------- -/// \brief Startup_InitRam function -/// -/// \param void -/// -/// \return void -//----------------------------------------------------------------------------------------- -static void Startup_InitRam(void) -{ - unsigned long ClearTableIdx = 0; - unsigned long CopyTableIdx = 0; - - /* Clear Table */ - while((__STARTUP_RUNTIME_CLEARTABLE)[ClearTableIdx].addr != (unsigned long)-1 && (__STARTUP_RUNTIME_CLEARTABLE)[ClearTableIdx].size != (unsigned long)-1) - { - for(unsigned long idx = 0; idx < ((unsigned long)((__STARTUP_RUNTIME_CLEARTABLE)[ClearTableIdx].size) / 4); idx++) - { - ((unsigned long*)((__STARTUP_RUNTIME_CLEARTABLE)[ClearTableIdx].addr))[idx] = 0; - } - - ClearTableIdx++; - } - - /* Copy Table */ - while((__STARTUP_RUNTIME_COPYTABLE)[CopyTableIdx].sourceAddr != (unsigned long)-1 && - (__STARTUP_RUNTIME_COPYTABLE)[CopyTableIdx].targetAddr != (unsigned long)-1 && - (__STARTUP_RUNTIME_COPYTABLE)[CopyTableIdx].size != (unsigned long)-1 - ) - { - for(unsigned long idx = 0; idx < ((unsigned long)((__STARTUP_RUNTIME_COPYTABLE)[CopyTableIdx].size) / 4); idx++) - { - ((unsigned long*)((__STARTUP_RUNTIME_COPYTABLE)[CopyTableIdx].targetAddr))[idx] = - ((unsigned long*)((__STARTUP_RUNTIME_COPYTABLE)[CopyTableIdx].sourceAddr))[idx]; - } - - CopyTableIdx++; - } -} - -//----------------------------------------------------------------------------------------- -/// \brief Startup_InitCtors function -/// -/// \param void -/// -/// \return void -//----------------------------------------------------------------------------------------- -static void Startup_InitCtors(void) -{ - unsigned long CtorIdx = 0U; - - while((__STARTUP_RUNTIME_CTORS)[CtorIdx] != ((unsigned long)-1)) - { - ((void (*)(void))((__STARTUP_RUNTIME_CTORS)[CtorIdx++]))(); - } -} - -//----------------------------------------------------------------------------------------- -/// \brief Startup_RunApplication function -/// -/// \param void -/// -/// \return void -//----------------------------------------------------------------------------------------- -static void Startup_RunApplication(void) -{ - /* check the weak function */ - if((unsigned int) &main != 0) - { - /* Call the main function */ - main(); - } - - /* Catch unexpected exit from main or if main does not exist */ - Startup_Unexpected_Exit(); -} - -//----------------------------------------------------------------------------------------- -/// \brief Startup_Unexpected_Exit function -/// -/// \param void -/// -/// \return void -//----------------------------------------------------------------------------------------- -static void Startup_Unexpected_Exit(void) -{ - for(;;); -} -//----------------------------------------------------------------------------------------- -/// \brief Startup_InitMcuSystem function -/// -/// \param void -/// -/// \return void -//----------------------------------------------------------------------------------------- -static void Startup_InitMcuSystem(void) -{ - /* system clock is set by the bootROM */ -} \ No newline at end of file diff --git a/ref_app/target/micros/bl602_sifive_e24_riscv/startup/boot.s b/ref_app/target/micros/bl602_sifive_e24_riscv/startup/boot.s index 1da35e909..8636b41b4 100644 --- a/ref_app/target/micros/bl602_sifive_e24_riscv/startup/boot.s +++ b/ref_app/target/micros/bl602_sifive_e24_riscv/startup/boot.s @@ -16,6 +16,8 @@ ******************************************************************************************/ .extern InterruptVectorTable +.extern __my_startup +.extern __initial_stack_pointer /******************************************************************************************* \brief @@ -47,10 +49,10 @@ _start: csrsi mstatus, (1ul << 3u) /* setup the stack pointer */ - la sp, __STACK_TOP + la sp, __initial_stack_pointer /* setup the C/C++ runtime environment */ - j Startup_Init + j __my_startup .size _start, .-_start diff --git a/ref_app/target/micros/bl602_sifive_e24_riscv/startup/crt0.cpp b/ref_app/target/micros/bl602_sifive_e24_riscv/startup/crt0.cpp new file mode 100644 index 000000000..2b577bdd0 --- /dev/null +++ b/ref_app/target/micros/bl602_sifive_e24_riscv/startup/crt0.cpp @@ -0,0 +1,47 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2022 - 2024. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +asm (".extern __initial_stack_pointer"); +asm (".extern InterruptVectorTable"); + +#include + +namespace crt +{ + void init_ram(); + void init_ctors(); +} + +extern "C" +{ + void __my_startup() __attribute__ ((section(".startup"))); +} + +void __my_startup() +{ + // Chip init: Watchdog, port, and oscillator. + mcal::cpu::init(); + + // Initialize statics from ROM to RAM. + // Zero-clear default-initialized static RAM. + crt::init_ram(); + mcal::wdg::secure::trigger(); + + // Call all ctor initializations. + crt::init_ctors(); + mcal::wdg::secure::trigger(); + + // Jump to main (and never return). + asm volatile("jal main"); + + // Catch an unexpected return from main. + for(;;) + { + // Replace with a loud error if desired. + mcal::wdg::secure::trigger(); + } +} diff --git a/ref_app/target/micros/bl602_sifive_e24_riscv/startup/crt0_init_ram.cpp b/ref_app/target/micros/bl602_sifive_e24_riscv/startup/crt0_init_ram.cpp new file mode 100644 index 000000000..de3d14054 --- /dev/null +++ b/ref_app/target/micros/bl602_sifive_e24_riscv/startup/crt0_init_ram.cpp @@ -0,0 +1,67 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2024. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include +#include +#include + +extern "C" +{ + extern std::uintptr_t _rom_data_begin; // Start address for the initialization values of the rom-to-ram section. + extern std::uintptr_t _data_begin; // Start address for the .data section. + extern std::uintptr_t _data_end; // End address for the .data section. + extern std::uintptr_t _bss_begin; // Start address for the .bss section. + extern std::uintptr_t _bss_end; // End address for the .bss section. + + extern std::uintptr_t _srom_data_begin; // Start address for the initialization values of the rom-to-sram section. + extern std::uintptr_t _sdata_begin; // Start address for the .sdata section. + extern std::uintptr_t _sdata_end; // End address for the .sdata section. + extern std::uintptr_t _sbss_begin; // Start address for the .sbss section. + extern std::uintptr_t _sbss_end; // End address for the .sbss section. +} + +namespace crt +{ + void init_ram(); +} + +void crt::init_ram() +{ + using memory_aligned_type = std::uint8_t; + + // Copy the sdata segment initializers from ROM to RAM. + // Note that all data segments are aligned by 1. + const std::size_t size_sdata = + std::size_t( static_cast(static_cast(&_sdata_end)) + - static_cast(static_cast(&_sdata_begin))); + + std::copy(static_cast(static_cast(&_srom_data_begin)), + static_cast(static_cast(&_srom_data_begin)) + size_sdata, + static_cast< memory_aligned_type*>(static_cast< void*>(&_sdata_begin))); + + // Clear the sbss segment. + // Note that the bss segment is aligned by 1. + std::fill(static_cast(static_cast(&_sbss_begin)), + static_cast(static_cast(&_sbss_end)), + static_cast(0U)); + + // Copy the data segment initializers from ROM to RAM. + // Note that all data segments are aligned by 1. + const std::size_t size_data = + std::size_t( static_cast(static_cast(&_data_end)) + - static_cast(static_cast(&_data_begin))); + + std::copy(static_cast(static_cast(&_rom_data_begin)), + static_cast(static_cast(&_rom_data_begin)) + size_data, + static_cast< memory_aligned_type*>(static_cast< void*>(&_data_begin))); + + // Clear the bss segment. + // Note that the bss segment is aligned by 1. + std::fill(static_cast(static_cast(&_bss_begin)), + static_cast(static_cast(&_bss_end)), + static_cast(0U)); +} diff --git a/ref_app/target/micros/bl602_sifive_e24_riscv/startup/crt1.cpp b/ref_app/target/micros/bl602_sifive_e24_riscv/startup/crt1.cpp new file mode 100644 index 000000000..117f53f50 --- /dev/null +++ b/ref_app/target/micros/bl602_sifive_e24_riscv/startup/crt1.cpp @@ -0,0 +1,37 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2022. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include +#include + +extern "C" +{ + struct ctor_type + { + using function_type = void(*)(); + }; + + extern ctor_type::function_type _ctors_end; + extern ctor_type::function_type _ctors_begin; +} + +namespace crt +{ + void init_ctors(); +} + +void crt::init_ctors() +{ + using local_const_reverse_iterator = std::reverse_iterator; + + std::for_each(local_const_reverse_iterator(&_ctors_end), + local_const_reverse_iterator(&_ctors_begin), + [](const ctor_type::function_type pf) + { + pf(); + }); +}