diff --git a/.github/workflows/real-time-cpp-examples.yml b/.github/workflows/real-time-cpp-examples.yml index b28a9f36b..80ea1c6e8 100644 --- a/.github/workflows/real-time-cpp-examples.yml +++ b/.github/workflows/real-time-cpp-examples.yml @@ -55,7 +55,7 @@ jobs: ./build.sh /usr/bin avr ls -la ./bin/${{ matrix.example }}.elf ./bin/${{ matrix.example }}.map ./bin/${{ matrix.example }}.hex working-directory: ./examples/ - target-bl602_sifive_e24_riscv-examples: + target-stm32f100-examples: runs-on: ubuntu-latest defaults: run: @@ -69,13 +69,11 @@ jobs: with: fetch-depth: '0' - name: update-tools - run: | - wget --no-check-certificate https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v15.2.0-1/xpack-riscv-none-elf-gcc-15.2.0-1-linux-x64.tar.gz - tar -xzf xpack-riscv-none-elf-gcc-15.2.0-1-linux-x64.tar.gz -C ${{ runner.workspace }} - - name: target-bl602_sifive_e24_riscv-examples + run: sudo apt install gcc-arm-none-eabi + - name: target-stm32f100-examples run: | cd ${{ matrix.example }} - ./build.sh ${{ runner.workspace }}/xpack-riscv-none-elf-gcc-15.2.0-1/bin riscv-none-elf + ./build.sh /usr/bin arm-none-eabi ls -la ./bin/${{ matrix.example }}.elf ./bin/${{ matrix.example }}.map ./bin/${{ matrix.example }}.hex working-directory: ./examples/ target-bcm2835_raspi_b-example10_09: diff --git a/examples/chapter12_04/src/os/os_cfg.h b/examples/chapter12_04/src/os/os_cfg.h index 353e74efd..89e6619ec 100644 --- a/examples/chapter12_04/src/os/os_cfg.h +++ b/examples/chapter12_04/src/os/os_cfg.h @@ -87,22 +87,22 @@ constexpr auto OS_TASK_COUNT = static_cast(os::task_id_type::task_id_end); - #define OS_TASK_LIST \ - { \ - { \ - os::task_control_block(app::led::task_init, \ - app::led::task_func, \ - os::timer_type::microseconds(UINT32_C( 2000)), \ - os::timer_type::microseconds(UINT32_C( 0))), \ - os::task_control_block(app::benchmark::task_init, \ - app::benchmark::task_func, \ - os::timer_type::microseconds(UINT32_C( 50000)), \ - os::timer_type::microseconds(UINT32_C( 229))), \ - os::task_control_block(sys::mon::task_init, \ - sys::mon::task_func, \ - os::timer_type::microseconds(UINT32_C( 20000)), \ - os::timer_type::microseconds(UINT32_C( 541))), \ - } \ + #define OS_TASK_LIST \ + { \ + { \ + os::task_control_block(app::led::task_init, \ + app::led::task_func, \ + os::timer_type::microseconds(UINT32_C( 7000)), \ + os::timer_type::microseconds(UINT32_C( 0))), \ + os::task_control_block(app::benchmark::task_init, \ + app::benchmark::task_func, \ + os::timer_type::microseconds(UINT32_C( 830000)), \ + os::timer_type::microseconds(UINT32_C( 379))), \ + os::task_control_block(sys::mon::task_init, \ + sys::mon::task_func, \ + os::timer_type::microseconds(UINT32_C( 27000)), \ + os::timer_type::microseconds(UINT32_C( 541))), \ + } \ } static_assert(OS_TASK_COUNT > static_cast(UINT8_C(0)), "the task count must exceed zero"); diff --git a/examples/chapter12_04a/build.bat b/examples/chapter12_04a/build.bat index 0fc1dee0d..042b70208 100644 --- a/examples/chapter12_04a/build.bat +++ b/examples/chapter12_04a/build.bat @@ -9,27 +9,27 @@ @rem @rem Usage: -@rem build.bat directory_of_gcc_bin prefix_of_avr_gcc +@rem build.bat directory_of_gcc_bin prefix_of_gcc-arm-non-eabi @rem Usage example A, @rem cd "C:\Users\ckorm\Documents\Ks\uC_Software\Boards\real-time-cpp\examples\chapter12_04a" -@rem build.bat "C:\Users\ckorm\Documents\Ks\uC_Software\Boards\real-time-cpp\examples\chapter12_04a\tools\Util\msys64\usr\local\gcc-15.2.0-riscv-none-elf\bin" riscv-none-elf +@rem build.bat "C:\Users\ckorm\Documents\Ks\uC_Software\Boards\real-time-cpp\examples\chapter12_04a\tools\Util\msys64\usr\local\gcc-14.2.1-arm-none-eabi\bin" arm-none-eabi @rem Usage example A1 (use a relative tool path), @rem cd "C:\Users\ckorm\Documents\Ks\uC_Software\Boards\real-time-cpp\examples\chapter12_04a" -@rem build.bat ".\tools\Util\msys64\usr\local\gcc-15.2.0-riscv-none-elf\bin" riscv-none-elf +@rem build.bat ".\tools\Util\msys64\usr\local\gcc-14.2.1-arm-none-eabi\bin" arm-none-eabi @rem Usage example B, @rem cd "C:\Users\ckorm\Documents\Ks\uC_Software\Boards\real-time-cpp\examples\chapter12_04a" -@rem build.bat "C:\Program Files (x86)\gcc-15.2.0-riscv-none-elf\bin" riscv-none-elf +@rem build.bat "C:\Program Files (x86)\gcc-14.2.1-arm-none-eabi\bin" arm-none-eabi @set TOOL_PATH=%1 @set TOOL_PREFIX=%2 -@set CFLAGS=-Wall -Wextra -Wpedantic -O2 -ffast-math -mcpu=sifive-e24 -mabi=ilp32 -msmall-data-limit=32 -falign-functions=4 -fno-exceptions -gdwarf-2 -ffunction-sections -fdata-sections +@set CFLAGS=-Wall -Wextra -Wpedantic -O2 -finline-functions -finline-limit=64 -mcpu=cortex-m3 -mtune=cortex-m3 -mthumb -mfloat-abi=soft -mno-unaligned-access -mno-long-calls -fno-exceptions -gdwarf-2 -ffunction-sections -fdata-sections @set CPPFLAGS=-std=c++14 -fno-rtti -fstrict-enums -fno-use-cxa-atexit -fno-use-cxa-get-exception-ptr -fno-nonansi-builtins -fno-threadsafe-statics -fno-enforce-eh-specs -@set CINCLUDES=-Isrc/util/STL_C++XX_stdfloat -Isrc/util/STL -Isrc/mcal/bl602_sifive_e24_riscv -Isrc +@set CINCLUDES=-Isrc/util/STL_C++XX_stdfloat -Isrc/util/STL -Isrc/mcal/stm32f100 -Isrc @echo. @echo.Building with : build.bat @@ -58,34 +58,34 @@ @%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/mcal_gcc_cxx_completion.cpp -o bin/mcal_gcc_cxx_completion.o @echo.Compile : mcal_cpu.cpp to bin/mcal_cpu.o -@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/bl602_sifive_e24_riscv/mcal_cpu.cpp -o bin/mcal_cpu.o +@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/stm32f100/mcal_cpu.cpp -o bin/mcal_cpu.o @echo.Compile : mcal_eep.cpp to bin/mcal_eep.o -@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/bl602_sifive_e24_riscv/mcal_eep.cpp -o bin/mcal_eep.o +@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/stm32f100/mcal_eep.cpp -o bin/mcal_eep.o @echo.Compile : mcal_gpt.cpp to bin/mcal_gpt.o -@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/bl602_sifive_e24_riscv/mcal_gpt.cpp -o bin/mcal_gpt.o +@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/stm32f100/mcal_gpt.cpp -o bin/mcal_gpt.o @echo.Compile : mcal_irq.cpp to bin/mcal_irq.o -@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/bl602_sifive_e24_riscv/mcal_irq.cpp -o bin/mcal_irq.o +@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/stm32f100/mcal_irq.cpp -o bin/mcal_irq.o @echo.Compile : mcal_led.cpp to bin/mcal_led.o -@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/bl602_sifive_e24_riscv/mcal_led.cpp -o bin/mcal_led.o +@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/stm32f100/mcal_led.cpp -o bin/mcal_led.o @echo.Compile : mcal_osc.cpp to bin/mcal_osc.o -@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/bl602_sifive_e24_riscv/mcal_osc.cpp -o bin/mcal_osc.o +@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/stm32f100/mcal_osc.cpp -o bin/mcal_osc.o @echo.Compile : mcal_port.cpp to bin/mcal_port.o -@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/bl602_sifive_e24_riscv/mcal_port.cpp -o bin/mcal_port.o +@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/stm32f100/mcal_port.cpp -o bin/mcal_port.o @echo.Compile : mcal_pwm.cpp to bin/mcal_pwm.o -@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/bl602_sifive_e24_riscv/mcal_pwm.cpp -o bin/mcal_pwm.o +@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/stm32f100/mcal_pwm.cpp -o bin/mcal_pwm.o @echo.Compile : mcal_spi.cpp to bin/mcal_spi.o -@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/bl602_sifive_e24_riscv/mcal_spi.cpp -o bin/mcal_spi.o +@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/stm32f100/mcal_spi.cpp -o bin/mcal_spi.o @echo.Compile : mcal_wdg.cpp to bin/mcal_wdg.o -@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/bl602_sifive_e24_riscv/mcal_wdg.cpp -o bin/mcal_wdg.o +@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/mcal/stm32f100/mcal_wdg.cpp -o bin/mcal_wdg.o @echo.Compile : os.cpp to bin/os.o @%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/os/os.cpp -o bin/os.o @@ -99,23 +99,20 @@ @echo.Compile : sys_start.cpp to bin/sys_start.o @%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c src/sys/start/sys_start.cpp -o bin/sys_start.o -@echo.Assemble : boot.s to bin/boot.o -@%TOOL_PATH%\%TOOL_PREFIX%-g++ %CFLAGS% %CINCLUDES% -c target/micros/bl602_sifive_e24_riscv/startup/boot.s -o bin/boot.o - @echo.Compile : crt0.cpp to bin/crt0.o -@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c target/micros/bl602_sifive_e24_riscv/startup/crt0.cpp -o bin/crt0.o +@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c target/micros/stm32f100/startup/crt0.cpp -o bin/crt0.o @echo.Compile : crt0_init_ram.cpp to bin/crt0_init_ram.o -@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c target/micros/bl602_sifive_e24_riscv/startup/crt0_init_ram.cpp -o bin/crt0_init_ram.o +@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c target/micros/stm32f100/startup/crt0_init_ram.cpp -o bin/crt0_init_ram.o @echo.Compile : crt1.cpp to bin/crt1.o -@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c target/micros/bl602_sifive_e24_riscv/startup/crt1.cpp -o bin/crt1.o +@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CPPFLAGS% %CINCLUDES% -c target/micros/stm32f100/startup/crt1.cpp -o bin/crt1.o -@echo.Compile : int_vect.c to bin/int_vect.o -@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c %CFLAGS% %CINCLUDES% -c target/micros/bl602_sifive_e24_riscv/startup/int_vect.c -o bin/int_vect.o +@echo.Compile : int_vect.cpp to bin/int_vect.o +@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x c++ %CFLAGS% %CINCLUDES% -c target/micros/stm32f100/startup/int_vect.cpp -o bin/int_vect.o @echo.Link : objects to bin/chapter12_04a.elf -@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x none -mrelax -nostartfiles %CFLAGS% %CPPFLAGS% %CINCLUDES% -Wl,--gc-sections -Wl,-Ttarget/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv.ld,-Map,bin/chapter12_04a.map bin/app_benchmark.o bin/app_led.o bin/cmath_impl_gamma.o bin/mcal.o bin/mcal_gcc_cxx_completion.o bin/mcal_cpu.o bin/mcal_eep.o bin/mcal_gpt.o bin/mcal_irq.o bin/mcal_led.o bin/mcal_osc.o bin/mcal_port.o bin/mcal_pwm.o bin/mcal_spi.o bin/mcal_wdg.o bin/os.o bin/sys_idle.o bin/sys_mon.o bin/sys_start.o bin/boot.o bin/crt0.o bin/crt0_init_ram.o bin/crt1.o bin/int_vect.o -o bin/chapter12_04a.elf +@%TOOL_PATH%\%TOOL_PREFIX%-g++ -x none -nostartfiles %CFLAGS% %CPPFLAGS% %CINCLUDES% -Wl,--gc-sections -Wl,-Ttarget/micros/stm32f100/make/stm32f100.ld,-Map,bin/chapter12_04a.map bin/app_benchmark.o bin/app_led.o bin/cmath_impl_gamma.o bin/mcal.o bin/mcal_gcc_cxx_completion.o bin/mcal_cpu.o bin/mcal_eep.o bin/mcal_gpt.o bin/mcal_irq.o bin/mcal_led.o bin/mcal_osc.o bin/mcal_port.o bin/mcal_pwm.o bin/mcal_spi.o bin/mcal_wdg.o bin/os.o bin/sys_idle.o bin/sys_mon.o bin/sys_start.o bin/crt0.o bin/crt0_init_ram.o bin/crt1.o bin/int_vect.o -o bin/chapter12_04a.elf @echo. @echo.Extract : executable hex file : from bin/chapter12_04a.elf @@ -135,7 +132,7 @@ dir .\bin\chapter12_04a.elf .\bin\chapter12_04a.hex -rem if not exist .\bin\chapter12_04a.elf exit 1 -rem if not exist .\bin\chapter12_04a.hex exit 1 +if not exist .\bin\chapter12_04a.elf exit 1 +if not exist .\bin\chapter12_04a.hex exit 1 -rem exit 0 +exit 0 diff --git a/examples/chapter12_04a/build.sh b/examples/chapter12_04a/build.sh index 39e378f9b..d3339ffdd 100755 --- a/examples/chapter12_04a/build.sh +++ b/examples/chapter12_04a/build.sh @@ -11,23 +11,23 @@ # Usage: # # If command -# /usr/bin/avr-g++ -# installed, e.g. via command apt-get install gcc-avr avr-libc +# /usr/bin/arm-none-eabi-g++ +# installed, e.g. via command apt-get install gcc-arm-none-eabi # then: # ./build.sh # # Otherwise for custom installations -# ./build.sh directory_of_gcc_bin riscv-none-elf +# ./build.sh directory_of_gcc_bin arm-none-eabi # For example, -# ./build.sh /usr/bin riscv-none-elf +# ./build.sh /usr/bin arm-none-eabi # # Usage example A (from *nix shell) # cd /usr/local/real-time-cpp/examples/chapter12_04a -# ./build.sh /usr/local/real-time-cpp/examples/chapter12_04a/tools/Util/msys64/usr/local/gcc-15.2.0-riscv-none-elf/bin riscv-none-elf +# ./build.sh /usr/local/real-time-cpp/examples/chapter12_04a/tools/Util/msys64/usr/local/gcc-14.2.1-arm-none-eabi/bin arm-none-eabi # Usage example B (from Win* shell such as in Git for Win*) # cd C:/Users/ckorm/Documents/Ks/uC_Software/Boards/real-time-cpp/examples/chapter12_04a -# ./build.sh C:/Users/ckorm/Documents/Ks/uC_Software/Boards/real-time-cpp/examples/chapter12_04a/tools/Util/msys64/usr/local/gcc-15.2.0-riscv-none-elf/bin riscv-none-elf +# ./build.sh C:/Users/ckorm/Documents/Ks/uC_Software/Boards/real-time-cpp/examples/chapter12_04a/tools/Util/msys64/usr/local/gcc-14.2.1-arm-none-eabi/bin arm-none-eabi if [[ $# == 0 ]]; then ## $# is the number of arguments if [[ -n "$(which avr-g++)" ]]; then ## -n tests if string is not empty @@ -47,9 +47,9 @@ else TOOL_PREFIX="$2" fi -CFLAGS="-Wall -Wextra -Wpedantic -O2 -ffast-math -mcpu=sifive-e24 -mabi=ilp32 -msmall-data-limit=32 -falign-functions=4 -fno-exceptions -gdwarf-2 -ffunction-sections -fdata-sections" +CFLAGS="-Wall -Wextra -Wpedantic -O2 -finline-functions -finline-limit=64 -mcpu=cortex-m3 -mtune=cortex-m3 -mthumb -mfloat-abi=soft -mno-unaligned-access -mno-long-calls -fno-exceptions -gdwarf-2 -ffunction-sections -fdata-sections" CPPFLAGS="-std=c++14 -fno-rtti -fstrict-enums -fno-use-cxa-atexit -fno-use-cxa-get-exception-ptr -fno-nonansi-builtins -fno-threadsafe-statics -fno-enforce-eh-specs" -CINCLUDES="-Isrc/util/STL_C++XX_stdfloat -Isrc/util/STL -Isrc/mcal/bl602_sifive_e24_riscv -Isrc" +CINCLUDES="-Isrc/util/STL_C++XX_stdfloat -Isrc/util/STL -Isrc/mcal/stm32f100 -Isrc" echo echo "Building with : build.sh" @@ -77,34 +77,34 @@ echo "Compile : mcal_gcc_cxx_completion.cpp to bin/mcal_gcc_cxx_completion.o" $TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/mcal_gcc_cxx_completion.cpp -o bin/mcal_gcc_cxx_completion.o echo "Compile : mcal_cpu.cpp to bin/mcal_cpu.o" -$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/bl602_sifive_e24_riscv/mcal_cpu.cpp -o bin/mcal_cpu.o +$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/stm32f100/mcal_cpu.cpp -o bin/mcal_cpu.o echo "Compile : mcal_eep.cpp to bin/mcal_eep.o" -$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/bl602_sifive_e24_riscv/mcal_eep.cpp -o bin/mcal_eep.o +$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/stm32f100/mcal_eep.cpp -o bin/mcal_eep.o echo "Compile : mcal_gpt.cpp to bin/mcal_gpt.o" -$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/bl602_sifive_e24_riscv/mcal_gpt.cpp -o bin/mcal_gpt.o +$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/stm32f100/mcal_gpt.cpp -o bin/mcal_gpt.o echo "Compile : mcal_irq.cpp to bin/mcal_irq.o" -$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/bl602_sifive_e24_riscv/mcal_irq.cpp -o bin/mcal_irq.o +$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/stm32f100/mcal_irq.cpp -o bin/mcal_irq.o echo "Compile : mcal_led.cpp to bin/mcal_led.o" -$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/bl602_sifive_e24_riscv/mcal_led.cpp -o bin/mcal_led.o +$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/stm32f100/mcal_led.cpp -o bin/mcal_led.o echo "Compile : mcal_osc.cpp to bin/mcal_osc.o" -$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/bl602_sifive_e24_riscv/mcal_osc.cpp -o bin/mcal_osc.o +$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/stm32f100/mcal_osc.cpp -o bin/mcal_osc.o echo "Compile : mcal_port.cpp to bin/mcal_port.o" -$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/bl602_sifive_e24_riscv/mcal_port.cpp -o bin/mcal_port.o +$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/stm32f100/mcal_port.cpp -o bin/mcal_port.o echo "Compile : mcal_wdg.cpp to bin/mcal_wdg.o" -$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/bl602_sifive_e24_riscv/mcal_wdg.cpp -o bin/mcal_wdg.o +$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/stm32f100/mcal_wdg.cpp -o bin/mcal_wdg.o echo "Compile : mcal_pwm.cpp to bin/mcal_pwm.o" -$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/bl602_sifive_e24_riscv/mcal_pwm.cpp -o bin/mcal_pwm.o +$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/stm32f100/mcal_pwm.cpp -o bin/mcal_pwm.o echo "Compile : mcal_spi.cpp to bin/mcal_spi.o" -$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/bl602_sifive_e24_riscv/mcal_spi.cpp -o bin/mcal_spi.o +$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/mcal/stm32f100/mcal_spi.cpp -o bin/mcal_spi.o echo "Compile : os.cpp to bin/os.o" $TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/os/os.cpp -o bin/os.o @@ -118,23 +118,20 @@ $TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/sys/mon/s echo "Compile : sys_start.cpp to bin/sys_start.o" $TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c src/sys/start/sys_start.cpp -o bin/sys_start.o -echo "Assemble :boot.s to bin/boot.o" -$TOOL_PATH/$TOOL_PREFIX-g++ $CFLAGS $CINCLUDES -c target/micros/bl602_sifive_e24_riscv/startup/boot.s -o bin/boot.o - echo "Compile : crt0.cpp to bin/crt0.o" -$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c target/micros/bl602_sifive_e24_riscv/startup/crt0.cpp -o bin/crt0.o +$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c target/micros/stm32f100/startup/crt0.cpp -o bin/crt0.o echo "Compile : crt0_init_ram.cpp to bin/crt0_init_ram.o" -$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c target/micros/bl602_sifive_e24_riscv/startup/crt0_init_ram.cpp -o bin/crt0_init_ram.o +$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c target/micros/stm32f100/startup/crt0_init_ram.cpp -o bin/crt0_init_ram.o echo "Compile : crt1.cpp to bin/crt1.o" -$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c target/micros/bl602_sifive_e24_riscv/startup/crt1.cpp -o bin/crt1.o +$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CPPFLAGS $CINCLUDES -c target/micros/stm32f100/startup/crt1.cpp -o bin/crt1.o -echo "Compile : int_vect.c to bin/int_vect.o" -$TOOL_PATH/$TOOL_PREFIX-g++ -x c $CFLAGS $CINCLUDES -c target/micros/bl602_sifive_e24_riscv/startup/int_vect.c -o bin/int_vect.o +echo "Compile : int_vect.cpp to bin/int_vect.o" +$TOOL_PATH/$TOOL_PREFIX-g++ -x c++ $CFLAGS $CINCLUDES -c target/micros/stm32f100/startup/int_vect.cpp -o bin/int_vect.o echo "Link : objects to bin/chapter12_04a.elf" -$TOOL_PATH/$TOOL_PREFIX-g++ -x none -mrelax -nostartfiles $CFLAGS $CPPFLAGS $CINCLUDES -Wl,--gc-sections -Wl,-Ttarget/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv.ld,-Map,bin/chapter12_04a.map bin/app_benchmark.o bin/app_led.o bin/cmath_impl_gamma.o bin/mcal.o bin/mcal_gcc_cxx_completion.o bin/mcal_cpu.o bin/mcal_eep.o bin/mcal_gpt.o bin/mcal_irq.o bin/mcal_led.o bin/mcal_osc.o bin/mcal_port.o bin/mcal_pwm.o bin/mcal_spi.o bin/mcal_wdg.o bin/os.o bin/sys_idle.o bin/sys_mon.o bin/sys_start.o bin/boot.o bin/crt0.o bin/crt0_init_ram.o bin/crt1.o bin/int_vect.o -o bin/chapter12_04a.elf +$TOOL_PATH/$TOOL_PREFIX-g++ -x none -nostartfiles $CFLAGS $CPPFLAGS $CINCLUDES -Wl,--gc-sections -Wl,-Ttarget/micros/stm32f100/make/stm32f100.ld,-Map,bin/chapter12_04a.map bin/app_benchmark.o bin/app_led.o bin/cmath_impl_gamma.o bin/mcal.o bin/mcal_gcc_cxx_completion.o bin/mcal_cpu.o bin/mcal_eep.o bin/mcal_gpt.o bin/mcal_irq.o bin/mcal_led.o bin/mcal_osc.o bin/mcal_port.o bin/mcal_pwm.o bin/mcal_spi.o bin/mcal_wdg.o bin/os.o bin/sys_idle.o bin/sys_mon.o bin/sys_start.o bin/crt0.o bin/crt0_init_ram.o bin/crt1.o bin/int_vect.o -o bin/chapter12_04a.elf echo echo "Extract : executable hex file : from bin/chapter12_04a.elf" diff --git a/examples/chapter12_04a/chapter12_04a.sln b/examples/chapter12_04a/chapter12_04a.sln index c233fbfc5..186cc9fbc 100644 --- a/examples/chapter12_04a/chapter12_04a.sln +++ b/examples/chapter12_04a/chapter12_04a.sln @@ -12,17 +12,21 @@ Global Debug|x64 = Debug|x64 Release|x64 = Release|x64 target bl602_sifive_e24_riscv|x64 = target bl602_sifive_e24_riscv|x64 + target stm32f100|x64 = target stm32f100|x64 EndGlobalSection GlobalSection(ProjectConfigurationPlatforms) = postSolution {30CE370B-40F3-4BCD-8986-64AAFF8971BD}.Debug|x64.ActiveCfg = target bl602_sifive_e24_riscv|x64 {30CE370B-40F3-4BCD-8986-64AAFF8971BD}.Release|x64.ActiveCfg = target bl602_sifive_e24_riscv|x64 {30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target bl602_sifive_e24_riscv|x64.ActiveCfg = target bl602_sifive_e24_riscv|x64 {30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target bl602_sifive_e24_riscv|x64.Build.0 = target bl602_sifive_e24_riscv|x64 + {30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target stm32f100|x64.ActiveCfg = target stm32f100|x64 + {30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target stm32f100|x64.Build.0 = target stm32f100|x64 {C8B59726-9319-45C3-8F11-F9F388FB6A2C}.Debug|x64.ActiveCfg = Debug|x64 {C8B59726-9319-45C3-8F11-F9F388FB6A2C}.Debug|x64.Build.0 = Debug|x64 {C8B59726-9319-45C3-8F11-F9F388FB6A2C}.Release|x64.ActiveCfg = Release|x64 {C8B59726-9319-45C3-8F11-F9F388FB6A2C}.Release|x64.Build.0 = Release|x64 {C8B59726-9319-45C3-8F11-F9F388FB6A2C}.target bl602_sifive_e24_riscv|x64.ActiveCfg = Release|x64 + {C8B59726-9319-45C3-8F11-F9F388FB6A2C}.target stm32f100|x64.ActiveCfg = Release|x64 EndGlobalSection GlobalSection(SolutionProperties) = preSolution HideSolutionNode = FALSE diff --git a/examples/chapter12_04a/chapter12_04a.vcxproj b/examples/chapter12_04a/chapter12_04a.vcxproj index 514f8d395..5861b1cb5 100644 --- a/examples/chapter12_04a/chapter12_04a.vcxproj +++ b/examples/chapter12_04a/chapter12_04a.vcxproj @@ -174,50 +174,50 @@ - + + true true - - true + true - - true - true - - true + true - - true - true - - true + true - - true - true - - true + true + true - + + true true + + true + true - + + true true + + true + true - - + + true true + + true + true @@ -249,64 +249,66 @@ - - true + + + + + true - - true - true - - true + true - - true - true - - true + true - - true - true - - true + true - - true - true - - true + true - - true + + true + true - + + true true + + true + true - + + true true + + true + true - + + true true + + true + true - + + true true + + true + true - - diff --git a/examples/chapter12_04a/chapter12_04a.vcxproj.filters b/examples/chapter12_04a/chapter12_04a.vcxproj.filters index 7c83c9335..dbacd61e7 100644 --- a/examples/chapter12_04a/chapter12_04a.vcxproj.filters +++ b/examples/chapter12_04a/chapter12_04a.vcxproj.filters @@ -79,12 +79,12 @@ {9df4229f-ee8f-4a42-96c3-868db9f071a2} - - {fb640df6-2af7-454a-9b2a-828b481ce10f} - {761f3b28-a64f-4507-93e8-aae698775a95} + + {9521014d-bd91-4dde-b67c-471d942eee4c} + @@ -153,44 +153,41 @@ src\mcal\win32 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 src\mcal - - src\mcal - src\util\utility @@ -398,47 +395,56 @@ src\mcal_spi - - src\mcal\bl602_sifive_e24_riscv + + src\mcal + + + src\mcal + + + src\mcal + + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 - - src\mcal\bl602_sifive_e24_riscv + + src\mcal\stm32f100 diff --git a/examples/chapter12_04a/readme.md b/examples/chapter12_04a/readme.md index f30350750..f65fc1b61 100644 --- a/examples/chapter12_04a/readme.md +++ b/examples/chapter12_04a/readme.md @@ -9,14 +9,15 @@ mathematics. The same special functions and arguments are used as in Example Chapter12_04. In variation 12_04a, however, -the open-source 32-bit BL602 single-core RISC-V (SiFive E24) -microcontroller is used. +a 32-bit, single-core ARM(R) Cortex(R)-M3 microcontroller +is used. ## Hardware Setup In this particular example, we have simply used a commercially-available -BL602 single-core RISC-V (SiFive E24) board placed on a breadboard +the open-platform STM32F100 Value Line Discovery Kit placed on a breadboard with soldered-on pins. -The wiring is straightforward. The blinking LED uses an external green LED -controlled by pin `IO3`. THe benchmark toggle pin is `IO4`. +The wiring is straightforward. The blinking LED uses the blue colored +user LED controlled by pin `portc.8`. The benchmark toggle pin is `portb.9`. +The microcontroller is clocked at $24~\text{MHz}$. diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_benchmark.h b/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_benchmark.h deleted file mode 100644 index 0b641207f..000000000 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_benchmark.h +++ /dev/null @@ -1,24 +0,0 @@ -/////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2014 - 2025. -// Distributed under the Boost Software License, -// Version 1.0. (See accompanying file LICENSE_1_0.txt -// or copy at http://www.boost.org/LICENSE_1_0.txt) -// - -#ifndef MCAL_BENCHMARK_2014_04_16_H - #define MCAL_BENCHMARK_2014_04_16_H - - #include - #include - - #include - - namespace mcal - { - namespace benchmark - { - using benchmark_port_type = mcal::port::port_pin; - } - } - -#endif // MCAL_BENCHMARK_2014_04_16_H diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_cpu.cpp b/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_cpu.cpp deleted file mode 100644 index 248a6d828..000000000 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_cpu.cpp +++ /dev/null @@ -1,12 +0,0 @@ -/////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. -// Distributed under the Boost Software License, -// Version 1.0. (See accompanying file LICENSE_1_0.txt -// or copy at http://www.boost.org/LICENSE_1_0.txt) -// - -#include - -auto mcal::cpu::init() -> void -{ -} diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_cpu.h b/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_cpu.h deleted file mode 100644 index 9ac5039be..000000000 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_cpu.h +++ /dev/null @@ -1,25 +0,0 @@ -/////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2025. -// Distributed under the Boost Software License, -// Version 1.0. (See accompanying file LICENSE_1_0.txt -// or copy at http://www.boost.org/LICENSE_1_0.txt) -// - -#ifndef MCAL_CPU_2025_07_30_H - #define MCAL_CPU_2025_07_30_H - - #include - - namespace mcal - { - namespace cpu - { - auto init() -> void; - - inline auto post_init() -> void { } - - inline auto nop() noexcept -> void { asm volatile("nop"); } - } - } - -#endif // MCAL_CPU_2025_07_30_H diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_gpt.cpp b/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_gpt.cpp deleted file mode 100644 index 4fe998091..000000000 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_gpt.cpp +++ /dev/null @@ -1,122 +0,0 @@ -/////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. -// Distributed under the Boost Software License, -// Version 1.0. (See accompanying file LICENSE_1_0.txt -// or copy at http://www.boost.org/LICENSE_1_0.txt) -// - -#include -#include - -#include - -namespace -{ - struct mcal_gpt_system_tick final : private util::noncopyable - { - public: - mcal_gpt_system_tick() = delete; - - ~mcal_gpt_system_tick() = delete; - - static auto init() -> void - { - initial_count = get_consistent_microsecond_tick(); - } - - static auto get_tick() -> std::uint64_t - { - const std::uint64_t elapsed { get_consistent_microsecond_tick() - initial_count }; - - return elapsed; - } - - private: - static std::uint64_t initial_count; - - static auto read_clic_timer64() -> std::uint64_t - { - return mcal::reg::reg_access_static::reg_get(); - } - - static auto get_consistent_microsecond_tick() -> std::uint64_t - { - // Return the (elapsed) system tick using a multiple read - // to ensure data consistency. The system tick representing - // the elapsed time is used because the system tick timer - // has already been initialized by the system's bootloader. - // This means that by the time the bare-metal software actually - // starts up, the system tick timer will have already increased - // to some non-zero value represented here by initial_count. - - // Return the system tick using a multiple read to ensure data consistency. - - const volatile std::uint64_t time_first { read_clic_timer64() }; - const volatile std::uint64_t time_second { read_clic_timer64() }; - - const bool - is_steady - { - (static_cast(time_second) >= static_cast(time_first)) - }; - - const std::uint64_t - consistent_tick - { - static_cast - ( - is_steady ? time_first : read_clic_timer64() - ) - }; - - return - static_cast - ( - static_cast(consistent_tick + UINT32_C(5)) - / UINT32_C(10) - ); - } - }; - - std::uint64_t mcal_gpt_system_tick::initial_count { }; - - auto gpt_is_initialized() -> bool& __attribute__((used, noinline)); - - auto gpt_is_initialized() -> bool& - { - static bool is_init = bool(); - - return is_init; - } -} - -extern "C" auto mcal_gpt_init() -> void; - -extern "C" auto mcal_gpt_init() -> void -{ - mcal::gpt::init(nullptr); -} - -void mcal::gpt::init(const config_type*) -{ - if(!gpt_is_initialized()) - { - gpt_is_initialized() = true; - - mcal_gpt_system_tick::init(); - } -} - -mcal::gpt::value_type mcal::gpt::secure::get_time_elapsed() -{ - const std::uint64_t - elapsed - { - static_cast - ( - gpt_is_initialized() ? mcal_gpt_system_tick::get_tick() : UINT64_C(0) - ) - }; - - return mcal::gpt::value_type(elapsed); -} diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_gpt.h b/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_gpt.h deleted file mode 100644 index 8c9e9bd94..000000000 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_gpt.h +++ /dev/null @@ -1,29 +0,0 @@ -/////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2025. -// Distributed under the Boost Software License, -// Version 1.0. (See accompanying file LICENSE_1_0.txt -// or copy at http://www.boost.org/LICENSE_1_0.txt) -// - -#ifndef MCAL_GPT_2025_10_30_H - #define MCAL_GPT_2025_10_30_H - - #include - - namespace mcal - { - namespace gpt - { - using config_type = void; - using value_type = std::uint64_t; - - auto init(const config_type*) -> void; - - struct secure final - { - static auto get_time_elapsed() -> value_type; - }; - } - } - -#endif // MCAL_GPT_2025_10_30_H diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_led.h b/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_led.h deleted file mode 100644 index cd9c8065d..000000000 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_led.h +++ /dev/null @@ -1,31 +0,0 @@ -/////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. -// Distributed under the Boost Software License, -// Version 1.0. (See accompanying file LICENSE_1_0.txt -// or copy at http://www.boost.org/LICENSE_1_0.txt) -// - -#ifndef MCAL_LED_2010_09_14_H - #define MCAL_LED_2010_09_14_H - - #include - - #include - - namespace mcal - { - namespace led - { - constexpr unsigned LED_ID_1 { UINT8_C(6) }; - constexpr unsigned LED_ID_2 { UINT8_C(5) }; - constexpr unsigned LED_ID_3 { UINT8_C(4) }; - constexpr unsigned LED_ID_4 { UINT8_C(3) }; - - auto led0() -> led_base&; - auto led1() -> led_base&; - auto led2() -> led_base&; - auto led3() -> led_base&; - } - } - -#endif // MCAL_LED_2010_09_14_H diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_osc.cpp b/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_osc.cpp deleted file mode 100644 index 6ae0b6324..000000000 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_osc.cpp +++ /dev/null @@ -1,12 +0,0 @@ -/////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. -// Distributed under the Boost Software License, -// Version 1.0. (See accompanying file LICENSE_1_0.txt -// or copy at http://www.boost.org/LICENSE_1_0.txt) -// - -#include - -auto mcal::osc::init(const config_type*) -> void -{ -} diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_port.h b/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_port.h deleted file mode 100644 index 22869e292..000000000 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_port.h +++ /dev/null @@ -1,98 +0,0 @@ -/////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. -// Distributed under the Boost Software License, -// Version 1.0. (See accompanying file LICENSE_1_0.txt -// or copy at http://www.boost.org/LICENSE_1_0.txt) -// - -#ifndef MCAL_PORT_2014_01_10_H - #define MCAL_PORT_2014_01_10_H - - #include - #include - - #include - #include - - namespace mcal - { - namespace port - { - using config_type = void; - - void init(const config_type*); - - template - class port_pin - { - private: - static constexpr std::uint32_t GPIO_FUN_SDIO { UINT32_C( 1) }; - static constexpr std::uint32_t GPIO_FUN_FLASH { UINT32_C( 2) }; - static constexpr std::uint32_t GPIO_FUN_SPI { UINT32_C( 4) }; - static constexpr std::uint32_t GPIO_FUN_I2C { UINT32_C( 6) }; - static constexpr std::uint32_t GPIO_FUN_UART { UINT32_C( 7) }; - static constexpr std::uint32_t GPIO_FUN_PWM { UINT32_C( 8) }; - static constexpr std::uint32_t GPIO_FUN_EXT_PA { UINT32_C( 9) }; - static constexpr std::uint32_t GPIO_FUN_ANALOG { UINT32_C(10) }; - static constexpr std::uint32_t GPIO_FUN_SWGPIO { UINT32_C(11) }; - static constexpr std::uint32_t GPIO_FUN_JTAG { UINT32_C(14) }; - - static constexpr std::uint32_t port_index { static_cast(PortIndex) }; - - static constexpr bool odd_index { ((PortIndex % unsigned { UINT8_C(2) }) != unsigned { UINT8_C(0) }) }; - - static constexpr std::uintptr_t - cfgctl - { - static_cast - ( - mcal::reg::gpio_cfgctl0 + (port_index / 2U) * 4U - ) - }; - - static constexpr unsigned cfgctl_bpos_reg_gpio_3_func_sel { odd_index ? UINT8_C(24) : UINT8_C(24) - UINT8_C(16) }; - static constexpr unsigned cfgctl_bpos_reg_gpio_3_ie { odd_index ? UINT8_C(16) : UINT8_C(16) - UINT8_C(16) }; - static constexpr unsigned cfgctl_bpos_reg_gpio_3_smt { odd_index ? UINT8_C(17) : UINT8_C(17) - UINT8_C(16) }; - static constexpr unsigned cfgctl_bpos_reg_gpio_3_drv { odd_index ? UINT8_C(18) : UINT8_C(18) - UINT8_C(16) }; - - public: - static auto set_direction_output() noexcept -> void - { - mcal::reg::reg_access_static(GPIO_FUN_SWGPIO << cfgctl_bpos_reg_gpio_3_func_sel)>::template reg_msk(UINT32_C(0xF) << cfgctl_bpos_reg_gpio_3_func_sel)>(); - mcal::reg::reg_access_static::bit_clr(); - mcal::reg::reg_access_static::bit_clr(); - mcal::reg::reg_access_static::template reg_msk(); - - mcal::reg::reg_access_static::bit_set(); - } - - static auto set_direction_input() noexcept -> void - { - // Not yet implemented. - } - - static auto set_pin_high() noexcept -> void - { - mcal::reg::reg_access_static::bit_set(); - } - - static auto set_pin_low() noexcept -> void - { - mcal::reg::reg_access_static::bit_clr(); - } - - static auto read_input_value() noexcept -> bool - { - // Not yet implemented. - return false; - } - - static auto toggle_pin() noexcept -> void - { - mcal::reg::reg_access_static::bit_not(); - } - }; - } - } - -#endif // MCAL_PORT_2014_01_10_H diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_pwm.cpp b/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_pwm.cpp deleted file mode 100644 index cf0b192b5..000000000 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_pwm.cpp +++ /dev/null @@ -1,12 +0,0 @@ -/////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. -// Distributed under the Boost Software License, -// Version 1.0. (See accompanying file LICENSE_1_0.txt -// or copy at http://www.boost.org/LICENSE_1_0.txt) -// - -#include - -auto mcal::pwm::init(const config_type*) -> void -{ -} diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_reg.h b/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_reg.h deleted file mode 100644 index d75e51b68..000000000 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_reg.h +++ /dev/null @@ -1,52 +0,0 @@ -/////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. -// Distributed under the Boost Software License, -// Version 1.0. (See accompanying file LICENSE_1_0.txt -// or copy at http://www.boost.org/LICENSE_1_0.txt) -// - -#ifndef MCAL_REG_2010_04_10_H - #define MCAL_REG_2010_04_10_H - - #include - - namespace mcal - { - namespace reg - { - // CLIC (timer) registers. - constexpr std::uintptr_t clic_ctrl_addr { UINT32_C(0x02000000) }; - constexpr std::uintptr_t clic_msip { clic_ctrl_addr + UINT32_C(0x00000000) }; - constexpr std::uintptr_t clic_mtimecmp { clic_ctrl_addr + UINT32_C(0x00004000) }; - constexpr std::uintptr_t clic_mtime { clic_ctrl_addr + UINT32_C(0x0000BFF8) }; - constexpr std::uintptr_t clic_clk_gate { clic_ctrl_addr + UINT32_C(0x007FF000) }; - - constexpr std::uintptr_t glb_base { UINT32_C(0x40000000) }; - constexpr std::uintptr_t gpio_cfgctl0 { glb_base + UINT32_C(0x00000100) }; - constexpr std::uintptr_t gpio_cfgctl1 { glb_base + UINT32_C(0x00000104) }; - constexpr std::uintptr_t gpio_cfgctl2 { glb_base + UINT32_C(0x00000108) }; - constexpr std::uintptr_t gpio_cfgctl3 { glb_base + UINT32_C(0x0000010C) }; - constexpr std::uintptr_t gpio_cfgctl4 { glb_base + UINT32_C(0x00000110) }; - constexpr std::uintptr_t gpio_cfgctl5 { glb_base + UINT32_C(0x00000114) }; - constexpr std::uintptr_t gpio_cfgctl6 { glb_base + UINT32_C(0x00000118) }; - constexpr std::uintptr_t gpio_cfgctl7 { glb_base + UINT32_C(0x0000011C) }; - constexpr std::uintptr_t gpio_cfgctl8 { glb_base + UINT32_C(0x00000120) }; - constexpr std::uintptr_t gpio_cfgctl9 { glb_base + UINT32_C(0x00000124) }; - constexpr std::uintptr_t gpio_cfgctl10 { glb_base + UINT32_C(0x00000128) }; - constexpr std::uintptr_t gpio_cfgctl11 { glb_base + UINT32_C(0x0000012C) }; - constexpr std::uintptr_t gpio_cfgctl12 { glb_base + UINT32_C(0x00000130) }; - constexpr std::uintptr_t gpio_cfgctl13 { glb_base + UINT32_C(0x00000134) }; - constexpr std::uintptr_t gpio_cfgctl14 { glb_base + UINT32_C(0x00000138) }; - constexpr std::uintptr_t gpio_cfgctl30 { glb_base + UINT32_C(0x00000180) }; - constexpr std::uintptr_t gpio_cfgctl31 { glb_base + UINT32_C(0x00000184) }; - constexpr std::uintptr_t gpio_cfgctl32 { glb_base + UINT32_C(0x00000188) }; - constexpr std::uintptr_t gpio_cfgctl33 { glb_base + UINT32_C(0x0000018C) }; - constexpr std::uintptr_t gpio_cfgctl34 { glb_base + UINT32_C(0x00000190) }; - constexpr std::uintptr_t gpio_cfgctl35 { glb_base + UINT32_C(0x00000194) }; - } - } - - #include - #include - -#endif // MCAL_REG_2010_04_10_H diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_spi.h b/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_spi.h deleted file mode 100644 index 26563e885..000000000 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_spi.h +++ /dev/null @@ -1,19 +0,0 @@ -/////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2012 - 2025. -// Distributed under the Boost Software License, -// Version 1.0. (See accompanying file LICENSE_1_0.txt -// or copy at http://www.boost.org/LICENSE_1_0.txt) -// - -#ifndef MCAL_SPI_2012_05_24_H - #define MCAL_SPI_2012_05_24_H - - namespace mcal { namespace spi { - - using config_type = void; - - auto init(const config_type*) -> void; - - } } - -#endif // MCAL_SPI_2012_05_24_H diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_wdg.cpp b/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_wdg.cpp deleted file mode 100644 index 4cb0e5f15..000000000 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_wdg.cpp +++ /dev/null @@ -1,17 +0,0 @@ -/////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. -// Distributed under the Boost Software License, -// Version 1.0. (See accompanying file LICENSE_1_0.txt -// or copy at http://www.boost.org/LICENSE_1_0.txt) -// - -#include -#include - -void mcal::wdg::init(const config_type*) -{ -} - -void mcal::wdg::secure::trigger() -{ -} diff --git a/examples/chapter12_04a/src/mcal/mcal_gpt_arm_sys_tick.h b/examples/chapter12_04a/src/mcal/mcal_gpt_arm_sys_tick.h new file mode 100644 index 000000000..65620803d --- /dev/null +++ b/examples/chapter12_04a/src/mcal/mcal_gpt_arm_sys_tick.h @@ -0,0 +1,181 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2022 - 2025. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_GPT_ARM_SYS_TICK_2022_11_30_H + #define MCAL_GPT_ARM_SYS_TICK_2022_11_30_H + + #include + #include + #include + + #if defined(__GNUC__) + extern "C" auto __sys_tick_handler() -> void __attribute__((used, noinline)); + #endif + + namespace mcal { namespace gpt { + + template + class arm_sys_tick_base + { + protected: + using register_address_type = RegisterAddressType; + using register_value_type = RegisterValueType; + using value_type = ValueType; + + static constexpr auto scs_base = static_cast(UINT32_C(0xE000E000)); + static constexpr auto sys_tick_mhz = SysTickMHz; + static constexpr auto sys_tick_base = static_cast(scs_base + static_cast(UINT8_C(0x10))); + static constexpr auto sys_tick_ctrl = static_cast(sys_tick_base + static_cast(UINT8_C(0x00))); + static constexpr auto sys_tick_load = static_cast(sys_tick_base + static_cast(UINT8_C(0x04))); + static constexpr auto sys_tick_val = static_cast(sys_tick_base + static_cast(UINT8_C(0x08))); + static constexpr auto sys_tick_cal = static_cast(sys_tick_base + static_cast(UINT8_C(0x0C))); + + template(UINT8_C(0))> + struct reg_access_static + { + static auto reg_get() noexcept -> register_value_type { volatile register_value_type* pa = reinterpret_cast(address); return *pa; } + static auto reg_set() noexcept -> void { volatile register_value_type* pa = reinterpret_cast(address); *pa = value; } + static auto reg_or () noexcept -> void { volatile register_value_type* pa = reinterpret_cast(address); *pa = *pa | value; } + }; + }; + + template + class arm_sys_tick : private arm_sys_tick_base + { + private: + using base_class_type = arm_sys_tick_base; + + using register_address_type = typename base_class_type::register_address_type; + using register_value_type = typename base_class_type::register_value_type; + + static_assert(std::numeric_limits::digits == static_cast(INT8_C(32)), + "Error: Wrong width of register address type"); + + static_assert(std::numeric_limits::digits == static_cast(INT8_C(32)), + "Error: Wrong width of register value type"); + + public: + using value_type = typename base_class_type::value_type; + + static constexpr auto sys_tick_mhz() noexcept -> std::uint32_t { return SysTickMHz; } + + static auto init() noexcept -> void + { + if(!my_is_init) + { + my_is_init = true; + + // Set up an interrupt on the ARM(R) sys-tick. + + base_class_type::template reg_access_static(UINT8_C(0))>::reg_set(); + + // Set the sys-tick reload register. + base_class_type::template reg_access_static(UINT32_C(0x00FFFFFF))>::reg_set(); + + // Initialize the sys-tick counter value. + base_class_type::template reg_access_static(UINT8_C(0))>::reg_set(); + + // Set the sys-tick clock source to be the processor clock. + base_class_type::template reg_access_static(UINT8_C(4))>::reg_or(); + + // Enable the sys-tick interrupt. + base_class_type::template reg_access_static(UINT8_C(2))>::reg_or(); + + // Enable the sys-tick timer. + base_class_type::template reg_access_static(UINT8_C(1))>::reg_or(); + } + } + + static auto get_time_elapsed() noexcept -> value_type + { + return + static_cast + ( + my_is_init ? get_consistent_microsecond_tick() : static_cast(UINT8_C(0)) + ); + } + + private: + static volatile value_type my_sys_tick_value; + static bool my_is_init; + + static auto get_consistent_microsecond_tick() noexcept -> value_type + { + // Return the system tick using a multiple read to ensure data consistency. + + // Do the first read of the sys-tick counter and the sys-tick + // value. Also handle reverse counting for the sys-tick counter, + // since this timer counts down. + + const auto sys_tick_counter_1 = + static_cast + ( + static_cast + ( + static_cast(UINT32_C(0x00FFFFFF)) + - static_cast(base_class_type::template reg_access_static::reg_get()) + ) + ); + + const value_type sys_tick_value { my_sys_tick_value }; + + // Do the second read of the sys-tick counter and the sys-tick + // value. Also handle reverse counting for the sys-tick counter, + // since this timer counts down. + + const auto sys_tick_counter_2 = + static_cast + ( + static_cast + ( + static_cast(UINT32_C(0x00FFFFFF)) + - static_cast(base_class_type::template reg_access_static::reg_get()) + ) + ); + + // Perform the consistency check. + + const std::uint64_t + sys_tick_consistent_value + { + static_cast + ( + ((sys_tick_counter_2 >= sys_tick_counter_1) + ? static_cast(static_cast( sys_tick_value) | sys_tick_counter_1) + : static_cast(static_cast(my_sys_tick_value) | sys_tick_counter_2)) + ) + }; + + // Perform scaling and include a rounding correction. + return + static_cast + ( + static_cast + ( + sys_tick_consistent_value + + static_cast(base_class_type::sys_tick_mhz / static_cast(UINT8_C(2))) + ) + / base_class_type::sys_tick_mhz + ); + } + + #if defined(__GNUC__) + friend auto ::__sys_tick_handler() -> void; + #endif + }; + + template bool arm_sys_tick::my_is_init; + template volatile typename arm_sys_tick::value_type arm_sys_tick::my_sys_tick_value; + + } } + +#endif // MCAL_GPT_ARM_SYS_TICK_2022_11_30_H diff --git a/examples/chapter12_04a/src/mcal/stm32f100/mcal_benchmark.h b/examples/chapter12_04a/src/mcal/stm32f100/mcal_benchmark.h new file mode 100644 index 000000000..66c797af8 --- /dev/null +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_benchmark.h @@ -0,0 +1,27 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2014 - 2023. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_BENCHMARK_2014_04_16_H_ + #define MCAL_BENCHMARK_2014_04_16_H_ + + #include + + #include + #include + + namespace mcal + { + namespace benchmark + { + using benchmark_port_type = mcal::port::port_pin(UINT32_C(9))>; + } + } + +#endif // MCAL_BENCHMARK_2014_04_16_H_ diff --git a/examples/chapter12_04a/src/mcal/stm32f100/mcal_cpu.cpp b/examples/chapter12_04a/src/mcal/stm32f100/mcal_cpu.cpp new file mode 100644 index 000000000..ae5030c2a --- /dev/null +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_cpu.cpp @@ -0,0 +1,28 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2020. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include +#include +#include +#include +#include + +void mcal::cpu::init() +{ + // Disable all interrupts and clear pending bits. + mcal::reg::reg_access_static::reg_set(); + + // Reset the cfgr2 register. + mcal::reg::reg_access_static::reg_set(); + + // Relocate the vector table to internal flash. + mcal::reg::reg_access_static::reg_set(); + + mcal::wdg::init(nullptr); + mcal::port::init(nullptr); + mcal::osc::init(nullptr); +} diff --git a/examples/chapter12_04a/src/mcal/stm32f100/mcal_cpu.h b/examples/chapter12_04a/src/mcal/stm32f100/mcal_cpu.h new file mode 100644 index 000000000..a8436728e --- /dev/null +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_cpu.h @@ -0,0 +1,26 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2019. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_CPU_2009_02_14_H_ + #define MCAL_CPU_2009_02_14_H_ + + #define MY_PROGMEM + + #include + #include + + namespace mcal { namespace cpu { + + void init(); + + inline void post_init() { } + + inline void nop() { asm volatile("nop"); } + + } } // namespace mcal::cpu + +#endif // MCAL_CPU_2009_02_14_H_ diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_eep.cpp b/examples/chapter12_04a/src/mcal/stm32f100/mcal_eep.cpp similarity index 62% rename from examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_eep.cpp rename to examples/chapter12_04a/src/mcal/stm32f100/mcal_eep.cpp index 849637ad9..bdaf4cf89 100644 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_eep.cpp +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_eep.cpp @@ -1,5 +1,5 @@ /////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. +// Copyright Christopher Kormanyos 2007 - 2022. // Distributed under the Boost Software License, // Version 1.0. (See accompanying file LICENSE_1_0.txt // or copy at http://www.boost.org/LICENSE_1_0.txt) @@ -7,15 +7,15 @@ #include -auto mcal::eep::write(const address_type addr, const std::uint8_t data) -> void +void mcal::eep::write(const address_type addr, const std::uint8_t data) { static_cast(addr); static_cast(data); } -auto mcal::eep::read(const address_type addr) -> std::uint8_t +std::uint8_t mcal::eep::read(const address_type addr) { static_cast(addr); - return UINT8_C(0); + return std::uint8_t(0U); } diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_eep.h b/examples/chapter12_04a/src/mcal/stm32f100/mcal_eep.h similarity index 54% rename from examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_eep.h rename to examples/chapter12_04a/src/mcal/stm32f100/mcal_eep.h index 253778148..0cd43d875 100644 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_eep.h +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_eep.h @@ -1,12 +1,12 @@ /////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. +// Copyright Christopher Kormanyos 2007 - 2022. // Distributed under the Boost Software License, // Version 1.0. (See accompanying file LICENSE_1_0.txt // or copy at http://www.boost.org/LICENSE_1_0.txt) // -#ifndef MCAL_EEP_2018_12_15_H - #define MCAL_EEP_2018_12_15_H +#ifndef MCAL_EEP_2018_12_15_H_ + #define MCAL_EEP_2018_12_15_H_ #include @@ -17,11 +17,11 @@ using config_type = void; using address_type = std::uint32_t; - inline auto init(const config_type*) -> void { } + inline void init(const config_type*) { } - auto write(const address_type addr, const std::uint8_t data) -> void; - auto read (const address_type addr) -> std::uint8_t; + void write(const address_type addr, const std::uint8_t data); + std::uint8_t read (const address_type addr); } } -#endif // MCAL_EEP_2018_12_15_H +#endif // MCAL_EEP_2018_12_15_H_ diff --git a/examples/chapter12_04a/src/mcal/stm32f100/mcal_gpt.cpp b/examples/chapter12_04a/src/mcal/stm32f100/mcal_gpt.cpp new file mode 100644 index 000000000..b0d657259 --- /dev/null +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_gpt.cpp @@ -0,0 +1,24 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2023. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include + +extern "C" +auto __sys_tick_handler() -> void +{ + using local_arm_sys_tick_type = ::mcal::gpt::arm_sys_tick_type; + using local_value_type = typename local_arm_sys_tick_type::value_type; + + // Increment the system tick (having 64-bits) with 0x01000000. + + local_arm_sys_tick_type::my_sys_tick_value = + static_cast + ( + local_arm_sys_tick_type::my_sys_tick_value + + static_cast(UINT32_C(0x01000000)) + ); +} diff --git a/examples/chapter12_04a/src/mcal/stm32f100/mcal_gpt.h b/examples/chapter12_04a/src/mcal/stm32f100/mcal_gpt.h new file mode 100644 index 000000000..e43a75132 --- /dev/null +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_gpt.h @@ -0,0 +1,45 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2025. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_GPT_2011_10_20_H + #define MCAL_GPT_2011_10_20_H + + #include + + #include + + namespace mcal + { + namespace gpt + { + using arm_sys_tick_type = arm_sys_tick(UINT16_C(24))>; + + using config_type = void; + using value_type = typename arm_sys_tick_type::value_type; + + inline auto init(const config_type*) -> void; + + inline auto init(const config_type*) -> void + { + using local_arm_sys_tick_type = arm_sys_tick_type; + + local_arm_sys_tick_type::init(); + } + + struct secure final + { + static auto get_time_elapsed() -> value_type + { + using local_arm_sys_tick_type = arm_sys_tick_type; + + return static_cast(local_arm_sys_tick_type::get_time_elapsed()); + } + }; + } + } + +#endif // MCAL_GPT_2011_10_20_H diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_irq.cpp b/examples/chapter12_04a/src/mcal/stm32f100/mcal_irq.cpp similarity index 63% rename from examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_irq.cpp rename to examples/chapter12_04a/src/mcal/stm32f100/mcal_irq.cpp index a97496a2d..a0320023f 100644 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_irq.cpp +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_irq.cpp @@ -1,5 +1,5 @@ /////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. +// Copyright Christopher Kormanyos 2007 - 2020. // Distributed under the Boost Software License, // Version 1.0. (See accompanying file LICENSE_1_0.txt // or copy at http://www.boost.org/LICENSE_1_0.txt) @@ -7,6 +7,8 @@ #include -auto mcal::irq::init(const config_type*) -> void +void mcal::irq::init(const config_type*) { + // Enable all global interrupts. + mcal::irq::enable_all(); } diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_irq.h b/examples/chapter12_04a/src/mcal/stm32f100/mcal_irq.h similarity index 52% rename from examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_irq.h rename to examples/chapter12_04a/src/mcal/stm32f100/mcal_irq.h index 2d606f6e0..08e861840 100644 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_irq.h +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_irq.h @@ -1,24 +1,23 @@ /////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. +// Copyright Christopher Kormanyos 2007 - 2020. // Distributed under the Boost Software License, // Version 1.0. (See accompanying file LICENSE_1_0.txt // or copy at http://www.boost.org/LICENSE_1_0.txt) // -#ifndef MCAL_IRQ_2010_04_10_H - #define MCAL_IRQ_2010_04_10_H +#ifndef MCAL_IRQ_2010_04_10_H_ + #define MCAL_IRQ_2010_04_10_H_ namespace mcal { namespace irq { - using config_type = void; - + typedef void config_type; void init(const config_type*); - inline void enable_all() { } - inline void disable_all() { } + inline void enable_all () { asm volatile("cpsie i"); } + inline void disable_all() { asm volatile("cpsid i"); } } } -#endif // MCAL_IRQ_2010_04_10_H +#endif // MCAL_IRQ_2010_04_10_H_ diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_led.cpp b/examples/chapter12_04a/src/mcal/stm32f100/mcal_led.cpp similarity index 54% rename from examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_led.cpp rename to examples/chapter12_04a/src/mcal/stm32f100/mcal_led.cpp index c052e3c30..c580aef0b 100644 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_led.cpp +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_led.cpp @@ -1,5 +1,5 @@ /////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. +// Copyright Christopher Kormanyos 2007 - 2020. // Distributed under the Boost Software License, // Version 1.0. (See accompanying file LICENSE_1_0.txt // or copy at http://www.boost.org/LICENSE_1_0.txt) @@ -8,9 +8,12 @@ #include #include -auto mcal::led::led0() -> mcal::led::led_base& +mcal::led::led_base& mcal::led::led0() { - using led0_port_type = mcal::port::port_pin; + using led0_port_type = mcal::port::port_pin; using led0_led_type = mcal::led::led_port; diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_osc.h b/examples/chapter12_04a/src/mcal/stm32f100/mcal_led.h similarity index 54% rename from examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_osc.h rename to examples/chapter12_04a/src/mcal/stm32f100/mcal_led.h index cb8944d84..a52a8883b 100644 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_osc.h +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_led.h @@ -1,21 +1,21 @@ /////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. +// Copyright Christopher Kormanyos 2007 - 2020. // Distributed under the Boost Software License, // Version 1.0. (See accompanying file LICENSE_1_0.txt // or copy at http://www.boost.org/LICENSE_1_0.txt) // -#ifndef MCAL_OSC_2011_10_20_H - #define MCAL_OSC_2011_10_20_H +#ifndef MCAL_LED_2010_09_14_H_ + #define MCAL_LED_2010_09_14_H_ + + #include namespace mcal { - namespace osc + namespace led { - using config_type = void; - - auto init(const config_type*) -> void; + led_base& led0(); } } -#endif // MCAL_OSC_2011_10_20_H +#endif // MCAL_LED_2010_09_14_H_ diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_memory_progmem.h b/examples/chapter12_04a/src/mcal/stm32f100/mcal_memory_progmem.h similarity index 100% rename from examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_memory_progmem.h rename to examples/chapter12_04a/src/mcal/stm32f100/mcal_memory_progmem.h diff --git a/examples/chapter12_04a/src/mcal/stm32f100/mcal_osc.cpp b/examples/chapter12_04a/src/mcal/stm32f100/mcal_osc.cpp new file mode 100644 index 000000000..be0f29532 --- /dev/null +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_osc.cpp @@ -0,0 +1,34 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2011 - 2018. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include + +#include +#include + +void mcal::osc::init(const config_type*) +{ + // Configure the system clock for 24MHz using the pll. + + // Setup the pll prescaler to x6, for a maximum of 24 MHz. + mcal::reg::reg_access_static::reg_set(); + + // Enable the pll. + mcal::reg::reg_access_static::reg_or(); + + // Set the pll as system clock at 24 MHz. + mcal::reg::reg_access_static::reg_or(); +} diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_pwm.h b/examples/chapter12_04a/src/mcal/stm32f100/mcal_osc.h similarity index 61% rename from examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_pwm.h rename to examples/chapter12_04a/src/mcal/stm32f100/mcal_osc.h index 2d99c6165..95744b4ef 100644 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_pwm.h +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_osc.h @@ -1,21 +1,20 @@ /////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. +// Copyright Christopher Kormanyos 2007 - 2020. // Distributed under the Boost Software License, // Version 1.0. (See accompanying file LICENSE_1_0.txt // or copy at http://www.boost.org/LICENSE_1_0.txt) // -#ifndef MCAL_PWM_2010_09_14_H - #define MCAL_PWM_2010_09_14_H +#ifndef MCAL_OSC_2011_10_20_H_ + #define MCAL_OSC_2011_10_20_H_ namespace mcal { - namespace pwm + namespace osc { - using config_type = void; - + typedef void config_type; void init(const config_type*); } } -#endif // MCAL_PWM_2010_09_14_H +#endif // MCAL_OSC_2011_10_20_H_ diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_port.cpp b/examples/chapter12_04a/src/mcal/stm32f100/mcal_port.cpp similarity index 54% rename from examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_port.cpp rename to examples/chapter12_04a/src/mcal/stm32f100/mcal_port.cpp index 85e46c9cb..cfcc729fb 100644 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_port.cpp +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_port.cpp @@ -1,12 +1,15 @@ /////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. +// Copyright Christopher Kormanyos 2007 - 2020. // Distributed under the Boost Software License, // Version 1.0. (See accompanying file LICENSE_1_0.txt // or copy at http://www.boost.org/LICENSE_1_0.txt) // #include +#include void mcal::port::init(const config_type*) { + // Power management: Enable power for I/O ports : porta, portb, and portc. + mcal::reg::reg_access_static::reg_or(); } diff --git a/examples/chapter12_04a/src/mcal/stm32f100/mcal_port.h b/examples/chapter12_04a/src/mcal/stm32f100/mcal_port.h new file mode 100644 index 000000000..972b2af8f --- /dev/null +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_port.h @@ -0,0 +1,86 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2020. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_PORT_2012_06_27_H_ + #define MCAL_PORT_2012_06_27_H_ + + #include + + namespace mcal + { + namespace port + { + typedef void config_type; + void init(const config_type*); + + template + class port_pin + { + public: + static void set_direction_output() + { + // Read the value of the port direction register. + // Clear all the port pin control bits in the new register value. + // Set the port pin control bits for output, push-pull, 50MHz in the new register value. + // Set the port for digital output. + mcal::reg::reg_access_static< + addr_type, + reg_type, + pdir, + reg_type(0x3UL << pdir_shift)>::template reg_msk(); + } + + static void set_direction_input() + { + // Read the value of the port direction register. + // Clear all the port pin control bits in the new register value. + // Set the port pin control bits for input in the new register value. + // Set the port for digital input. + mcal::reg::reg_access_static< + addr_type, + reg_type, + pdir, + reg_type(0x4UL << pdir_shift)>::template reg_msk(); + } + + static void set_pin_high() + { + // Set the port output value to high. + mcal::reg::reg_access_static::bit_set(); + } + + static void set_pin_low() + { + // Set the port output value to low. + mcal::reg::reg_access_static::bit_clr(); + } + + static bool read_input_value() + { + // Read the port input value. + return mcal::reg::reg_access_static::bit_get(); + } + + static void toggle_pin() + { + // Toggle the port output value. + mcal::reg::reg_access_static::bit_not(); + } + + private: + static constexpr addr_type pdir = addr_type(port - addr_type((bpos >= 8U) ? 8U : 12U)); + static constexpr addr_type pinp = addr_type(port - 4U); + + static constexpr reg_type pdir_shift = reg_type((bpos - reg_type((bpos >= 8U) ? 8U : 0U)) * 4U); + }; + } + } + +#endif // MCAL_PORT_2012_06_27_H_ diff --git a/examples/chapter12_04a/src/mcal/stm32f100/mcal_pwm.cpp b/examples/chapter12_04a/src/mcal/stm32f100/mcal_pwm.cpp new file mode 100644 index 000000000..7f24024db --- /dev/null +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_pwm.cpp @@ -0,0 +1,20 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2020. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include +#include + +mcal::pwm::pwm_base& mcal::pwm::pwm0() noexcept +{ + static mcal::pwm::pwm_dummy pwm; + + static const volatile bool init_is_ok = pwm.init(); + + static_cast(init_is_ok); + + return pwm; +} diff --git a/examples/chapter12_04a/src/mcal/stm32f100/mcal_pwm.h b/examples/chapter12_04a/src/mcal/stm32f100/mcal_pwm.h new file mode 100644 index 000000000..cd7a4ddc3 --- /dev/null +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_pwm.h @@ -0,0 +1,25 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2020. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_PWM_2010_09_14_H_ + #define MCAL_PWM_2010_09_14_H_ + + #include + + namespace mcal + { + namespace pwm + { + typedef void config_type; + + inline void init(const config_type*) { } + + mcal::pwm::pwm_base& pwm0() noexcept; + } + } + +#endif // MCAL_PWM_2010_09_14_H_ diff --git a/examples/chapter12_04a/src/mcal/stm32f100/mcal_reg.h b/examples/chapter12_04a/src/mcal/stm32f100/mcal_reg.h new file mode 100644 index 000000000..7641691f4 --- /dev/null +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_reg.h @@ -0,0 +1,94 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2020. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_REG_2010_04_10_H_ + #define MCAL_REG_2010_04_10_H_ + + #include + + namespace mcal + { + namespace reg + { + // Global base addresses. + constexpr std::uint32_t scs_base = UINT32_C(0xE000E000); + + // Individual unit base addresses. + constexpr std::uint32_t sys_tick_base = scs_base + UINT32_C(0x00000010); + + // System registers. + constexpr std::uint32_t scb_vtor = static_cast(0xE000ED08UL); // 32-bit register. + constexpr std::uint32_t aircr = static_cast(0xE000ED0CUL); // 32-bit register. SCB application interrupt / reset control. + + // Interrupt registers. + constexpr std::uint32_t rcc_cr = static_cast(0x40021000UL); // 32-bit register. + constexpr std::uint32_t rcc_cfgr = static_cast(0x40021004UL); // 32-bit register. + constexpr std::uint32_t rcc_cir = static_cast(0x40021008UL); // 32-bit register. + constexpr std::uint32_t rcc_cfgr2 = static_cast(0x4002102CUL); // 32-bit register. + + // System tick addresses. + constexpr std::uint32_t sys_tick_ctrl = sys_tick_base + UINT32_C(0x00000000); + constexpr std::uint32_t sys_tick_load = sys_tick_base + UINT32_C(0x00000004); + constexpr std::uint32_t sys_tick_val = sys_tick_base + UINT32_C(0x00000008); + constexpr std::uint32_t sys_tick_cal = sys_tick_base + UINT32_C(0x0000000C); + + // Port registers. + constexpr std::uint32_t gpioa_crl = static_cast(0x40010800UL); // 32-bit register. + constexpr std::uint32_t gpioa_crh = static_cast(0x40010804UL); // 32-bit register. + constexpr std::uint32_t gpioa_idr = static_cast(0x40010808UL); // 32-bit register. + constexpr std::uint32_t gpioa_odr = static_cast(0x4001080CUL); // 32-bit register. + + constexpr std::uint32_t gpiob_crl = static_cast(0x40010C00UL); // 32-bit register. + constexpr std::uint32_t gpiob_crh = static_cast(0x40010C04UL); // 32-bit register. + constexpr std::uint32_t gpiob_idr = static_cast(0x40010C08UL); // 32-bit register. + constexpr std::uint32_t gpiob_odr = static_cast(0x40010C0CUL); // 32-bit register. + + constexpr std::uint32_t gpioc_crl = static_cast(0x40011000UL); // 32-bit register. + constexpr std::uint32_t gpioc_crh = static_cast(0x40011004UL); // 32-bit register. + constexpr std::uint32_t gpioc_idr = static_cast(0x40011008UL); // 32-bit register. + constexpr std::uint32_t gpioc_odr = static_cast(0x4001100CUL); // 32-bit register. + + // Timer registers. + constexpr std::uint32_t tim4_cr1 = static_cast(0x40000800UL); // 16-bit register. + constexpr std::uint32_t tim4_cr2 = static_cast(0x40000804UL); // 16-bit register. + constexpr std::uint32_t tim4_smcr = static_cast(0x40000808UL); // 16-bit register. + constexpr std::uint32_t tim4_dier = static_cast(0x4000080CUL); // 16-bit register. + constexpr std::uint32_t tim4_sr = static_cast(0x40000810UL); // 16-bit register. + constexpr std::uint32_t tim4_egr = static_cast(0x40000814UL); // 16-bit register. + constexpr std::uint32_t tim4_ccmr1 = static_cast(0x40000818UL); // 16-bit register. + constexpr std::uint32_t tim4_ccmr2 = static_cast(0x4000081CUL); // 16-bit register. + constexpr std::uint32_t tim4_ccer = static_cast(0x40000820UL); // 16-bit register. + constexpr std::uint32_t tim4_cnt = static_cast(0x40000824UL); // 16-bit register. + constexpr std::uint32_t tim4_psc = static_cast(0x40000828UL); // 16-bit register. + constexpr std::uint32_t tim4_arr = static_cast(0x4000082CUL); // 16-bit register. + constexpr std::uint32_t tim4_rcr = static_cast(0x40000830UL); // 16-bit register. + + // Power management registers. + constexpr std::uint32_t rcc_apbenr = static_cast(0x40021014UL); // 32-bit register. + constexpr std::uint32_t rcc_apb2enr = static_cast(0x40021018UL); // 32-bit register. + constexpr std::uint32_t rcc_apb1enr = static_cast(0x4002101CUL); // 32-bit register. + + // Watchdog registers. + constexpr std::uint32_t iwdg_kr = static_cast(0x40003000UL); // 32-bit register. + constexpr std::uint32_t iwdg_pr = static_cast(0x40003004UL); // 32-bit register. + constexpr std::uint32_t iwdg_rlr = static_cast(0x40003008UL); // 32-bit register. + constexpr std::uint32_t iwdg_sr = static_cast(0x4000300CUL); // 32-bit register. + + // Interrupt control registers. + constexpr std::uint32_t nvic_iser = static_cast(0xE000E100 + 0x0000); // 32-bit registers : Interrupt set enable registers. + constexpr std::uint32_t nvic_icer = static_cast(0xE000E100 + 0x0080); // 32-bit registers : Interrupt clear enable registers. + constexpr std::uint32_t nvic_ispr = static_cast(0xE000E100 + 0x0100); // 32-bit registers : Interrupt set pending registers. + constexpr std::uint32_t nvic_icpr = static_cast(0xE000E100 + 0x0180); // 32-bit registers : Interrupt clear pending registers. + constexpr std::uint32_t nvic_iabr = static_cast(0xE000E100 + 0x0200); // 32-bit registers : Interrupt active bit registers. + constexpr std::uint32_t nvic_ip = static_cast(0xE000E100 + 0x0300); // 8-bit registers : Interrupt priority registers (each one 8 bits wide). + } + } + + #include + #include + +#endif // MCAL_REG_2010_04_10_H_ diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_ser.h b/examples/chapter12_04a/src/mcal/stm32f100/mcal_ser.h similarity index 66% rename from examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_ser.h rename to examples/chapter12_04a/src/mcal/stm32f100/mcal_ser.h index 7eb790916..80f1cf011 100644 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_ser.h +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_ser.h @@ -1,21 +1,21 @@ /////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. +// Copyright Christopher Kormanyos 2007 - 2020. // Distributed under the Boost Software License, // Version 1.0. (See accompanying file LICENSE_1_0.txt // or copy at http://www.boost.org/LICENSE_1_0.txt) // -#ifndef MCAL_SER_2011_10_20_H - #define MCAL_SER_2011_10_20_H +#ifndef MCAL_SER_2011_10_20_H_ + #define MCAL_SER_2011_10_20_H_ namespace mcal { namespace ser { - using config_type = void; + typedef void config_type; inline void init(const config_type*) { } } } -#endif // MCAL_SER_2011_10_20_H +#endif // MCAL_SER_2011_10_20_H_ diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_spi.cpp b/examples/chapter12_04a/src/mcal/stm32f100/mcal_spi.cpp similarity index 61% rename from examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_spi.cpp rename to examples/chapter12_04a/src/mcal/stm32f100/mcal_spi.cpp index 90723f45f..a2fa4b7f9 100644 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_spi.cpp +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_spi.cpp @@ -1,5 +1,5 @@ /////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2012 - 2025. +// Copyright Christopher Kormanyos 2012 - 2020. // Distributed under the Boost Software License, // Version 1.0. (See accompanying file LICENSE_1_0.txt // or copy at http://www.boost.org/LICENSE_1_0.txt) @@ -7,6 +7,15 @@ #include +#include + void mcal::spi::init(const mcal::spi::config_type*) { } + +util::communication_base& mcal::spi::spi0() +{ + static mcal::spi::spi_software_dummy com; + + return com; +} diff --git a/examples/chapter12_04a/src/mcal/stm32f100/mcal_spi.h b/examples/chapter12_04a/src/mcal/stm32f100/mcal_spi.h new file mode 100644 index 000000000..300ec4577 --- /dev/null +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_spi.h @@ -0,0 +1,23 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2012 - 2020. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_SPI_2012_05_24_H_ + #define MCAL_SPI_2012_05_24_H_ + + #include + + namespace mcal { namespace spi { + + typedef void config_type; + + void init(const config_type*); + + extern util::communication_base& spi0(); + + } } + +#endif // MCAL_SPI_2012_05_24_H_ diff --git a/examples/chapter12_04a/src/mcal/stm32f100/mcal_wdg.cpp b/examples/chapter12_04a/src/mcal/stm32f100/mcal_wdg.cpp new file mode 100644 index 000000000..401451004 --- /dev/null +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_wdg.cpp @@ -0,0 +1,60 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2023. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include +#include + +void mcal::wdg::init(const config_type*) +{ + // Write access to the IWDG_PR and IWDG_RLR registers is protected + // Register access unlock protection + mcal::reg::reg_access_static::reg_set(); + + // Set the prescaler to 1/4 with a register value of 0. + mcal::reg::reg_access_static::reg_set(); + + // Register reload set to 1000 for a watchdog period of approximately 100ms. + // Note that this time is not exact. See Chapter 18.3.3, in the + // caption of Table 84: "[...] microcontroller's internal RC frequency + // can vary from 30 to 60 kHz". Take 40 kHz and the prescaler of 4, + // resulting in approximately 10 kHz for the watchdog clock. + // Divide this by 1000, which gives a period of approximately + // 1/10 sec, or 100 ms. + mcal::reg::reg_access_static::reg_set(); + + // Start the watchdog and lock the access protection. + mcal::reg::reg_access_static::reg_set(); + + // Perform a dummy-read of the status register. + volatile const std::uint32_t dummy_read = + mcal::reg::reg_access_static::reg_get(); + + static_cast(dummy_read); +} + +void mcal::wdg::secure::trigger() +{ + // Reload the watchdog counter with value in iwdg_rlr + mcal::reg::reg_access_static::reg_set(); +} diff --git a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_wdg.h b/examples/chapter12_04a/src/mcal/stm32f100/mcal_wdg.h similarity index 80% rename from examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_wdg.h rename to examples/chapter12_04a/src/mcal/stm32f100/mcal_wdg.h index 996659eea..4ed91adc9 100644 --- a/examples/chapter12_04a/src/mcal/bl602_sifive_e24_riscv/mcal_wdg.h +++ b/examples/chapter12_04a/src/mcal/stm32f100/mcal_wdg.h @@ -12,13 +12,13 @@ { namespace wdg { - using config_type = void; + typedef void config_type; - auto init(const config_type*) -> void; + void init(const config_type*); struct secure final { - static auto trigger() -> void; + static void trigger(); }; } } diff --git a/examples/chapter12_04a/src/os/os_cfg.h b/examples/chapter12_04a/src/os/os_cfg.h index 353e74efd..89e6619ec 100644 --- a/examples/chapter12_04a/src/os/os_cfg.h +++ b/examples/chapter12_04a/src/os/os_cfg.h @@ -87,22 +87,22 @@ constexpr auto OS_TASK_COUNT = static_cast(os::task_id_type::task_id_end); - #define OS_TASK_LIST \ - { \ - { \ - os::task_control_block(app::led::task_init, \ - app::led::task_func, \ - os::timer_type::microseconds(UINT32_C( 2000)), \ - os::timer_type::microseconds(UINT32_C( 0))), \ - os::task_control_block(app::benchmark::task_init, \ - app::benchmark::task_func, \ - os::timer_type::microseconds(UINT32_C( 50000)), \ - os::timer_type::microseconds(UINT32_C( 229))), \ - os::task_control_block(sys::mon::task_init, \ - sys::mon::task_func, \ - os::timer_type::microseconds(UINT32_C( 20000)), \ - os::timer_type::microseconds(UINT32_C( 541))), \ - } \ + #define OS_TASK_LIST \ + { \ + { \ + os::task_control_block(app::led::task_init, \ + app::led::task_func, \ + os::timer_type::microseconds(UINT32_C( 7000)), \ + os::timer_type::microseconds(UINT32_C( 0))), \ + os::task_control_block(app::benchmark::task_init, \ + app::benchmark::task_func, \ + os::timer_type::microseconds(UINT32_C( 830000)), \ + os::timer_type::microseconds(UINT32_C( 379))), \ + os::task_control_block(sys::mon::task_init, \ + sys::mon::task_func, \ + os::timer_type::microseconds(UINT32_C( 27000)), \ + os::timer_type::microseconds(UINT32_C( 541))), \ + } \ } static_assert(OS_TASK_COUNT > static_cast(UINT8_C(0)), "the task count must exceed zero"); diff --git a/examples/chapter12_04a/target.vcxproj b/examples/chapter12_04a/target.vcxproj index 04e76059b..eb29f5690 100644 --- a/examples/chapter12_04a/target.vcxproj +++ b/examples/chapter12_04a/target.vcxproj @@ -9,6 +9,14 @@ target bl602_sifive_e24_riscv x64 + + target stm32f100 + Win32 + + + target stm32f100 + x64 + {30CE370B-40F3-4BCD-8986-64AAFF8971BD} @@ -22,11 +30,21 @@ Unicode true + + Makefile + Unicode + true + Makefile Unicode true + + Makefile + Unicode + true + Makefile $(SolutionDir)..\Bin\ @@ -39,10 +57,18 @@ Makefile v141 + + Makefile + v141 + Makefile v143 + + Makefile + v143 + Makefile $(SolutionDir)..\Bin\ @@ -57,32 +83,58 @@ + + + + + + <_ProjectFileVersion>10.0.30319.1 $(SolutionDir)bin + $(SolutionDir)bin $(OutDir) + $(OutDir) Build\Build.bat AVR + Build\Build.bat AVR Build\Build.bat AVR + Build\Build.bat AVR Build\Build.bat AVR rebuild + Build\Build.bat AVR rebuild Build\Build.bat AVR rebuild + Build\Build.bat AVR rebuild Target\Build\Build.bat avr clean_all + Target\Build\Build.bat avr clean_all Target\Build\Build.bat bl602_sifive_e24_riscv clean_all + Target\Build\Build.bat stm32f100 clean_all $(OutDir)\app_flash.hex + $(OutDir)\app_flash.hex $(OutDir)\app_flash.hex + $(OutDir)\app_flash.hex $(NMakePreprocessorDefinitions) + $(NMakePreprocessorDefinitions) $(NMakePreprocessorDefinitions) + $(NMakePreprocessorDefinitions) $(ProjectDir)/Cpp; $(ProjectDir)/Cpp/Hal/AVR;$(NMakeIncludeSearchPath) + $(ProjectDir)/Cpp; $(ProjectDir)/Cpp/Hal/AVR;$(NMakeIncludeSearchPath) $(ProjectDir)/Cpp; $(ProjectDir)/Cpp/Hal/AVR;$(NMakeIncludeSearchPath) + $(ProjectDir)/Cpp; $(ProjectDir)/Cpp/Hal/AVR;$(NMakeIncludeSearchPath) $(NMakeForcedIncludes) + $(NMakeForcedIncludes) $(NMakeForcedIncludes) + $(NMakeForcedIncludes) $(NMakeAssemblySearchPath) + $(NMakeAssemblySearchPath) $(NMakeAssemblySearchPath) + $(NMakeAssemblySearchPath) $(NMakeForcedUsingAssemblies) + $(NMakeForcedUsingAssemblies) $(NMakeForcedUsingAssemblies) + $(NMakeForcedUsingAssemblies) Build\Build.bat R8C Build\Build.bat R8C Build\Build.bat R8C rebuild @@ -100,19 +152,33 @@ $(NMakeForcedUsingAssemblies) $(NMakeForcedUsingAssemblies) Target\Build\Build.bat avr + Target\Build\Build.bat avr Target\Build\Build.bat bl602_sifive_e24_riscv + Target\Build\Build.bat stm32f100 Target\Build\Build.bat avr rebuild + Target\Build\Build.bat avr rebuild Target\Build\Build.bat bl602_sifive_e24_riscv rebuild + Target\Build\Build.bat stm32f100 rebuild + + $(SolutionDir)src\util\STL $(SolutionDir)src\util\STL_C++XX_stdfloat $(SolutionDir)src $(SolutionDir)src\mcal\avr + $(SolutionDir)src\util\STL $(SolutionDir)src\util\STL_C++XX_stdfloat $(SolutionDir)src $(SolutionDir)src\mcal\avr $(SolutionDir)src\util\STL $(SolutionDir)src\util\STL_C++XX_stdfloat $(SolutionDir)src $(SolutionDir)src\mcal\avr + $(SolutionDir)src\util\STL $(SolutionDir)src\util\STL_C++XX_stdfloat $(SolutionDir)src $(SolutionDir)src\mcal\avr + + + + + + Build\Build.bat AVR Build\Build.bat AVR Build\Build.bat AVR rebuild @@ -130,17 +196,29 @@ $(NMakeForcedUsingAssemblies) $(NMakeForcedUsingAssemblies) + + + + + + + + + + + + @@ -157,11 +235,21 @@ $(SolutionDir)..\Bin\App.log + + + $(SolutionDir)..\Bin\App.log + + $(SolutionDir)..\Bin\App.log + + + $(SolutionDir)..\Bin\App.log + + $(SolutionDir)..\Bin\App.log @@ -177,16 +265,15 @@ - - - - + + + - - - - + + + + diff --git a/examples/chapter12_04a/target.vcxproj.filters b/examples/chapter12_04a/target.vcxproj.filters index b46ae994b..90e348ec7 100644 --- a/examples/chapter12_04a/target.vcxproj.filters +++ b/examples/chapter12_04a/target.vcxproj.filters @@ -13,14 +13,14 @@ {0a8b6cbb-02d4-4780-a2a9-c5a1b34deb53} - - {c844e189-6cfd-407f-83b5-806763d8b845} + + {5f9acc74-9dfb-4961-923c-444421c47605} - - {925ecd73-588a-426f-a3a3-2b0071939294} + + {4944fce6-fe7e-4cf0-b062-d6b7b70aee98} - - {3c35caf4-5f5b-4a28-bb8d-1f388fdcec1c} + + {f629ad77-98fd-412e-b115-847c4c428883} @@ -36,31 +36,28 @@ build - - micros\bl602_sifive_e24_riscv\make + + micros\stm32f100\make - - micros\bl602_sifive_e24_riscv\make + + micros\stm32f100\make - - micros\bl602_sifive_e24_riscv\make - - - micros\bl602_sifive_e24_riscv\startup + + micros\stm32f100\make - - micros\bl602_sifive_e24_riscv\startup + + micros\stm32f100\startup - - micros\bl602_sifive_e24_riscv\startup + + micros\stm32f100\startup - - micros\bl602_sifive_e24_riscv\startup + + micros\stm32f100\startup - - micros\bl602_sifive_e24_riscv\startup + + micros\stm32f100\startup \ No newline at end of file diff --git a/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv.ld b/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv.ld deleted file mode 100644 index d84a02221..000000000 --- a/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv.ld +++ /dev/null @@ -1,197 +0,0 @@ -/****************************************************************************************** - Filename : Memory_Map.ld - - Core : RV32IMAC - - MCU : FE310-G002 (SiFive) - - Author : Chalandi Amine - - Owner : Chalandi Amine - - Date : 04.06.2021 - - Description : Linker description file for FE310 SiFive - -******************************************************************************************/ - -INPUT(libc.a libm.a libgcc.a) - -/****************************************************************************************** - ELF Entrypoint -******************************************************************************************/ -ENTRY(_start) - -/****************************************************************************************** - Globals -******************************************************************************************/ - -__STACK_SIZE = 4K; - -__RAM_START_ADDRESS = 0x42020000; -__RAM_SIZE = 64K - __STACK_SIZE; - -__STACK_START_ADDRESS = __RAM_START_ADDRESS + __RAM_SIZE; - -__ROM_START_ADDRESS = 0x23000000; - -/****************************************************************************************** - Memory configuration -******************************************************************************************/ - -MEMORY -{ - BOOT(rx) : ORIGIN = 0x23000000, LENGTH = 0x100 - VEC(rx) : ORIGIN = 0x23000100, LENGTH = 0x200 - START(rx) : ORIGIN = 0x23000300, LENGTH = 0x100 - ROM(rx) : ORIGIN = 0x23000400, LENGTH = 256K - 0x400 - SRAM(rwx) : ORIGIN = __RAM_START_ADDRESS, LENGTH = 32K - RAM(rwx) : ORIGIN = __RAM_START_ADDRESS + 32K, LENGTH = __RAM_SIZE - 32K - STACK(rw) : ORIGIN = __STACK_START_ADDRESS, LENGTH = __STACK_SIZE -} - -/****************************************************************************************** - Sections definition -******************************************************************************************/ -SECTIONS -{ - . = __ROM_START_ADDRESS; - - .boot : ALIGN(0x10) - { - *(.boot) - . = ALIGN(0x10); - *(.boot*) - . = ALIGN(0x10); - } > BOOT = 0x5555 - - .startup : ALIGN(0x10) - { - *(.startup) - . = ALIGN(0x10); - *(.startup*) - . = ALIGN(0x10); - } > START = 0x5555 - - .isr_vector : ALIGN(0x100) - { - *(.isr_vector) - . = ALIGN(0x100); - *(.isr_vector*) - . = ALIGN(0x100); - } > VEC = 0xAAAA - - /* Program code (text) */ - .text : ALIGN(0x100) - { - _ctors_begin = .; - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array*)) - _ctors_end = .; - *(.progmem*) - . = ALIGN(4); - *(.text) - . = ALIGN(4); - *(.text*) - . = ALIGN(4); - *(.rodata) - . = ALIGN(4); - *(.rodata*) - . = ALIGN(4); - *(.srodata) - . = ALIGN(4); - *(.srodata*) - . = ALIGN(4); - *(.glue_7) - . = ALIGN(4); - *(.glue_7t) - . = ALIGN(4); - } > ROM - - .riscv.extab : - { - . = ALIGN(4); - *(.riscv.extab) - *(.gnu.linkonce.riscvextab.*) - . = ALIGN(4); - } > ROM - - .exidx : - { - . = ALIGN(4); - PROVIDE(__exidx_start = .); - *(.riscv.exidx*) - . = ALIGN(4); - PROVIDE(__exidx_end = .); - } > ROM - - . = __RAM_START_ADDRESS; - . = ALIGN(4); - - /* The ROM-to-RAM initialized sdata section */ - .sdata : ALIGN(4) - { - _sdata_begin = .; - *(.sdata) - . = ALIGN(4); - KEEP (*(.sdata)) - *(.sdata*) - . = ALIGN(4); - KEEP (*(.sdata*)) - _sdata_end = .; - } > SRAM AT > ROM - - /* The ROM-to-RAM initialized data section */ - .data : ALIGN(4) - { - _data_begin = .; - *(.data) - . = ALIGN(4); - KEEP (*(.data)) - *(.data*) - . = ALIGN(4); - KEEP (*(.data*)) - _data_end = .; - } > RAM AT > ROM - - /* The uninitialized (zero-cleared) sbss section */ - .sbss : ALIGN(4) - { - _sbss_begin = .; - *(.sbss) - . = ALIGN(4); - KEEP (*(.sbss)) - *(.sbss*) - . = ALIGN(4); - KEEP (*(.sbss*)) - _sbss_end = .; - } > SRAM - - /* The uninitialized (zero-cleared) bss section */ - .bss : ALIGN(4) - { - _bss_begin = .; - *(.bss) - . = ALIGN(4); - KEEP (*(.bss)) - *(.bss*) - . = ALIGN(4); - KEEP (*(.bss*)) - _bss_end = .; - } > RAM - - PROVIDE(end = .); - PROVIDE(_fini = .); - - . = __STACK_START_ADDRESS; - - /* stack definition */ - .stack : - { - . = ALIGN(MAX(__STACK_SIZE , .), 8); - PROVIDE(__initial_stack_pointer = .) ; - } > STACK - - _srom_data_begin = LOADADDR(.sdata); - _rom_data_begin = LOADADDR(.data); -} diff --git a/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv_flags.gmk b/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv_flags.gmk deleted file mode 100644 index 56d390776..000000000 --- a/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv_flags.gmk +++ /dev/null @@ -1,69 +0,0 @@ -# Copyright Christopher Kormanyos 2025. -# Distributed under the Boost Software License, -# Version 1.0. (See accompanying file LICENSE_1_0.txt -# or copy at http://www.boost.org/LICENSE_1_0.txt) -# - -# ------------------------------------------------------------------------------ -# compiler flags for the target architecture -# ------------------------------------------------------------------------------ - -GCC_TARGET := riscv-none-elf -GCC_PREFIX := riscv-none-elf - -GCC_VERSION := 15.2.0 - -TGT_SUFFIX = elf - -TGT_ALLFLAGS = -O2 \ - -ffast-math \ - -mcpu=sifive-e24 \ - -mabi=ilp32 \ - -msmall-data-limit=32 \ - -falign-functions=4 - - -TGT_CFLAGS = -std=c11 \ - -Wunsuffixed-float-constants \ - $(TGT_ALLFLAGS) - -TGT_CXXFLAGS = -std=c++14 \ - -Wno-psabi \ - $(TGT_ALLFLAGS) - -TGT_INCLUDES = -I$(PATH_APP)/util/STL_C++XX_stdfloat \ - -I$(PATH_APP)/util/STL - -TGT_AFLAGS = $(TGT_ALLFLAGS) - -TGT_LDFLAGS = $(TGT_ALLFLAGS) \ - -nostdlib \ - -nostartfiles \ - -Wl,--gc-sections \ - -e _start \ - -Wl,-Map,$(APP).map \ - -T $(LINKER_DEFINITION_FILE) \ - --specs=nano.specs \ - --specs=nosys.specs - - -OBJCOPY := $(PATH_TOOLS_CC)/$(GCC_PREFIX)-objcopy.exe - -ifeq ($(TYP_OS),WIN) -OBJCOPY := $(subst /,\,$(PATH_TOOLS_CC)/$(GCC_PREFIX)-objcopy.exe) -endif - -NAME_IMAGE_FILE := $(APP) - -RULE_SPECIAL_MAKE_IMAGE_FILE := $(ECHO) "+++ creating special image file $(NAME_IMAGE_FILE).img" \ - && $(OBJCOPY) $(APP).$(TGT_SUFFIX) -O binary $(NAME_IMAGE_FILE).img - -ifeq ($(TYP_OS),WIN) - -BL602_BFLASH_TOOL := $(PATH_TOOLS)/BL602/flasher/blflash.exe - -RULE_SPECIAL_MAKE_FLASH_BATCH := $(ECHO) "+++ creating flash batch file $(PATH_BIN)/flash.bat" \ - && copy /Y $(subst /,\\,$(BL602_BFLASH_TOOL)) $(subst /,\,$(CURDIR)/bin) > 2 > NUL \ - && $(ECHO) "$(subst /,\\,./$(notdir $(BL602_BFLASH_TOOL))) flash ./$(notdir $(NAME_IMAGE_FILE).img) --baud-rate 230400 --initial-baud-rate 230400 --port COM3"> $(CURDIR)/bin/flash.bat - -endif diff --git a/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/startup/boot.s b/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/startup/boot.s deleted file mode 100644 index 8636b41b4..000000000 --- a/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/startup/boot.s +++ /dev/null @@ -1,75 +0,0 @@ -/****************************************************************************************** - Filename : boot.s - - Core : RV32IMAFCB (SiFive E24 RISC-V) - - MCU : BL602 - - Author : Chalandi Amine - - Owner : Chalandi Amine - - Date : 22.10.2025 - - Description : boot routine - -******************************************************************************************/ - -.extern InterruptVectorTable -.extern __my_startup -.extern __initial_stack_pointer - -/******************************************************************************************* - \brief - - \param - - \return -********************************************************************************************/ -.section .boot -.type _start, @function -.align 2 -.globl _start - -_start: - /* note: The system clock is set to 160MHz by the BL602 bootROM - RISC-V mtime clock (rtc_toggle signal) is set to 10MHz - */ - - /* setup the exception vector table (CLIC vectored) */ - la t0, ExceptionVectorTable - addi t0, t0, 3 - csrw mtvec, t0 - - /* setup the interrupt vector table (CLIC vectored) */ - la t0, InterruptVectorTable - csrw 0x00000307, t0 - - /* enable global interrupt flag */ - csrsi mstatus, (1ul << 3u) - - /* setup the stack pointer */ - la sp, __initial_stack_pointer - - /* setup the C/C++ runtime environment */ - j __my_startup - - -.size _start, .-_start - -/******************************************************************************************* - \brief - - \param - - \return -********************************************************************************************/ -.section .text.vivt -.type ExceptionVectorTable, @function -.align 6 -.globl ExceptionVectorTable - -ExceptionVectorTable: - j . - -.size ExceptionVectorTable, .-ExceptionVectorTable diff --git a/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/startup/int_vect.c b/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/startup/int_vect.c deleted file mode 100644 index d087a5647..000000000 --- a/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/startup/int_vect.c +++ /dev/null @@ -1,137 +0,0 @@ -/////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2025. -// Distributed under the Boost Software License, -// Version 1.0. (See accompanying file LICENSE_1_0.txt -// or copy at http://www.boost.org/LICENSE_1_0.txt) -// - -// Renamed to int_vect.c -// Originally from: -/****************************************************************************************************** - Filename : intvect.c - - Core : RV32IMAFCB (SiFive E24 RISC-V) - - MCU : BL602 - - Author : Chalandi Amine - - Owner : Chalandi Amine - - Date : 22.10.2025 - - Description : Interrupt vector table implementation - -******************************************************************************************************/ - -//===================================================================================================== -// Includes -//===================================================================================================== -#include - -//===================================================================================================== -// Functions prototype -//===================================================================================================== -static void UndefinedHandler(void); -static void UndefinedHandler(void) { for(;;) { ; } } - -void Isr_SW_Interrupt (void) __attribute__((weak, alias("UndefinedHandler"))); -void Isr_TIMER_Interrupt (void) __attribute__((weak, alias("UndefinedHandler"))); -void Isr_Ext_Interrupt (void) __attribute__((weak, alias("UndefinedHandler"))); -void Isr_CLIC_SW_Interrupt (void) __attribute__((weak, alias("UndefinedHandler"))); -void L1C_BMX_ERR (void) __attribute__((weak, alias("UndefinedHandler"))); -void L1C_BMX_TO (void) __attribute__((weak, alias("UndefinedHandler"))); -void DMA_BMX_ERR (void) __attribute__((weak, alias("UndefinedHandler"))); -void IRTX (void) __attribute__((weak, alias("UndefinedHandler"))); -void IRRX (void) __attribute__((weak, alias("UndefinedHandler"))); -void GPADC_DMA (void) __attribute__((weak, alias("UndefinedHandler"))); -void SPI (void) __attribute__((weak, alias("UndefinedHandler"))); -void UART0 (void) __attribute__((weak, alias("UndefinedHandler"))); -void UART1 (void) __attribute__((weak, alias("UndefinedHandler"))); -void I2C (void) __attribute__((weak, alias("UndefinedHandler"))); -void PWM (void) __attribute__((weak, alias("UndefinedHandler"))); -void TIMER_CH0 (void) __attribute__((weak, alias("UndefinedHandler"))); -void TIMER_CH1 (void) __attribute__((weak, alias("UndefinedHandler"))); -void TIMER_WDT (void) __attribute__((weak, alias("UndefinedHandler"))); -void GPIO_INT0 (void) __attribute__((weak, alias("UndefinedHandler"))); -void PDS_WAKEUP (void) __attribute__((weak, alias("UndefinedHandler"))); -void HBN_OUT0 (void) __attribute__((weak, alias("UndefinedHandler"))); -void HBN_OUT1 (void) __attribute__((weak, alias("UndefinedHandler"))); - -typedef void (*InterruptHandler)(void); - -//===================================================================================================== -// Interrupt vector table -//===================================================================================================== -const InterruptHandler __attribute__((section(".isr_vector"), aligned(64))) InterruptVectorTable[] = -{ - (InterruptHandler)&UndefinedHandler, /* IRQ 00 Reserved */ - (InterruptHandler)&UndefinedHandler, /* IRQ 01 Reserved */ - (InterruptHandler)&UndefinedHandler, /* IRQ 02 Reserved */ - (InterruptHandler)&Isr_SW_Interrupt, /* IRQ 03 SW Interrupt */ - (InterruptHandler)&UndefinedHandler, /* IRQ 04 Reserved */ - (InterruptHandler)&UndefinedHandler, /* IRQ 05 Reserved */ - (InterruptHandler)&UndefinedHandler, /* IRQ 06 Reserved */ - (InterruptHandler)&Isr_TIMER_Interrupt, /* IRQ 07 Timer Interrupt */ - (InterruptHandler)&UndefinedHandler, /* IRQ 08 Reserved */ - (InterruptHandler)&UndefinedHandler, /* IRQ 09 Reserved */ - (InterruptHandler)&UndefinedHandler, /* IRQ 10 Reserved */ - (InterruptHandler)&Isr_Ext_Interrupt, /* IRQ 11 External Interrupt */ - (InterruptHandler)&Isr_CLIC_SW_Interrupt, /* IRQ 12 CLIC SW Interrupt */ - (InterruptHandler)&UndefinedHandler, /* IRQ 13 Reserved */ - (InterruptHandler)&UndefinedHandler, /* IRQ 14 Reserved */ - (InterruptHandler)&UndefinedHandler, /* IRQ 15 Reserved */ - (InterruptHandler)&UndefinedHandler, /* IRQ 16 Local Interrupt (IRQ_NUM_BASE + 00) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 17 Local Interrupt (IRQ_NUM_BASE + 01) */ - (InterruptHandler)&L1C_BMX_ERR, /* IRQ 18 Local Interrupt (IRQ_NUM_BASE + 02) */ - (InterruptHandler)&L1C_BMX_TO, /* IRQ 19 Local Interrupt (IRQ_NUM_BASE + 03) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 20 Local Interrupt (IRQ_NUM_BASE + 04) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 21 Local Interrupt (IRQ_NUM_BASE + 05) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 22 Local Interrupt (IRQ_NUM_BASE + 06) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 23 Local Interrupt (IRQ_NUM_BASE + 07) */ - (InterruptHandler)&DMA_BMX_ERR, /* IRQ 24 Local Interrupt (IRQ_NUM_BASE + 08) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 25 Local Interrupt (IRQ_NUM_BASE + 09) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 26 Local Interrupt (IRQ_NUM_BASE + 10) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 27 Local Interrupt (IRQ_NUM_BASE + 11) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 28 Local Interrupt (IRQ_NUM_BASE + 12) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 29 Local Interrupt (IRQ_NUM_BASE + 13) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 30 Local Interrupt (IRQ_NUM_BASE + 14) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 31 Local Interrupt (IRQ_NUM_BASE + 15) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 32 Local Interrupt (IRQ_NUM_BASE + 16) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 33 Local Interrupt (IRQ_NUM_BASE + 17) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 34 Local Interrupt (IRQ_NUM_BASE + 18) */ - (InterruptHandler)&IRTX, /* IRQ 35 Local Interrupt (IRQ_NUM_BASE + 19) */ - (InterruptHandler)&IRRX, /* IRQ 36 Local Interrupt (IRQ_NUM_BASE + 20) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 37 Local Interrupt (IRQ_NUM_BASE + 21) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 38 Local Interrupt (IRQ_NUM_BASE + 22) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 39 Local Interrupt (IRQ_NUM_BASE + 23) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 40 Local Interrupt (IRQ_NUM_BASE + 24) */ - (InterruptHandler)&GPADC_DMA, /* IRQ 41 Local Interrupt (IRQ_NUM_BASE + 25) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 42 Local Interrupt (IRQ_NUM_BASE + 26) */ - (InterruptHandler)&SPI, /* IRQ 43 Local Interrupt (IRQ_NUM_BASE + 27) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 44 Local Interrupt (IRQ_NUM_BASE + 28) */ - (InterruptHandler)&UART0, /* IRQ 45 Local Interrupt (IRQ_NUM_BASE + 29) */ - (InterruptHandler)&UART1, /* IRQ 46 Local Interrupt (IRQ_NUM_BASE + 30) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 47 Local Interrupt (IRQ_NUM_BASE + 31) */ - (InterruptHandler)&I2C, /* IRQ 48 Local Interrupt (IRQ_NUM_BASE + 32) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 49 Local Interrupt (IRQ_NUM_BASE + 33) */ - (InterruptHandler)&PWM, /* IRQ 50 Local Interrupt (IRQ_NUM_BASE + 34) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 51 Local Interrupt (IRQ_NUM_BASE + 35) */ - (InterruptHandler)&TIMER_CH0, /* IRQ 52 Local Interrupt (IRQ_NUM_BASE + 36) */ - (InterruptHandler)&TIMER_CH1, /* IRQ 53 Local Interrupt (IRQ_NUM_BASE + 37) */ - (InterruptHandler)&TIMER_WDT, /* IRQ 54 Local Interrupt (IRQ_NUM_BASE + 38) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 55 Local Interrupt (IRQ_NUM_BASE + 39) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 56 Local Interrupt (IRQ_NUM_BASE + 40) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 57 Local Interrupt (IRQ_NUM_BASE + 41) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 58 Local Interrupt (IRQ_NUM_BASE + 42) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 59 Local Interrupt (IRQ_NUM_BASE + 43) */ - (InterruptHandler)&GPIO_INT0, /* IRQ 60 Local Interrupt (IRQ_NUM_BASE + 44) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 61 Local Interrupt (IRQ_NUM_BASE + 45) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 62 Local Interrupt (IRQ_NUM_BASE + 46) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 63 Local Interrupt (IRQ_NUM_BASE + 47) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 64 Local Interrupt (IRQ_NUM_BASE + 48) */ - (InterruptHandler)&UndefinedHandler, /* IRQ 65 Local Interrupt (IRQ_NUM_BASE + 49) */ - (InterruptHandler)&PDS_WAKEUP, /* IRQ 66 Local Interrupt (IRQ_NUM_BASE + 50) */ - (InterruptHandler)&HBN_OUT0, /* IRQ 67 Local Interrupt (IRQ_NUM_BASE + 51) */ - (InterruptHandler)&HBN_OUT1 /* IRQ 68 Local Interrupt (IRQ_NUM_BASE + 52) */ -}; diff --git a/examples/chapter12_04a/target/micros/stm32f100/make/stm32f100.ld b/examples/chapter12_04a/target/micros/stm32f100/make/stm32f100.ld new file mode 100644 index 000000000..fe52b4410 --- /dev/null +++ b/examples/chapter12_04a/target/micros/stm32f100/make/stm32f100.ld @@ -0,0 +1,125 @@ +/* + Copyright Christopher Kormanyos 2007 - 2024. + Distributed under the Boost Software License, + Version 1.0. (See accompanying file LICENSE_1_0.txt + or copy at http://www.boost.org/LICENSE_1_0.txt) +*/ + +/* Linker script for STM32F1xx ARM(R) Cortex(TM)-M3 MCU */ + +INPUT(libc.a libm.a libgcc.a) + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) + +/* Set up a stack with a size of 2K */ +__initial_stack_pointer = 0x20002000 - 4; + +MEMORY +{ + VEC(rx) : ORIGIN = 0x08000000, LENGTH = 0x300 + ROM(rx) : ORIGIN = 0x08000300, LENGTH = 32K - 0x300 + RAM(rwx) : ORIGIN = 0x20000000, LENGTH = 0x1800 +} + +SECTIONS +{ + . = 0x08000000; + . = ALIGN(4); + + /* ISR vectors */ + .isr_vector : + { + *(.isr_vector) + . = ALIGN(0x100); + KEEP(*(.isr_vector)) + } > VEC = 0xAAAA + + /* startup */ + .startup : + { + *(.startup) + . = ALIGN(0x10); + KEEP(*(.startup)) + } > ROM = 0x5555 + + /* Program code (text), read-only data and static ctors */ + .text : + { + _ctors_begin = .; + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array*)) + _ctors_end = .; + *(.progmem*) + . = ALIGN(4); + *(.text) + . = ALIGN(4); + *(.text*) + . = ALIGN(4); + *(.rodata) + . = ALIGN(4); + *(.rodata*) + . = ALIGN(4); + *(.glue_7) + . = ALIGN(4); + *(.glue_7t) + . = ALIGN(4); + } > ROM + + .ARM.extab : + { + . = ALIGN(4); + *(.ARM.extab) + *(.ARM.extab*) + *(.gnu.linkonce.armextab.*) + . = ALIGN(4); + } > ROM + + .exidx : + { + . = ALIGN(4); + PROVIDE(__exidx_start = .); + *(.ARM.exidx*) + . = ALIGN(4); + PROVIDE(__exidx_end = .); + } > ROM + + .ARM.attributes : + { + *(.ARM.attributes) + } > ROM + + . = 0x20000000; + . = ALIGN(4); + + /* The ROM-to-RAM initialized data section */ + .data : + { + _data_begin = .; + *(.data) + . = ALIGN(4); + KEEP (*(.data)) + *(.data*) + . = ALIGN(4); + KEEP (*(.data*)) + _data_end = .; + } > RAM AT > ROM + + /* The uninitialized (zero-cleared) data section */ + .bss : + { + _bss_begin = .; + *(.bss) + . = ALIGN(4); + KEEP (*(.bss)) + *(.bss*) + . = ALIGN(4); + KEEP (*(.bss*)) + _bss_end = .; + } > RAM + + PROVIDE(end = .); + PROVIDE(_fini = .); + + _rom_data_begin = LOADADDR(.data); +} diff --git a/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv_files.gmk b/examples/chapter12_04a/target/micros/stm32f100/make/stm32f100_files.gmk similarity index 75% rename from examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv_files.gmk rename to examples/chapter12_04a/target/micros/stm32f100/make/stm32f100_files.gmk index ad3ecc5be..fa3be41a9 100644 --- a/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv_files.gmk +++ b/examples/chapter12_04a/target/micros/stm32f100/make/stm32f100_files.gmk @@ -1,5 +1,5 @@ # -# Copyright Christopher Kormanyos 2025. +# Copyright Christopher Kormanyos 2007 - 2025. # Distributed under the Boost Software License, # Version 1.0. (See accompanying file LICENSE_1_0.txt # or copy at http://www.boost.org/LICENSE_1_0.txt) @@ -9,9 +9,8 @@ # File list of the target-specific files in the project # ------------------------------------------------------------------------------ -FILES_TGT = $(PATH_APP)/mcal/mcal_gcc_cxx_completion \ - $(PATH_TGT)/Code/Startup/boot \ - $(PATH_TGT)/startup/crt0 \ - $(PATH_TGT)/startup/crt0_init_ram \ - $(PATH_TGT)/startup/crt1 \ +FILES_TGT = $(PATH_APP)/mcal/mcal_gcc_cxx_completion \ + $(PATH_TGT)/startup/crt0 \ + $(PATH_TGT)/startup/crt0_init_ram \ + $(PATH_TGT)/startup/crt1 \ $(PATH_TGT)/startup/int_vect diff --git a/examples/chapter12_04a/target/micros/stm32f100/make/stm32f100_flags.gmk b/examples/chapter12_04a/target/micros/stm32f100/make/stm32f100_flags.gmk new file mode 100644 index 000000000..38db32969 --- /dev/null +++ b/examples/chapter12_04a/target/micros/stm32f100/make/stm32f100_flags.gmk @@ -0,0 +1,44 @@ +# Copyright Christopher Kormanyos 2007 - 2025. +# Distributed under the Boost Software License, +# Version 1.0. (See accompanying file LICENSE_1_0.txt +# or copy at http://www.boost.org/LICENSE_1_0.txt) +# + +# ------------------------------------------------------------------------------ +# compiler flags for the target architecture +# ------------------------------------------------------------------------------ + +GCC_VERSION = 14.2.1 +GCC_TARGET = arm-none-eabi +GCC_PREFIX = arm-none-eabi + +TGT_SUFFIX = elf + +TGT_ALLFLAGS = -O2 \ + -finline-functions \ + -finline-limit=64 \ + -mcpu=cortex-m3 \ + -mtune=cortex-m3 \ + -mthumb \ + -mfloat-abi=soft \ + -mno-unaligned-access \ + -mno-long-calls + +TGT_CFLAGS = -std=c99 \ + -Wunsuffixed-float-constants \ + $(TGT_ALLFLAGS) + +TGT_CXXFLAGS = -std=c++14 \ + -Wno-psabi \ + $(TGT_ALLFLAGS) + +TGT_INCLUDES = -I$(PATH_APP)/util/STL_C++XX_stdfloat \ + -isystem $(PATH_APP)/util/STL + +TGT_AFLAGS = + +TGT_LDFLAGS = -nostdlib \ + -nostartfiles \ + -Wl,--gc-sections \ + -Wl,-Map,$(APP).map \ + -T $(LINKER_DEFINITION_FILE) diff --git a/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/startup/crt0.cpp b/examples/chapter12_04a/target/micros/stm32f100/startup/crt0.cpp similarity index 65% rename from examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/startup/crt0.cpp rename to examples/chapter12_04a/target/micros/stm32f100/startup/crt0.cpp index 2b577bdd0..d3aed22df 100644 --- a/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/startup/crt0.cpp +++ b/examples/chapter12_04a/target/micros/stm32f100/startup/crt0.cpp @@ -1,12 +1,12 @@ /////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2022 - 2024. +// Copyright Christopher Kormanyos 2007 - 2023. // Distributed under the Boost Software License, // Version 1.0. (See accompanying file LICENSE_1_0.txt // or copy at http://www.boost.org/LICENSE_1_0.txt) // -asm (".extern __initial_stack_pointer"); -asm (".extern InterruptVectorTable"); +// STM32 EABI ARM(R) Cortex-M3(TM) startup code. +// Expressed with C++ for STM32F100 by Chris. #include @@ -16,13 +16,15 @@ namespace crt void init_ctors(); } -extern "C" -{ - void __my_startup() __attribute__ ((section(".startup"))); -} +extern "C" void __my_startup() __attribute__((used, noinline)); void __my_startup() { + // Load the stack pointer. + // The stack pointer is automatically loaded from + // the base position of the interrupt vector table. + // So we do nothing here. + // Chip init: Watchdog, port, and oscillator. mcal::cpu::init(); @@ -36,7 +38,8 @@ void __my_startup() mcal::wdg::secure::trigger(); // Jump to main (and never return). - asm volatile("jal main"); + asm volatile("ldr r3, =main"); + asm volatile("blx r3"); // Catch an unexpected return from main. for(;;) diff --git a/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/startup/crt0_init_ram.cpp b/examples/chapter12_04a/target/micros/stm32f100/startup/crt0_init_ram.cpp similarity index 51% rename from examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/startup/crt0_init_ram.cpp rename to examples/chapter12_04a/target/micros/stm32f100/startup/crt0_init_ram.cpp index de3d14054..da29dfbc7 100644 --- a/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/startup/crt0_init_ram.cpp +++ b/examples/chapter12_04a/target/micros/stm32f100/startup/crt0_init_ram.cpp @@ -1,5 +1,5 @@ /////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2024. +// Copyright Christopher Kormanyos 2007 - 2023. // Distributed under the Boost Software License, // Version 1.0. (See accompanying file LICENSE_1_0.txt // or copy at http://www.boost.org/LICENSE_1_0.txt) @@ -16,12 +16,6 @@ extern "C" extern std::uintptr_t _data_end; // End address for the .data section. extern std::uintptr_t _bss_begin; // Start address for the .bss section. extern std::uintptr_t _bss_end; // End address for the .bss section. - - extern std::uintptr_t _srom_data_begin; // Start address for the initialization values of the rom-to-sram section. - extern std::uintptr_t _sdata_begin; // Start address for the .sdata section. - extern std::uintptr_t _sdata_end; // End address for the .sdata section. - extern std::uintptr_t _sbss_begin; // Start address for the .sbss section. - extern std::uintptr_t _sbss_end; // End address for the .sbss section. } namespace crt @@ -31,26 +25,10 @@ namespace crt void crt::init_ram() { - using memory_aligned_type = std::uint8_t; - - // Copy the sdata segment initializers from ROM to RAM. - // Note that all data segments are aligned by 1. - const std::size_t size_sdata = - std::size_t( static_cast(static_cast(&_sdata_end)) - - static_cast(static_cast(&_sdata_begin))); - - std::copy(static_cast(static_cast(&_srom_data_begin)), - static_cast(static_cast(&_srom_data_begin)) + size_sdata, - static_cast< memory_aligned_type*>(static_cast< void*>(&_sdata_begin))); - - // Clear the sbss segment. - // Note that the bss segment is aligned by 1. - std::fill(static_cast(static_cast(&_sbss_begin)), - static_cast(static_cast(&_sbss_end)), - static_cast(0U)); + using memory_aligned_type = std::uint32_t; // Copy the data segment initializers from ROM to RAM. - // Note that all data segments are aligned by 1. + // Note that all data segments are aligned by 4. const std::size_t size_data = std::size_t( static_cast(static_cast(&_data_end)) - static_cast(static_cast(&_data_begin))); @@ -60,7 +38,7 @@ void crt::init_ram() static_cast< memory_aligned_type*>(static_cast< void*>(&_data_begin))); // Clear the bss segment. - // Note that the bss segment is aligned by 1. + // Note that the bss segment is aligned by 4. std::fill(static_cast(static_cast(&_bss_begin)), static_cast(static_cast(&_bss_end)), static_cast(0U)); diff --git a/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/startup/crt1.cpp b/examples/chapter12_04a/target/micros/stm32f100/startup/crt1.cpp similarity index 94% rename from examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/startup/crt1.cpp rename to examples/chapter12_04a/target/micros/stm32f100/startup/crt1.cpp index 117f53f50..e253cc197 100644 --- a/examples/chapter12_04a/target/micros/bl602_sifive_e24_riscv/startup/crt1.cpp +++ b/examples/chapter12_04a/target/micros/stm32f100/startup/crt1.cpp @@ -1,5 +1,5 @@ /////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2022. +// Copyright Christopher Kormanyos 2007 - 2023. // Distributed under the Boost Software License, // Version 1.0. (See accompanying file LICENSE_1_0.txt // or copy at http://www.boost.org/LICENSE_1_0.txt) diff --git a/examples/chapter12_04a/target/micros/stm32f100/startup/int_vect.cpp b/examples/chapter12_04a/target/micros/stm32f100/startup/int_vect.cpp new file mode 100644 index 000000000..898515ea0 --- /dev/null +++ b/examples/chapter12_04a/target/micros/stm32f100/startup/int_vect.cpp @@ -0,0 +1,177 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2023. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include +#include +#include + +extern "C" void __initial_stack_pointer(); + +extern "C" void __my_startup () noexcept __attribute__((used, noinline)); +extern "C" void __vector_unused_irq () noexcept __attribute__((used, noinline)); +extern "C" void __nmi_handler () noexcept __attribute__((used, noinline)); +extern "C" void __hard_fault_handler () noexcept __attribute__((used, noinline)); +extern "C" void __mem_manage_handler () noexcept __attribute__((used, noinline)); +extern "C" void __bus_fault_handler () noexcept __attribute__((used, noinline)); +extern "C" void __usage_fault_handler() noexcept __attribute__((used, noinline)); +extern "C" void __svc_handler () noexcept __attribute__((used, noinline)); +extern "C" void __debug_mon_handler () noexcept __attribute__((used, noinline)); +extern "C" void __pend_sv_handler () noexcept __attribute__((used, noinline)); +extern "C" void __sys_tick_handler () noexcept __attribute__((used, noinline)); + +extern "C" void __vector_unused_irq () noexcept { for(;;) { mcal::cpu::nop(); } } +extern "C" void __nmi_handler () noexcept { for(;;) { mcal::cpu::nop(); } } +extern "C" void __hard_fault_handler () noexcept { for(;;) { mcal::cpu::nop(); } } +extern "C" void __mem_manage_handler () noexcept { for(;;) { mcal::cpu::nop(); } } +extern "C" void __bus_fault_handler () noexcept { for(;;) { mcal::cpu::nop(); } } +extern "C" void __usage_fault_handler() noexcept { for(;;) { mcal::cpu::nop(); } } +extern "C" void __svc_handler () noexcept { for(;;) { mcal::cpu::nop(); } } +extern "C" void __debug_mon_handler () noexcept { for(;;) { mcal::cpu::nop(); } } +extern "C" void __pend_sv_handler () noexcept { for(;;) { mcal::cpu::nop(); } } + +namespace +{ + typedef void(*isr_type)(); + + constexpr auto number_of_interrupts = static_cast(UINT8_C(128)); +} + +extern "C" +const volatile std::array __isr_vector __attribute__((section(".isr_vector"))); + +extern "C" +const volatile std::array __isr_vector = +{{ + __initial_stack_pointer, // 0x0000, initial stack pointer + __my_startup, // 0x0004, reset + __nmi_handler, // 0x0008, nmi exception + __hard_fault_handler, // 0x000C, hard fault exception + __mem_manage_handler, // 0x0010, memory management exception + __bus_fault_handler, // 0x0014, bus fault exception + __usage_fault_handler, // 0x0018, usage fault exception + __vector_unused_irq, // 0x001C, reserved + __vector_unused_irq, // 0x0020, reserved + __vector_unused_irq, // 0x0024, reserved + __vector_unused_irq, // 0x0028, reserved + __svc_handler, // 0x002C, svc handler + __debug_mon_handler, // 0x0030, debug monitor + __vector_unused_irq, // 0x0034, reserved + __pend_sv_handler, // 0x0038, pending svc, + __sys_tick_handler, // 0x003C, system tick handler, + __vector_unused_irq, // 0x0040, wwdg irq handler, + __vector_unused_irq, // 0x0044, pvd irq handler, + __vector_unused_irq, // 0x0048, tamper irq handler, + __vector_unused_irq, // 0x004C, rtc irq handler, + __vector_unused_irq, // 0x0050, flash irq handler, + __vector_unused_irq, // 0x0054, rcc irq handler, + __vector_unused_irq, // 0x0058, exti0 irq handler, + __vector_unused_irq, // 0x005C, exti1 irq handler, + __vector_unused_irq, // 0x0060, exti2 irq handler, + __vector_unused_irq, // 0x0064, exti3 irq handler, + __vector_unused_irq, // 0x0068, exti4 irq handler, + __vector_unused_irq, // 0x006C, dma_channel1 irq handler, + __vector_unused_irq, // 0x0070, dma_channel2 irq handler, + __vector_unused_irq, // 0x0074, dma_channel3 irq handler, + __vector_unused_irq, // 0x0078, dma_channel4 irq handler, + __vector_unused_irq, // 0x007C, dma_channel5 irq handler, + __vector_unused_irq, // 0x0080, dma_channel6 irq handler, + __vector_unused_irq, // 0x0084, dma_channel7 irq handler, + __vector_unused_irq, // 0x0088, adc irq handler, + __vector_unused_irq, // 0x008C, usb_hp_can_tx irq handler, + __vector_unused_irq, // 0x0090, usb_lp_can_rx0 irq handler, + __vector_unused_irq, // 0x0094, can_rx1 irq handler, + __vector_unused_irq, // 0x0098, can_sce irq handler, + __vector_unused_irq, // 0x009C, exti9_5 irq handler, + __vector_unused_irq, // 0x00A0, tim1_brk irq handler, + __vector_unused_irq, // 0x00A4, tim1_up irq handler, + __vector_unused_irq, // 0x00A8, tim1_trg_com irq handler, + __vector_unused_irq, // 0x00AC, tim1_cc irq handler, + __vector_unused_irq, // 0x00B0, tim2 irq handler, + __vector_unused_irq, // 0x00B4, tim3 irq handler, + __vector_unused_irq, // 0x00B8, tim4 irq handler, + __vector_unused_irq, // 0x00BC, i2c1_ev irq handler, + __vector_unused_irq, // 0x00C0, i2c1_er irq handler, + __vector_unused_irq, // 0x00C4, i2c2_ev irq handler, + __vector_unused_irq, // 0x00C8, i2c2_er irq handler, + __vector_unused_irq, // 0x00CC, spi1 irq handler, + __vector_unused_irq, // 0x00D0, spi2 irq handler, + __vector_unused_irq, // 0x00D4, usart1 irq handler, + __vector_unused_irq, // 0x00D8, usart2 irq handler, + __vector_unused_irq, // 0x00DC, usart3 irq handler, + __vector_unused_irq, // 0x00E0, exti15_10 irq handler, + __vector_unused_irq, // 0x00E4, rtcalarm irq handler, + __vector_unused_irq, // 0x00E8, usbwakeup irq handler, + __vector_unused_irq, // 0x00EC, reserved + __vector_unused_irq, // 0x00F0, reserved + __vector_unused_irq, // 0x00F4, reserved + __vector_unused_irq, // 0x00F8, reserved + __vector_unused_irq, // 0x00FC, reserved + __vector_unused_irq, // 0x0100, reserved + __vector_unused_irq, // 0x0104, reserved + __vector_unused_irq, // 0x0108, this is for boot in ram mode for medium density devices. + __vector_unused_irq, // 0x010C, unused + __vector_unused_irq, // 0x0110, unused + __vector_unused_irq, // 0x0114, unused + __vector_unused_irq, // 0x0118, unused + __vector_unused_irq, // 0x011C, unused + __vector_unused_irq, // 0x0120, unused + __vector_unused_irq, // 0x0124, unused + __vector_unused_irq, // 0x0128, unused + __vector_unused_irq, // 0x012C, unused + __vector_unused_irq, // 0x0130, unused + __vector_unused_irq, // 0x0134, unused + __vector_unused_irq, // 0x0138, unused + __vector_unused_irq, // 0x013C, unused + __vector_unused_irq, // 0x0140, unused + __vector_unused_irq, // 0x0144, unused + __vector_unused_irq, // 0x0148, unused + __vector_unused_irq, // 0x014C, unused + __vector_unused_irq, // 0x0150, unused + __vector_unused_irq, // 0x0154, unused + __vector_unused_irq, // 0x0158, unused + __vector_unused_irq, // 0x015C, unused + __vector_unused_irq, // 0x0160, unused + __vector_unused_irq, // 0x0164, unused + __vector_unused_irq, // 0x0168, unused + __vector_unused_irq, // 0x016C, unused + __vector_unused_irq, // 0x0170, unused + __vector_unused_irq, // 0x0174, unused + __vector_unused_irq, // 0x0178, unused + __vector_unused_irq, // 0x017C, unused + __vector_unused_irq, // 0x0180, unused + __vector_unused_irq, // 0x0184, unused + __vector_unused_irq, // 0x0188, unused + __vector_unused_irq, // 0x018C, unused + __vector_unused_irq, // 0x0190, unused + __vector_unused_irq, // 0x0194, unused + __vector_unused_irq, // 0x0198, unused + __vector_unused_irq, // 0x019C, unused + __vector_unused_irq, // 0x01A0, unused + __vector_unused_irq, // 0x01A4, unused + __vector_unused_irq, // 0x01A8, unused + nullptr, // 0x01AC, dummy + nullptr, // 0x01B0, dummy + nullptr, // 0x01B4, dummy + nullptr, // 0x01B8, dummy + nullptr, // 0x01BC, dummy + nullptr, // 0x01C0, dummy + nullptr, // 0x01C4, dummy + nullptr, // 0x01C8, dummy + nullptr, // 0x01CC, dummy + nullptr, // 0x01D0, dummy + nullptr, // 0x01D4, dummy + nullptr, // 0x01D8, dummy + nullptr, // 0x01DC, dummy + nullptr, // 0x01E0, dummy + nullptr, // 0x01E4, dummy + nullptr, // 0x01E8, dummy + nullptr, // 0x01EC, dummy + nullptr, // 0x01F0, dummy + nullptr, // 0x01F4, dummy + nullptr, // 0x01F8, dummy + nullptr // 0x01FC, dummy +}}; diff --git a/examples/readme.md b/examples/readme.md index e6f7eee0c..c9cfae6b2 100644 --- a/examples/readme.md +++ b/examples/readme.md @@ -106,7 +106,7 @@ This example performs a variety of floating-point calculations of selected speci Example ![chapter12_04a](https://github.com/ckormanyos/real-time-cpp/tree/master/examples/chapter12_04a) Benchmarking Floating-Point Calculations (32-bit variation).\ The same special functions and arguments are used as in Example Chapter12_04. In variation 12_04a, however, -the open-source 32-bit BL602 single-core RISC-V (SiFive E24) microcontroller is used. +the open-platform STM32F100 Value Line Discovery Kit placed on a breadboard is used. Example ![chapter16_08](https://github.com/ckormanyos/real-time-cpp/tree/master/examples/chapter16_08) Generating and displaying 128-bit Random Prime Numbers.\ This advanced example uses an extended integer class to create 128-bit unsigned prime integers with primality testing performed via Miller-Rabin.