diff --git a/.github/workflows/real-time-cpp.yml b/.github/workflows/real-time-cpp.yml index 5b15df3f6..2fafaae2f 100644 --- a/.github/workflows/real-time-cpp.yml +++ b/.github/workflows/real-time-cpp.yml @@ -236,19 +236,19 @@ jobs: strategy: fail-fast: false matrix: - suite: [ bl602_sifive_e24_riscv, riscvfe310, wch_ch32v307, xtensa_esp32_s3_riscv_cop ] + suite: [ bl602_sifive_e24_riscv, riscvfe310, wch_ch32v307, xtensa_esp32_p4, xtensa_esp32_s3_riscv_cop ] steps: - uses: actions/checkout@v4 with: fetch-depth: '0' - name: update-tools run: | - wget --no-check-certificate https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v15.2.0-1/xpack-riscv-none-elf-gcc-15.2.0-1-linux-x64.tar.gz - tar -xzf xpack-riscv-none-elf-gcc-15.2.0-1-linux-x64.tar.gz -C ${{ runner.workspace }} + wget --no-check-certificate https://github.com/espressif/crosstool-NG/releases/download/esp-14.2.0_20260121/riscv32-esp-elf-14.2.0_20260121-x86_64-linux-gnu.tar.gz + tar -xzf riscv32-esp-elf-14.2.0_20260121-x86_64-linux-gnu.tar.gz -C ${{ runner.workspace }} working-directory: ./ - name: target-riscv-${{ matrix.suite }} run: | - PATH="${{ runner.workspace }}/xpack-riscv-none-elf-gcc-15.2.0-1/bin:$PATH" + PATH="${{ runner.workspace }}/riscv32-esp-elf/bin:$PATH" ./target/build/build.sh ${{ matrix.suite }} rebuild ls -la ./bin/ref_app.elf ./bin/ref_app.hex ./bin/ref_app.map ./bin/ref_app.s19 working-directory: ./ref_app/ diff --git a/readme.md b/readme.md index 043e56567..6473bda34 100644 --- a/readme.md +++ b/readme.md @@ -96,6 +96,7 @@ The reference application supports the following targets (in alpha-numeric order | `wch_ch32v307` | WCH CH32v307 RISC-V board | | | `wch_ch32v307_llvm` | WCH CH32v307 RISC-V board (but using an LLVM toolchain) | | | `x86_64-w64-mingw32` | PC on `Win*`/`mingw64` via GNU/GCC x86_x64 compiler | | +| `xtensa_esp32_p4` | Espressif (XTENSA) ESP32-P4 multicore RISC-V SoC | X | | `xtensa_esp32_s3` | Espressif (XTENSA) NodeMCU ESP32-S3 | X | | `xtensa32` | Espressif (XTENSA) NodeMCU ESP32 | X | diff --git a/ref_app/ref_app.sln b/ref_app/ref_app.sln index aaca043fe..bc2dabede 100644 --- a/ref_app/ref_app.sln +++ b/ref_app/ref_app.sln @@ -73,6 +73,7 @@ Global target wch_ch32v307_llvm|x64 = target wch_ch32v307_llvm|x64 target wch_ch32v307|x64 = target wch_ch32v307|x64 target x86_64-w64-mingw32|x64 = target x86_64-w64-mingw32|x64 + target xtensa_esp32_p4|x64 = target xtensa_esp32_p4|x64 target xtensa_esp32_s3_riscv_cop|x64 = target xtensa_esp32_s3_riscv_cop|x64 target xtensa_esp32_s3|x64 = target xtensa_esp32_s3|x64 target xtensa32|x64 = target xtensa32|x64 @@ -109,6 +110,7 @@ Global {C8B59726-9319-45C3-8F11-F9F388FB6A2C}.target wch_ch32v307_llvm|x64.ActiveCfg = Release|x64 {C8B59726-9319-45C3-8F11-F9F388FB6A2C}.target wch_ch32v307|x64.ActiveCfg = Release|x64 {C8B59726-9319-45C3-8F11-F9F388FB6A2C}.target x86_64-w64-mingw32|x64.ActiveCfg = Release|x64 + {C8B59726-9319-45C3-8F11-F9F388FB6A2C}.target xtensa_esp32_p4|x64.ActiveCfg = Release|x64 {C8B59726-9319-45C3-8F11-F9F388FB6A2C}.target xtensa_esp32_s3_riscv_cop|x64.ActiveCfg = Release|x64 {C8B59726-9319-45C3-8F11-F9F388FB6A2C}.target xtensa_esp32_s3|x64.ActiveCfg = Release|x64 {C8B59726-9319-45C3-8F11-F9F388FB6A2C}.target xtensa32|x64.ActiveCfg = Release|x64 @@ -168,6 +170,8 @@ Global {30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target wch_ch32v307|x64.Build.0 = target wch_ch32v307|x64 {30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target x86_64-w64-mingw32|x64.ActiveCfg = target x86_64-w64-mingw32|x64 {30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target x86_64-w64-mingw32|x64.Build.0 = target x86_64-w64-mingw32|x64 + {30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target xtensa_esp32_p4|x64.ActiveCfg = target xtensa_esp32_p4|x64 + {30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target xtensa_esp32_p4|x64.Build.0 = target xtensa_esp32_p4|x64 {30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target xtensa_esp32_s3_riscv_cop|x64.ActiveCfg = target xtensa_esp32_s3_riscv_cop|x64 {30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target xtensa_esp32_s3_riscv_cop|x64.Build.0 = target xtensa_esp32_s3_riscv_cop|x64 {30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target xtensa_esp32_s3|x64.ActiveCfg = target xtensa_esp32_s3|x64 diff --git a/ref_app/ref_app.vcxproj b/ref_app/ref_app.vcxproj index 34c6b0128..9faabde92 100644 --- a/ref_app/ref_app.vcxproj +++ b/ref_app/ref_app.vcxproj @@ -1401,6 +1401,46 @@ true true + + true + true + + + true + true + + + true + true + + + true + true + + + true + true + + + true + true + + + true + true + + + true + true + + + true + true + + + true + true + true true @@ -3233,6 +3273,62 @@ true true + + true + true + + + true + true + + + true + true + + + true + true + + + true + true + + + true + true + + + true + true + + + true + true + + + true + true + + + true + true + + + true + true + + + true + true + + + true + true + + + true + true + true true diff --git a/ref_app/ref_app.vcxproj.filters b/ref_app/ref_app.vcxproj.filters index 1e1e2e869..3c8d1f3da 100644 --- a/ref_app/ref_app.vcxproj.filters +++ b/ref_app/ref_app.vcxproj.filters @@ -287,6 +287,9 @@ {40be70da-9086-46f9-b158-4dc468860fc7} + + {cc6519dd-1588-4aed-9bd1-c4cc22a5e560} + @@ -1369,6 +1372,36 @@ src\mcal\r7fa4m1ab + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + @@ -3120,6 +3153,48 @@ src\mcal\r7fa4m1ab + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + + + src\mcal\xtensa_esp32_p4 + diff --git a/ref_app/src/mcal/am6254_soc/mcal_gpt.cpp b/ref_app/src/mcal/am6254_soc/mcal_gpt.cpp index 61de864ea..6a4194859 100644 --- a/ref_app/src/mcal/am6254_soc/mcal_gpt.cpp +++ b/ref_app/src/mcal/am6254_soc/mcal_gpt.cpp @@ -1,5 +1,5 @@ /////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. +// Copyright Christopher Kormanyos 2007 - 2026. // Distributed under the Boost Software License, // Version 1.0. (See accompanying file LICENSE_1_0.txt // or copy at http://www.boost.org/LICENSE_1_0.txt) @@ -32,7 +32,11 @@ auto mcal::gpt::secure::get_time_elapsed_core1() -> mcal::gpt::value_type_core1 const value_type_core1 consistent_microsecond_tick = static_cast(ARM64_READ_SYSREG(CNTPCT_EL0)); // Convert the consistent tick to microseconds. - return static_cast(static_cast(consistent_microsecond_tick + UINT64_C(100)) / UINT64_C(200)); + return + static_cast + ( + static_cast(consistent_microsecond_tick + UINT64_C(100)) / UINT64_C(200) + ); } auto mcal::gpt::secure::get_time_elapsed_core2() -> mcal::gpt::value_type_core2 @@ -41,7 +45,11 @@ auto mcal::gpt::secure::get_time_elapsed_core2() -> mcal::gpt::value_type_core2 const value_type_core2 consistent_microsecond_tick = static_cast(ARM64_READ_SYSREG(CNTPCT_EL0)); // Convert the consistent tick to microseconds. - return static_cast(static_cast(consistent_microsecond_tick + UINT64_C(100)) / UINT64_C(200)); + return + static_cast + ( + static_cast(consistent_microsecond_tick + UINT64_C(100)) / UINT64_C(200) + ); } auto mcal::gpt::secure::get_time_elapsed_core3() -> mcal::gpt::value_type_core3 @@ -50,5 +58,9 @@ auto mcal::gpt::secure::get_time_elapsed_core3() -> mcal::gpt::value_type_core3 const value_type_core3 consistent_microsecond_tick = static_cast(ARM64_READ_SYSREG(CNTPCT_EL0)); // Convert the consistent tick to microseconds. - return static_cast(static_cast(consistent_microsecond_tick + UINT64_C(100)) / UINT64_C(200)); + return + static_cast + ( + static_cast(consistent_microsecond_tick + UINT64_C(100)) / UINT64_C(200) + ); } diff --git a/ref_app/src/mcal/riscvfe310/mcal_gpt.cpp b/ref_app/src/mcal/riscvfe310/mcal_gpt.cpp index 913549e1a..b2dc1aca6 100644 --- a/ref_app/src/mcal/riscvfe310/mcal_gpt.cpp +++ b/ref_app/src/mcal/riscvfe310/mcal_gpt.cpp @@ -87,18 +87,18 @@ void mcal::gpt::init(const config_type*) using clint_mtimecmp_reg_address_type = std::uint32_t; using clint_mtimecmp_reg_value_type = std::uint64_t; - using clint_mtimecmp_reg_access_type = + using clint_mtimecmp_reg_set_type = mcal::reg::reg_access_static::max)()>; - static_assert(std::is_same::value, + static_assert(std::is_same::value, "Error: Unexpected clint_mtimecmp register value type"); // Set the 64-bit mtimer compare register to its maximum value. // This results in an essentially infinite timeout. - clint_mtimecmp_reg_access_type::reg_set(); + clint_mtimecmp_reg_set_type::reg_set(); gpt_is_initialized() = true; } diff --git a/ref_app/src/mcal/xtensa32/from_sdk/esp32-hal-gpio.h b/ref_app/src/mcal/xtensa32/from_sdk/esp32-hal-gpio.h index 25478216c..c748b1251 100644 --- a/ref_app/src/mcal/xtensa32/from_sdk/esp32-hal-gpio.h +++ b/ref_app/src/mcal/xtensa32/from_sdk/esp32-hal-gpio.h @@ -28,7 +28,7 @@ #include - #ifdef __cplusplus + #if defined(__cplusplus) extern "C" { #endif @@ -57,7 +57,7 @@ void digitalWrite(const uint8_t pin, const uint8_t val); int digitalRead (const uint8_t pin); - #ifdef __cplusplus + #if defined(__cplusplus) } #endif diff --git a/ref_app/src/mcal/xtensa32/from_sdk/soc/gpio_struct.h b/ref_app/src/mcal/xtensa32/from_sdk/soc/gpio_struct.h index 4897726a2..fe328f5ed 100644 --- a/ref_app/src/mcal/xtensa32/from_sdk/soc/gpio_struct.h +++ b/ref_app/src/mcal/xtensa32/from_sdk/soc/gpio_struct.h @@ -27,7 +27,7 @@ #include -#ifdef __cplusplus +#if defined(__cplusplus) extern "C" { #endif @@ -222,7 +222,7 @@ typedef struct gpio_dev_t extern gpio_dev_t GPIO; -#ifdef __cplusplus +#if defined(__cplusplus) } #endif diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_benchmark.h b/ref_app/src/mcal/xtensa_esp32_p4/mcal_benchmark.h new file mode 100644 index 000000000..790060f1a --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_benchmark.h @@ -0,0 +1,24 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2014 - 2026. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_BENCHMARK_2014_04_16_H_ + #define MCAL_BENCHMARK_2014_04_16_H_ + + #include + #include + + #include + + namespace mcal + { + namespace benchmark + { + typedef mcal::port::port_pin benchmark_port_type; + } + } + +#endif // MCAL_BENCHMARK_2014_04_16_H_ diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_cpu.cpp b/ref_app/src/mcal/xtensa_esp32_p4/mcal_cpu.cpp new file mode 100644 index 000000000..ad5a9e94f --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_cpu.cpp @@ -0,0 +1,12 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2026. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include + +auto mcal::cpu::init() -> void +{ +} diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_cpu.h b/ref_app/src/mcal/xtensa_esp32_p4/mcal_cpu.h new file mode 100644 index 000000000..283f5418a --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_cpu.h @@ -0,0 +1,25 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2025 - 2026. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_CPU_2025_07_30_H + #define MCAL_CPU_2025_07_30_H + + #include + + namespace mcal + { + namespace cpu + { + auto init() -> void; + + inline auto post_init() -> void { } + + inline auto nop() noexcept -> void { asm volatile("nop"); } + } + } + +#endif // MCAL_CPU_2025_07_30_H diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_eep.cpp b/ref_app/src/mcal/xtensa_esp32_p4/mcal_eep.cpp new file mode 100644 index 000000000..d3e733806 --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_eep.cpp @@ -0,0 +1,21 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2026. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include + +auto mcal::eep::write(const address_type addr, const std::uint8_t data) -> void +{ + static_cast(addr); + static_cast(data); +} + +auto mcal::eep::read(const address_type addr) -> std::uint8_t +{ + static_cast(addr); + + return UINT8_C(0); +} diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_eep.h b/ref_app/src/mcal/xtensa_esp32_p4/mcal_eep.h new file mode 100644 index 000000000..eec30e756 --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_eep.h @@ -0,0 +1,27 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2026. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_EEP_2018_12_15_H + #define MCAL_EEP_2018_12_15_H + + #include + + namespace mcal + { + namespace eep + { + using config_type = void; + using address_type = std::uint32_t; + + inline auto init(const config_type*) -> void { } + + auto write(const address_type addr, const std::uint8_t data) -> void; + auto read (const address_type addr) -> std::uint8_t; + } + } + +#endif // MCAL_EEP_2018_12_15_H diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_gpt.cpp b/ref_app/src/mcal/xtensa_esp32_p4/mcal_gpt.cpp new file mode 100644 index 000000000..5117e319e --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_gpt.cpp @@ -0,0 +1,88 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2022 - 2026. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include +#include + +#include + +extern "C" +{ + extern auto osGetActiveCore(void) -> std::uint32_t; +} + +namespace +{ + auto gpt_is_initialized_core0() -> bool& __attribute__((used, noinline)); + auto gpt_is_initialized_core1() -> bool& __attribute__((used, noinline)); + + auto gpt_is_initialized_core0() -> bool& { static bool is_init { }; return is_init; } + auto gpt_is_initialized_core1() -> bool& { static bool is_init { }; return is_init; } +} + +auto mcal::gpt::init(const config_type*) -> void +{ + const std::uint32_t core_id { ::osGetActiveCore() }; + + if(core_id == std::uint32_t { UINT8_C(0) }) + { + gpt_is_initialized_core0() = true; + } + else + { + gpt_is_initialized_core1() = true; + } + + // Set the MTIME timeout to essentially infinite. + mcal::reg::reg_access_static::max)()>::reg_set(); +} + +auto mcal::gpt::secure::get_time_elapsed() -> mcal::gpt::value_type +{ + std::uint64_t tick_unscaled { }; + + if(gpt_is_initialized_core0()) + { + const std::uint64_t tick_unscaled_01 { mcal::reg::reg_access_static::reg_get() }; + const std::uint64_t tick_unscaled_02 { mcal::reg::reg_access_static::reg_get() }; + + tick_unscaled = + static_cast + ( + (static_cast(tick_unscaled_02) > static_cast(tick_unscaled_01)) + ? tick_unscaled_01 + : mcal::reg::reg_access_static::reg_get() + ); + + tick_unscaled = static_cast(static_cast(tick_unscaled + 160U) / 320U); + } + + return static_cast(tick_unscaled); +} + +auto mcal::gpt::secure::get_time_elapsed_core1() -> mcal::gpt::value_type +{ + std::uint64_t tick_unscaled { }; + + if(gpt_is_initialized_core1()) + { + const std::uint64_t tick_unscaled_01 { mcal::reg::reg_access_static::reg_get() }; + const std::uint64_t tick_unscaled_02 { mcal::reg::reg_access_static::reg_get() }; + + tick_unscaled = + static_cast + ( + (static_cast(tick_unscaled_02) > static_cast(tick_unscaled_01)) + ? tick_unscaled_01 + : mcal::reg::reg_access_static::reg_get() + ); + + tick_unscaled = static_cast(static_cast(tick_unscaled + 160U) / 320U); + } + + return static_cast(tick_unscaled); +} diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_gpt.h b/ref_app/src/mcal/xtensa_esp32_p4/mcal_gpt.h new file mode 100644 index 000000000..d368faf20 --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_gpt.h @@ -0,0 +1,30 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2025. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_GPT_2022_12_16_H + #define MCAL_GPT_2022_12_16_H + + #include + + namespace mcal + { + namespace gpt + { + using config_type = void; + using value_type = std::uint64_t; + + auto init(const config_type*) -> void; + + struct secure final + { + static auto get_time_elapsed() -> value_type; + static auto get_time_elapsed_core1() -> value_type; + }; + } + } + +#endif // MCAL_GPT_2022_12_16_H diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_irq.cpp b/ref_app/src/mcal/xtensa_esp32_p4/mcal_irq.cpp new file mode 100644 index 000000000..31797b977 --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_irq.cpp @@ -0,0 +1,12 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2026. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include + +auto mcal::irq::init(const config_type*) -> void +{ +} diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_irq.h b/ref_app/src/mcal/xtensa_esp32_p4/mcal_irq.h new file mode 100644 index 000000000..d10feb0d8 --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_irq.h @@ -0,0 +1,25 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2026. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_IRQ_2010_04_10_H + #define MCAL_IRQ_2010_04_10_H + + namespace mcal + { + namespace irq + { + using config_type = void; + + void init(const config_type*); + + // Not yet implemented. + inline void enable_all() { } + inline void disable_all() { } + } + } + +#endif // MCAL_IRQ_2010_04_10_H diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_led.cpp b/ref_app/src/mcal/xtensa_esp32_p4/mcal_led.cpp new file mode 100644 index 000000000..c2c8d6ee3 --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_led.cpp @@ -0,0 +1,59 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2026. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include + +#include +#include +#include +#include + +namespace local +{ + class led_port54 : public mcal::led::led_boolean_state_base + { + public: + led_port54() noexcept + { + gpio_cfg_output(54); + } + + ~led_port54() override = default; + + auto toggle() noexcept -> void override + { + using base_class_type = led_boolean_state_base; + + gpio_toggle_output_level(54); + + base_class_type::toggle(); + } + }; + + class led_port19 : public mcal::led::led_boolean_state_base + { + public: + led_port19() noexcept + { + gpio_cfg_output(19); + } + + ~led_port19() override = default; + + auto toggle() noexcept -> void override + { + using base_class_type = led_boolean_state_base; + + gpio_toggle_output_level(19); + + base_class_type::toggle(); + } + }; +} // namespace local + +auto mcal::led::led0() -> mcal::led::led_base& { static local::led_port54 my_led { }; return my_led; } +auto mcal::led::led1() -> mcal::led::led_base& { static local::led_port19 my_led { }; return my_led; } diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_led.h b/ref_app/src/mcal/xtensa_esp32_p4/mcal_led.h new file mode 100644 index 000000000..d25db29c7 --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_led.h @@ -0,0 +1,24 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2024. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_LED_2010_09_14_H + #define MCAL_LED_2010_09_14_H + + #include + + #include + + namespace mcal + { + namespace led + { + auto led0() -> led_base&; + auto led1() -> led_base&; + } + } + +#endif // MCAL_LED_2010_09_14_H diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_memory_progmem.h b/ref_app/src/mcal/xtensa_esp32_p4/mcal_memory_progmem.h new file mode 100644 index 000000000..9668b68c4 --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_memory_progmem.h @@ -0,0 +1,72 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2019 - 2020. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_MEMORY_PROGMEM_2019_08_17_H_ + #define MCAL_MEMORY_PROGMEM_2019_08_17_H_ + + #include + + #define MY_PROGMEM + + #if defined(__cplusplus) + extern "C" + { + #endif + + typedef uintptr_t mcal_progmem_uintptr_t; + typedef ptrdiff_t mcal_progmem_ptrdiff_t; + + #define MCAL_PROGMEM_ADDRESSOF(x) ((mcal_progmem_uintptr_t) (&(x))) + + static inline uint8_t mcal_memory_progmem_read_byte(const mcal_progmem_uintptr_t src_addr) + { + return *(const uint8_t*) src_addr; + } + + static inline uint16_t mcal_memory_progmem_read_word(const mcal_progmem_uintptr_t src_addr) + { + uint16_t dest; + + *(((uint8_t*) &dest) + 0U) = *((const uint8_t*) (src_addr + 0U)); + *(((uint8_t*) &dest) + 1U) = *((const uint8_t*) (src_addr + 1U)); + + return dest; + } + + static inline uint32_t mcal_memory_progmem_read_dword(const mcal_progmem_uintptr_t src_addr) + { + uint32_t dest; + + *(((uint8_t*) &dest) + 0U) = *((const uint8_t*) (src_addr + 0U)); + *(((uint8_t*) &dest) + 1U) = *((const uint8_t*) (src_addr + 1U)); + *(((uint8_t*) &dest) + 2U) = *((const uint8_t*) (src_addr + 2U)); + *(((uint8_t*) &dest) + 3U) = *((const uint8_t*) (src_addr + 3U)); + + return dest; + } + + static inline uint64_t mcal_memory_progmem_read_qword(const mcal_progmem_uintptr_t src_addr) + { + uint64_t dest; + + *(((uint8_t*) &dest) + 0U) = *((const uint8_t*) (src_addr + 0U)); + *(((uint8_t*) &dest) + 1U) = *((const uint8_t*) (src_addr + 1U)); + *(((uint8_t*) &dest) + 2U) = *((const uint8_t*) (src_addr + 2U)); + *(((uint8_t*) &dest) + 3U) = *((const uint8_t*) (src_addr + 3U)); + *(((uint8_t*) &dest) + 4U) = *((const uint8_t*) (src_addr + 4U)); + *(((uint8_t*) &dest) + 5U) = *((const uint8_t*) (src_addr + 5U)); + *(((uint8_t*) &dest) + 6U) = *((const uint8_t*) (src_addr + 6U)); + *(((uint8_t*) &dest) + 7U) = *((const uint8_t*) (src_addr + 7U)); + + return dest; + } + + #if defined(__cplusplus) + } + #endif + +#endif // MCAL_MEMORY_PROGMEM_2019_08_17_H_ diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_osc.cpp b/ref_app/src/mcal/xtensa_esp32_p4/mcal_osc.cpp new file mode 100644 index 000000000..65f51ae6a --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_osc.cpp @@ -0,0 +1,12 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2024. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include + +auto mcal::osc::init(const config_type*) -> void +{ +} diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_osc.h b/ref_app/src/mcal/xtensa_esp32_p4/mcal_osc.h new file mode 100644 index 000000000..cb8944d84 --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_osc.h @@ -0,0 +1,21 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2025. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_OSC_2011_10_20_H + #define MCAL_OSC_2011_10_20_H + + namespace mcal + { + namespace osc + { + using config_type = void; + + auto init(const config_type*) -> void; + } + } + +#endif // MCAL_OSC_2011_10_20_H diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_port.cpp b/ref_app/src/mcal/xtensa_esp32_p4/mcal_port.cpp new file mode 100644 index 000000000..85e46c9cb --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_port.cpp @@ -0,0 +1,12 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2025. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include + +void mcal::port::init(const config_type*) +{ +} diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_port.h b/ref_app/src/mcal/xtensa_esp32_p4/mcal_port.h new file mode 100644 index 000000000..923546a35 --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_port.h @@ -0,0 +1,55 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2026. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_PORT_2025_02_22_H + #define MCAL_PORT_2025_02_22_H + + #include + + #include + + namespace mcal + { + namespace port + { + typedef void config_type; + + void init(const config_type*); + + template + class port_pin + { + public: + static auto set_direction_output() -> void + { + } + + static auto set_direction_input() -> void + { + } + + static auto set_pin_high() -> void + { + } + + static auto set_pin_low() -> void + { + } + + static auto read_input_value() -> bool + { + return false; + } + + static auto toggle_pin() -> void + { + } + }; + } + } + +#endif // MCAL_PORT_2025_02_22_H diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_pwm.cpp b/ref_app/src/mcal/xtensa_esp32_p4/mcal_pwm.cpp new file mode 100644 index 000000000..cf0b192b5 --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_pwm.cpp @@ -0,0 +1,12 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2025. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include + +auto mcal::pwm::init(const config_type*) -> void +{ +} diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_pwm.h b/ref_app/src/mcal/xtensa_esp32_p4/mcal_pwm.h new file mode 100644 index 000000000..a0bcf067a --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_pwm.h @@ -0,0 +1,21 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2020. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_PWM_2010_09_14_H + #define MCAL_PWM_2010_09_14_H + + namespace mcal + { + namespace pwm + { + using config_type = void; + + void init(const config_type*); + } + } + +#endif // MCAL_PWM_2010_09_14_H diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_reg.h b/ref_app/src/mcal/xtensa_esp32_p4/mcal_reg.h new file mode 100644 index 000000000..fcec144d1 --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_reg.h @@ -0,0 +1,30 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2026. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_REG_2026_02_11_H + #define MCAL_REG_2026_02_11_H + + #include + + namespace mcal + { + namespace reg + { + constexpr std::uint32_t clint_base { UINT32_C(0x20000000) }; + constexpr std::uint32_t clint_mtime { clint_base + static_cast(UINT32_C(0x0000BFF8)) }; + constexpr std::uint32_t clint_mtimeh { clint_base + static_cast(UINT32_C(0x0000BFFC)) }; + constexpr std::uint32_t clint_mtimecmp { clint_base + static_cast(UINT32_C(0x00004000)) }; + constexpr std::uint32_t clint_mtimecmph { clint_base + static_cast(UINT32_C(0x00004004)) }; + + constexpr std::uint32_t clic_base { UINT32_C(0x20800000) }; + } + } + + #include + #include + +#endif // MCAL_REG_2026_02_11_H diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_ser.h b/ref_app/src/mcal/xtensa_esp32_p4/mcal_ser.h new file mode 100644 index 000000000..7eb790916 --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_ser.h @@ -0,0 +1,21 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2025. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_SER_2011_10_20_H + #define MCAL_SER_2011_10_20_H + + namespace mcal + { + namespace ser + { + using config_type = void; + + inline void init(const config_type*) { } + } + } + +#endif // MCAL_SER_2011_10_20_H diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_spi.cpp b/ref_app/src/mcal/xtensa_esp32_p4/mcal_spi.cpp new file mode 100644 index 000000000..90723f45f --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_spi.cpp @@ -0,0 +1,12 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2012 - 2025. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include + +void mcal::spi::init(const mcal::spi::config_type*) +{ +} diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_spi.h b/ref_app/src/mcal/xtensa_esp32_p4/mcal_spi.h new file mode 100644 index 000000000..26563e885 --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_spi.h @@ -0,0 +1,19 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2012 - 2025. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_SPI_2012_05_24_H + #define MCAL_SPI_2012_05_24_H + + namespace mcal { namespace spi { + + using config_type = void; + + auto init(const config_type*) -> void; + + } } + +#endif // MCAL_SPI_2012_05_24_H diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_wdg.cpp b/ref_app/src/mcal/xtensa_esp32_p4/mcal_wdg.cpp new file mode 100644 index 000000000..d479c203e --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_wdg.cpp @@ -0,0 +1,17 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2020. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include +#include + +void mcal::wdg::init(const config_type*) +{ +} + +void mcal::wdg::secure::trigger() +{ +} diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_wdg.h b/ref_app/src/mcal/xtensa_esp32_p4/mcal_wdg.h new file mode 100644 index 000000000..996659eea --- /dev/null +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_wdg.h @@ -0,0 +1,26 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2007 - 2025. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#ifndef MCAL_WDG_2010_04_10_H + #define MCAL_WDG_2010_04_10_H + + namespace mcal + { + namespace wdg + { + using config_type = void; + + auto init(const config_type*) -> void; + + struct secure final + { + static auto trigger() -> void; + }; + } + } + +#endif // MCAL_WDG_2010_04_10_H diff --git a/ref_app/target.vcxproj b/ref_app/target.vcxproj index 8e4b50703..5e39c477e 100644 --- a/ref_app/target.vcxproj +++ b/ref_app/target.vcxproj @@ -113,6 +113,10 @@ target xtensa32 x64 + + target xtensa_esp32_p4 + x64 + target xtensa_esp32_s3_riscv_cop x64 @@ -262,6 +266,12 @@ true v143 + + Makefile + Unicode + true + v143 + Makefile Unicode @@ -416,6 +426,9 @@ + + + @@ -463,6 +476,7 @@ target\build\build.bat stm32h7a3 target\build\build.bat xtensa32 target\build\build.bat xtensa_esp32_s3 + target\build\build.bat xtensa_esp32_p4 target\build\build.bat xtensa_esp32_s3_riscv_cop target\build\build.bat stm32f429 target\build\build.bat am335x @@ -493,6 +507,7 @@ target\build\build.bat stm32h7a3 rebuild target\build\build.bat xtensa32 rebuild target\build\build.bat xtensa_esp32_s3 rebuild + target\build\build.bat xtensa_esp32_p4 rebuild target\build\build.bat xtensa_esp32_s3_riscv_cop rebuild target\build\build.bat stm32f429 rebuild @@ -524,6 +539,7 @@ target\build\build.bat stm32h7a3 clean_all target\build\build.bat xtensa32 clean_all target\build\build.bat xtensa_esp32_s3 clean_all + target\build\build.bat xtensa_esp32_p4 clean_all target\build\build.bat xtensa_esp32_s3_riscv_cop clean_all target\build\build.bat stm32f429 clean_all @@ -555,6 +571,7 @@ $(SolutionDir)bin\ref_app.hex $(SolutionDir)bin\ref_app.hex $(SolutionDir)bin\ref_app.hex + $(SolutionDir)bin\ref_app.hex $(SolutionDir)bin\ref_app.hex $(SolutionDir)bin\ref_app.hex $(SolutionDir)bin\ref_app.hex @@ -586,6 +603,7 @@ ESP_PLATFORM; MBEDTLS_CONFIG_FILE="mbedtls/esp_config.h"; HAVE_CONFIG_H; GCC_NOT_5_2_0=1; WITH_POSIX; F_CPU=240000000L; ARDUINO=10813; ARDUINO_ESP32_DEV; ARDUINO_ARCH_ESP32; ARDUINO_BOARD="ESP32_DEV"; ARDUINO_VARIANT="esp32"; ESP32; CORE_DEBUG_LEVEL=0 + @@ -616,6 +634,7 @@ $(SolutionDir)src\util\STL_C++XX_stdfloat;$(SolutionDir)src\util\STL;$(SolutionDir)/src;$(SolutionDir)/src/mcal/stm32f446 $(ProjectDir)/src/util/STL_C++XX_stdfloat; $(ProjectDir)/src/util/STL; $(ProjectDir)/src; $(ProjectDir)/src/mcal/xtensa32; $(ProjectDir)/src/util/STL_C++XX_stdfloat; $(ProjectDir)/src/util/STL; $(ProjectDir)/src; $(ProjectDir)/src/mcal/xtensa_esp32_s3; + $(ProjectDir)/target/micros/xtensa_esp32_p4/startup/Code; $(ProjectDir)/target/micros/xtensa_esp32_p4/startup/Code/Appli; $(ProjectDir)/target/micros/xtensa_esp32_p4/startup/Code/Mcal; $(ProjectDir)/target/micros/xtensa_esp32_p4/startup/Code/Startup; $(ProjectDir)/src; $(ProjectDir)/src/mcal/xtensa_esp32_p4; $(ProjectDir)/src/util/STL_C++XX_stdfloat; $(ProjectDir)/src/util/STL; $(ProjectDir)/src; $(ProjectDir)/src/mcal/xtensa_esp32_s3; $(SolutionDir)src\util\STL_C++XX_stdfloat;$(SolutionDir)src\util\STL;$(SolutionDir)/src;$(SolutionDir)/src/mcal/stm32f429 $(SolutionDir)/src;$(SolutionDir)/src/mcal/am335x @@ -646,6 +665,7 @@ + @@ -676,6 +696,7 @@ + @@ -706,6 +727,7 @@ + @@ -949,6 +971,11 @@ $(SolutionDir)tmp\log\ref_app.log + + + $(SolutionDir)tmp\log\ref_app.log + + $(SolutionDir)tmp\log\ref_app.log @@ -1126,6 +1153,10 @@ + + + + @@ -1252,6 +1283,11 @@ + + + + + @@ -1268,6 +1304,7 @@ + diff --git a/ref_app/target.vcxproj.filters b/ref_app/target.vcxproj.filters index c723efc3d..6f2821d34 100644 --- a/ref_app/target.vcxproj.filters +++ b/ref_app/target.vcxproj.filters @@ -340,6 +340,27 @@ {e85df680-7e70-4f5d-87c0-73dbb822c1ba} + + {4ce9fafb-0c5d-4593-b8f8-c16c3fc11c9c} + + + {c72d0dcc-9b1a-4a96-b2e4-0d2f5b65711c} + + + {cdb1aef0-d686-4790-8231-17b7cd6185cf} + + + {b2aaad4e-1735-4de1-a6dc-ac965b62d05e} + + + {a4e34517-143d-491c-925b-5d3e7d7bd195} + + + {98fa75e2-bb60-4a37-9e72-f609821f0859} + + + {17889d6f-9174-40cb-bcad-01e3995207e5} + @@ -780,6 +801,18 @@ micros\r7fa4m1ab\make + + micros\xtensa_esp32_p4\make + + + micros\xtensa_esp32_p4\make + + + micros\xtensa_esp32_p4\make + + + micros\xtensa_esp32_p4\startup\Code\Startup + @@ -1133,6 +1166,21 @@ micros\r7fa4m1ab\startup + + micros\xtensa_esp32_p4\startup\Code\Appli + + + micros\xtensa_esp32_p4\startup\Code\Mcal + + + micros\xtensa_esp32_p4\startup\Code\Startup + + + micros\xtensa_esp32_p4\startup\Code\Startup + + + micros\xtensa_esp32_p4\startup\Code\Appli + @@ -1152,6 +1200,9 @@ micros\am6254_soc\Code\Startup\Core\a53 + + micros\xtensa_esp32_p4\startup\Code\Mcal + diff --git a/ref_app/target/build/test_app_benchmarks_stm32f446.sh b/ref_app/target/build/test_app_benchmarks_stm32f446.sh index 62a82c4ed..9b4312032 100755 --- a/ref_app/target/build/test_app_benchmarks_stm32f446.sh +++ b/ref_app/target/build/test_app_benchmarks_stm32f446.sh @@ -38,6 +38,9 @@ $GCC -std=$STD -Werror -Wall $wflags -O2 -g -gdwarf-2 -fno-exceptions -ffunction $GCC -std=$STD -Werror -Wall $wflags -O2 -g -gdwarf-2 -fno-exceptions -ffunction-sections -fdata-sections -x c++ -fno-rtti -fno-use-cxa-atexit -fno-exceptions -fno-nonansi-builtins -fno-threadsafe-statics -fno-enforce-eh-specs -ftemplate-depth=128 -Wzero-as-null-pointer-constant -mcpu=cortex-m4 -mtune=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -ffast-math -mno-unaligned-access -mno-long-calls -I./src/mcal/stm32f446 -I./src -DAPP_BENCHMARK_TYPE=APP_BENCHMARK_TYPE_TRAPEZOID_INTEGRAL -DAPP_BENCHMARK_STANDALONE_MAIN ./src/app/benchmark/app_benchmark_trapezoid_integral.cpp ./target/micros/stm32f446/make/single/crt.cpp -nostartfiles -Wl,--gc-sections -Wl,-Map,./bin/app_benchmark_trapezoid_integral.map -T ./target/micros/stm32f446/make/stm32f446.ld --specs=nano.specs --specs=nosys.specs -o ./bin/app_benchmark_trapezoid_integral.elf $GCC -std=$STD -Werror -Wall $wflags -O2 -g -gdwarf-2 -fno-exceptions -ffunction-sections -fdata-sections -x c++ -fno-rtti -fno-use-cxa-atexit -fno-exceptions -fno-nonansi-builtins -fno-threadsafe-statics -fno-enforce-eh-specs -ftemplate-depth=128 -Wzero-as-null-pointer-constant -mcpu=cortex-m4 -mtune=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -ffast-math -mno-unaligned-access -mno-long-calls -I./src/mcal/stm32f446 -I./src -DAPP_BENCHMARK_TYPE=APP_BENCHMARK_TYPE_WIDE_DECIMAL -DAPP_BENCHMARK_STANDALONE_MAIN ./src/app/benchmark/app_benchmark_wide_decimal.cpp ./target/micros/stm32f446/make/single/crt.cpp -nostartfiles -Wl,--gc-sections -Wl,-Map,./bin/app_benchmark_wide_decimal.map -T ./target/micros/stm32f446/make/stm32f446.ld --specs=nano.specs --specs=nosys.specs -o ./bin/app_benchmark_wide_decimal.elf $GCC -std=$STD -Werror -Wall $wflags -O2 -g -gdwarf-2 -fno-exceptions -ffunction-sections -fdata-sections -x c++ -fno-rtti -fno-use-cxa-atexit -fno-exceptions -fno-nonansi-builtins -fno-threadsafe-statics -fno-enforce-eh-specs -ftemplate-depth=128 -Wzero-as-null-pointer-constant -mcpu=cortex-m4 -mtune=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -ffast-math -mno-unaligned-access -mno-long-calls -I./src/mcal/stm32f446 -I./src -DAPP_BENCHMARK_TYPE=APP_BENCHMARK_TYPE_WIDE_INTEGER -DAPP_BENCHMARK_STANDALONE_MAIN ./src/app/benchmark/app_benchmark_wide_integer.cpp ./target/micros/stm32f446/make/single/crt.cpp -nostartfiles -Wl,--gc-sections -Wl,-Map,./bin/app_benchmark_wide_integer.map -T ./target/micros/stm32f446/make/stm32f446.ld --specs=nano.specs --specs=nosys.specs -o ./bin/app_benchmark_wide_integer.elf +$GCC -std=$STD -Werror -Wall -O2 -g -gdwarf-2 -fno-exceptions -ffunction-sections -fdata-sections -x c++ -fno-rtti -fno-use-cxa-atexit -fno-exceptions -fno-nonansi-builtins -fno-threadsafe-statics -fno-enforce-eh-specs -ftemplate-depth=128 -mcpu=cortex-m4 -mtune=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -ffast-math -mno-unaligned-access -mno-long-calls -I./src/mcal/stm32f446 -I./src -I../../boost-root -DAPP_BENCHMARK_TYPE=APP_BENCHMARK_TYPE_BOOST_MATH_CBRT_TGAMMA -DAPP_BENCHMARK_STANDALONE_MAIN ./src/app/benchmark/app_benchmark_boost_math_cbrt_tgamma.cpp ./target/micros/stm32f446/make/single/crt.cpp -nostartfiles -Wl,--gc-sections -Wl,-Map,./bin/app_benchmark_boost_math_cbrt_tgamma.map -T ./target/micros/stm32f446/make/stm32f446_with_stdlib.ld --specs=nano.specs --specs=nosys.specs -o ./bin/app_benchmark_boost_math_cbrt_tgamma.elf +$GCC -std=$STD -Werror -Wall -O2 -g -gdwarf-2 -fno-exceptions -ffunction-sections -fdata-sections -x c++ -fno-rtti -fno-use-cxa-atexit -fno-exceptions -fno-nonansi-builtins -fno-threadsafe-statics -fno-enforce-eh-specs -ftemplate-depth=128 -mcpu=cortex-m4 -mtune=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -ffast-math -mno-unaligned-access -mno-long-calls -I./src/mcal/stm32f446 -I./src -I../../boost-root -DAPP_BENCHMARK_TYPE=APP_BENCHMARK_TYPE_BOOST_MATH_CYL_BESSEL_J -DAPP_BENCHMARK_STANDALONE_MAIN ./src/app/benchmark/app_benchmark_boost_math_cyl_bessel_j.cpp ./target/micros/stm32f446/make/single/crt.cpp -nostartfiles -Wl,--gc-sections -Wl,-Map,./bin/app_benchmark_boost_math_cyl_bessel_j.map -T ./target/micros/stm32f446/make/stm32f446_with_stdlib.ld --specs=nano.specs --specs=nosys.specs -o ./bin/app_benchmark_boost_math_cyl_bessel_j.elf +$GCC -std=$STD -Werror -Wall -O2 -g -gdwarf-2 -fno-exceptions -ffunction-sections -fdata-sections -x c++ -fno-rtti -fno-use-cxa-atexit -fno-exceptions -fno-nonansi-builtins -fno-threadsafe-statics -fno-enforce-eh-specs -ftemplate-depth=128 -mcpu=cortex-m4 -mtune=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -ffast-math -mno-unaligned-access -mno-long-calls -I./src/mcal/stm32f446 -I./src -I../../boost-root -DAPP_BENCHMARK_TYPE=APP_BENCHMARK_TYPE_BOOST_MULTIPRECISION_CBRT -DAPP_BENCHMARK_STANDALONE_MAIN ./src/app/benchmark/app_benchmark_boost_multiprecision_cbrt.cpp ./target/micros/stm32f446/make/single/crt.cpp -nostartfiles -Wl,--gc-sections -Wl,-Map,./bin/app_benchmark_boost_multiprecision_cbrt.map -T ./target/micros/stm32f446/make/stm32f446_with_stdlib.ld --specs=nano.specs --specs=nosys.specs -o ./bin/app_benchmark_boost_multiprecision_cbrt.elf $GCC -std=$STD -Werror -Wall $wflags -O2 -g -gdwarf-2 -fno-exceptions -ffunction-sections -fdata-sections -x c++ -fno-rtti -fno-use-cxa-atexit -fno-exceptions -fno-nonansi-builtins -fno-threadsafe-statics -fno-enforce-eh-specs -ftemplate-depth=128 -Wzero-as-null-pointer-constant -mcpu=cortex-m4 -mtune=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -ffast-math -mno-unaligned-access -mno-long-calls -I./src/mcal/stm32f446 -I./src -DAPP_BENCHMARK_TYPE=APP_BENCHMARK_TYPE_HASH_SHA256 -DAPP_BENCHMARK_STANDALONE_MAIN ./src/app/benchmark/app_benchmark_hash_sha256.cpp ./target/micros/stm32f446/make/single/crt.cpp -nostartfiles -Wl,--gc-sections -Wl,-Map,./bin/app_benchmark_hash_sha256.map -T ./target/micros/stm32f446/make/stm32f446.ld --specs=nano.specs --specs=nosys.specs -o ./bin/app_benchmark_hash_sha256.elf $GCC -std=$STD -Werror -Wall $wflags -Os -g -gdwarf-2 -fno-exceptions -ffunction-sections -fdata-sections -x c++ -fno-rtti -fno-use-cxa-atexit -fno-exceptions -fno-nonansi-builtins -fno-threadsafe-statics -fno-enforce-eh-specs -ftemplate-depth=128 -Wzero-as-null-pointer-constant -mcpu=cortex-m4 -mtune=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -ffast-math -mno-unaligned-access -mno-long-calls -I./src/mcal/stm32f446 -I./src -DAPP_BENCHMARK_TYPE=APP_BENCHMARK_TYPE_ECC_GENERIC_ECC -DAPP_BENCHMARK_STANDALONE_MAIN ./src/app/benchmark/app_benchmark_ecc_generic_ecc.cpp ./target/micros/stm32f446/make/single/crt.cpp -nostartfiles -Wl,--gc-sections -Wl,-Map,./bin/app_benchmark_ecc_generic_ecc.map -T ./target/micros/stm32f446/make/stm32f446_with_stdlib.ld --specs=nano.specs --specs=nosys.specs -o ./bin/app_benchmark_ecc_generic_ecc.elf $GCC -std=$STD -Werror -Wall -O2 -g -gdwarf-2 -fno-exceptions -ffunction-sections -fdata-sections -x c++ -fno-rtti -fno-use-cxa-atexit -fno-exceptions -fno-nonansi-builtins -fno-threadsafe-statics -fno-enforce-eh-specs -ftemplate-depth=128 -Wzero-as-null-pointer-constant -mcpu=cortex-m4 -mtune=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -ffast-math -mno-unaligned-access -mno-long-calls -I./src/mcal/stm32f446 -I./src -I../../cppalliance-decimal-root/include -I../../boost-root -DAPP_BENCHMARK_TYPE=APP_BENCHMARK_TYPE_NON_STD_DECIMAL -DAPP_BENCHMARK_STANDALONE_MAIN ./src/app/benchmark/app_benchmark_non_std_decimal.cpp ./target/micros/stm32f446/make/single/crt.cpp -nostartfiles -Wl,--gc-sections -Wl,-Map,./bin/app_benchmark_non_std_decimal.map -T ./target/micros/stm32f446/make/stm32f446_with_stdlib.ld --specs=nano.specs --specs=nosys.specs -o ./bin/app_benchmark_non_std_decimal.elf @@ -91,6 +94,15 @@ result_ls_wide_decimal=$? ls -la ./bin/app_benchmark_wide_integer.elf ./bin/app_benchmark_wide_integer.map result_ls_wide_integer=$? +ls -la ./bin/app_benchmark_boost_math_cbrt_tgamma.elf ./bin/app_benchmark_boost_math_cbrt_tgamma.map +result_ls_boost_math_cbrt_tgamma=$? + +ls -la ./bin/app_benchmark_boost_math_cyl_bessel_j.elf ./bin/app_benchmark_boost_math_cyl_bessel_j.map +result_ls_boost_math_cyl_bessel_j=$? + +ls -la ./bin/app_benchmark_boost_multiprecision_cbrt.elf ./bin/app_benchmark_boost_multiprecision_cbrt.map +result_ls_boost_multiprecision_cbrt=$? + ls -la ./bin/app_benchmark_hash_sha256.elf ./bin/app_benchmark_hash_sha256.map result_ls_hash_sha256=$? @@ -118,6 +130,9 @@ echo "result_ls_soft_double_h2f1 : " "$result_ls_soft_double_h2f1" echo "result_ls_trapezoid_integral : " "$result_ls_trapezoid_integral" echo "result_ls_wide_decimal : " "$result_ls_wide_decimal" echo "result_ls_wide_integer : " "$result_ls_wide_integer" +echo "result_ls_boost_math_cbrt_tgamma : " "$result_ls_boost_math_cbrt_tgamma" +echo "result_ls_boost_math_cyl_bessel_j : " "$result_ls_boost_math_cyl_bessel_j" +echo "result_ls_boost_multiprecision_cbrt : " "$result_ls_boost_multiprecision_cbrt" echo "result_ls_hash_sha256 : " "$result_ls_hash_sha256" echo "result_ls_ecc_generic_ecc : " "$result_ls_ecc_generic_ecc" echo "result_ls_non_std_decimal : " "$result_ls_non_std_decimal" diff --git a/ref_app/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv_flags.gmk b/ref_app/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv_flags.gmk index 8cf5163f5..f8be8428f 100644 --- a/ref_app/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv_flags.gmk +++ b/ref_app/target/micros/bl602_sifive_e24_riscv/make/bl602_sifive_e24_riscv_flags.gmk @@ -1,4 +1,4 @@ -# Copyright Christopher Kormanyos 2025. +# Copyright Christopher Kormanyos 2025 - 2026. # Distributed under the Boost Software License, # Version 1.0. (See accompanying file LICENSE_1_0.txt # or copy at http://www.boost.org/LICENSE_1_0.txt) @@ -8,10 +8,10 @@ # compiler flags for the target architecture # ------------------------------------------------------------------------------ -GCC_TARGET := riscv-none-elf -GCC_PREFIX := riscv-none-elf +GCC_TARGET := riscv32-esp-elf +GCC_PREFIX := riscv32-esp-elf -GCC_VERSION := 15.2.0 +GCC_VERSION := 14.2.0 TGT_SUFFIX = elf diff --git a/ref_app/target/micros/riscvfe310/make/riscvfe310_flags.gmk b/ref_app/target/micros/riscvfe310/make/riscvfe310_flags.gmk index bf223c937..989dff60e 100644 --- a/ref_app/target/micros/riscvfe310/make/riscvfe310_flags.gmk +++ b/ref_app/target/micros/riscvfe310/make/riscvfe310_flags.gmk @@ -1,4 +1,4 @@ -# Copyright Christopher Kormanyos 2022 - 2025. +# Copyright Christopher Kormanyos 2022 - 2026. # Distributed under the Boost Software License, # Version 1.0. (See accompanying file LICENSE_1_0.txt # or copy at http://www.boost.org/LICENSE_1_0.txt) @@ -8,10 +8,10 @@ # compiler flags for the target architecture # ------------------------------------------------------------------------------ -GCC_TARGET := riscv-none-elf -GCC_PREFIX := riscv-none-elf +GCC_TARGET := riscv32-esp-elf +GCC_PREFIX := riscv32-esp-elf -GCC_VERSION := 15.2.0 +GCC_VERSION := 14.2.0 TGT_SUFFIX = elf diff --git a/ref_app/target/micros/wch_ch32v307/make/wch_ch32v307_flags.gmk b/ref_app/target/micros/wch_ch32v307/make/wch_ch32v307_flags.gmk index daa9a8f93..f66fa5526 100644 --- a/ref_app/target/micros/wch_ch32v307/make/wch_ch32v307_flags.gmk +++ b/ref_app/target/micros/wch_ch32v307/make/wch_ch32v307_flags.gmk @@ -1,4 +1,4 @@ -# Copyright Christopher Kormanyos 2022 - 2025. +# Copyright Christopher Kormanyos 2022 - 2026. # Distributed under the Boost Software License, # Version 1.0. (See accompanying file LICENSE_1_0.txt # or copy at http://www.boost.org/LICENSE_1_0.txt) @@ -8,10 +8,10 @@ # compiler flags for the target architecture # ------------------------------------------------------------------------------ -GCC_TARGET := riscv-none-elf -GCC_PREFIX := riscv-none-elf +GCC_TARGET := riscv32-esp-elf +GCC_PREFIX := riscv32-esp-elf -GCC_VERSION := 15.2.0 +GCC_VERSION := 14.2.0 TGT_SUFFIX = elf diff --git a/ref_app/target/micros/xtensa_esp32_p4/make/xtensa_esp32_p4.ld b/ref_app/target/micros/xtensa_esp32_p4/make/xtensa_esp32_p4.ld new file mode 100644 index 000000000..df26f371d --- /dev/null +++ b/ref_app/target/micros/xtensa_esp32_p4/make/xtensa_esp32_p4.ld @@ -0,0 +1,194 @@ +/****************************************************************************************** + Filename : Memory_Map.ld + + Core : RISC-V + + MCU : ESP32-P4 + + Author : Chalandi Amine + + Owner : Chalandi Amine + + Date : 25.01.2026 + + Description : Linker descriptor file + +******************************************************************************************/ + +/****************************************************************************************** + ELF Entrypoint +******************************************************************************************/ +ENTRY(_start) + +/****************************************************************************************** + Link librariess +******************************************************************************************/ +/* INPUT(libc.a libm.a libgcc.a) */ + +/****************************************************************************************** + Globals +******************************************************************************************/ +__STACK_SIZE_CORE0 = 1K; +__STACK_SIZE_CORE1 = 1K; + +/****************************************************************************************** + Memory configuration +******************************************************************************************/ + +MEMORY +{ + HP_TCM(rwx) : ORIGIN = 0x20000000, LENGTH = 8k + FLASH(rx) : ORIGIN = 0x40005000, LENGTH = 31M + LP_FLASH(rx) : ORIGIN = 0x41F00000, LENGTH = 1M + RAM(rwx) : ORIGIN = 0x48000000, LENGTH = 31M + HP_L2MEM(rwx) : ORIGIN = 0x4FF00000, LENGTH = 768K + LP_SRAM(rwx) : ORIGIN = 0x50108000, LENGTH = 32K +} + +/****************************************************************************************** + Sections definition +******************************************************************************************/ +SECTIONS +{ + /* Program code (text) */ + .text : ALIGN(4) + { + PROVIDE(__CODE_BASE_ADDRESS = .); + . = ALIGN(4); + *(.boot) + . = ALIGN(4); + *(.progmem*) + . = ALIGN(4); + *(.text) + . = ALIGN(4); + *(.text*) + . = ALIGN(4); + *(.glue_7) + . = ALIGN(4); + *(.glue_7t) + . = ALIGN(4); + . = ALIGN(4); + } > FLASH + + /* Read-only data (.rodata) */ + .rodata : ALIGN(4) + { + PROVIDE(__RODATA_BASE_ADDRESS = .); + . = ALIGN(4); + *(.rodata) + . = ALIGN(4); + *(.rodata*) + . = ALIGN(4); + *(.srodata) + . = ALIGN(4); + *(.srodata*) + } > FLASH + + /* Section for constructors */ + .ctors : ALIGN(4) + { + PROVIDE(__CTOR_LIST__ = .); + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + LONG(-1) ; + PROVIDE(__CTOR_END__ = .); + . = ALIGN(4); + } > FLASH + + + /* Section for destructors */ + .dtors : ALIGN(4) + { + PROVIDE(__DTOR_LIST__ = .); + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array)) + LONG(-1) ; + PROVIDE(__DTOR_END__ = .); + . = ALIGN(4); + } > FLASH + + /* Runtime clear table */ + .clear_sec : ALIGN(4) + { + PROVIDE(__RUNTIME_CLEAR_TABLE = .) ; + LONG(0 + ADDR(.bss)); LONG(SIZEOF(.bss)); + LONG(-1); LONG(-1); + . = ALIGN(4); + } > FLASH + + /* Runtime copy table */ + .copy_sec : ALIGN(4) + { + PROVIDE(__RUNTIME_COPY_TABLE = .) ; + LONG(LOADADDR(.data)); LONG(0 + ADDR(.data)); LONG(SIZEOF(.data)); + LONG(-1); LONG(-1); LONG(-1); + . = ALIGN(4); + PROVIDE(__CODE_END_ADDRESS = .); + } > FLASH + + .riscv.extab : + { + . = ALIGN(4); + *(.riscv.extab) + *(.gnu.linkonce.riscvextab.*) + . = ALIGN(4); + } > FLASH + + .exidx : + { + . = ALIGN(4); + PROVIDE(__exidx_start = .); + *(.riscv.exidx*) + . = ALIGN(4); + PROVIDE(__exidx_end = .); + } > FLASH + + .riscv.attributes : ALIGN(4) + { + *(.riscv.attributes) + . = ALIGN(4); + } > FLASH + + /* The ROM-to-RAM initialized data sections */ + .data : ALIGN(4) + { + *(.data) + *(.data*) + . = ALIGN(4); + } > RAM AT>FLASH + + /* The uninitialized (zero-cleared) data sections */ + .bss : ALIGN(4) + { + *(.bss) + *(.bss*) + . = ALIGN(4); + } > RAM + + PROVIDE(end = .); + PROVIDE(_fini = .); + + /* stack definition */ + .stack_core0 : + { + PROVIDE(__CORE0_STACK_BOTTOM = .) ; + . = ALIGN(MAX(__STACK_SIZE_CORE0 , .), 8); + PROVIDE(__CORE0_STACK_TOP = .) ; + } > RAM + + .stack_core1 : + { + PROVIDE(__CORE1_STACK_BOTTOM = .) ; + . = ALIGN(MAX(__STACK_SIZE_CORE1 , .), 8); + PROVIDE(__CORE1_STACK_TOP = .) ; + } > RAM + + __ULP_CODE_BASE = 0x40008000; + + /* ROM APIs */ + printf = 0x4fc00024; +} diff --git a/ref_app/target/micros/xtensa_esp32_p4/make/xtensa_esp32_p4_files.gmk b/ref_app/target/micros/xtensa_esp32_p4/make/xtensa_esp32_p4_files.gmk new file mode 100644 index 000000000..d32bfc510 --- /dev/null +++ b/ref_app/target/micros/xtensa_esp32_p4/make/xtensa_esp32_p4_files.gmk @@ -0,0 +1,18 @@ +# +# Copyright Christopher Kormanyos 2025 - 2026. +# Distributed under the Boost Software License, +# Version 1.0. (See accompanying file LICENSE_1_0.txt +# or copy at http://www.boost.org/LICENSE_1_0.txt) +# + +# ------------------------------------------------------------------------------ +# File list of the target-specific files in the project +# ------------------------------------------------------------------------------ + +FILES_TGT := $(PATH_APP)/mcal/mcal_gcc_cxx_completion \ + $(PATH_TGT)/startup/Code/Appli/main \ + $(PATH_TGT)/startup/Code/Appli/main_cores \ + $(PATH_TGT)/startup/Code/Mcal/gpio \ + $(PATH_TGT)/startup/Code/Startup/boot \ + $(PATH_TGT)/startup/Code/Startup/intvect \ + $(PATH_TGT)/startup/Code/Startup/Startup diff --git a/ref_app/target/micros/xtensa_esp32_p4/make/xtensa_esp32_p4_flags.gmk b/ref_app/target/micros/xtensa_esp32_p4/make/xtensa_esp32_p4_flags.gmk new file mode 100644 index 000000000..3d828a72a --- /dev/null +++ b/ref_app/target/micros/xtensa_esp32_p4/make/xtensa_esp32_p4_flags.gmk @@ -0,0 +1,100 @@ +# +# Copyright Christopher Kormanyos 2026. +# Distributed under the Boost Software License, +# Version 1.0. (See accompanying file LICENSE_1_0.txt +# or copy at http://www.boost.org/LICENSE_1_0.txt) +# + +# ------------------------------------------------------------------------------ +# compiler flags for the target architecture +# ------------------------------------------------------------------------------ + +GCC_VERSION = 14.2.0 +GCC_TARGET = riscv32-esp-elf +GCC_PREFIX = riscv32-esp-elf + +TGT_SUFFIX = elf + +WARN_FLAGS := + +TGT_ALLFLAGS = -O2 \ + -march=rv32imafc_zicsr_zifencei_xesppie \ + -mabi=ilp32f \ + -msmall-data-limit=0 \ + -falign-functions=4 \ + -fomit-frame-pointer \ + -fno-reorder-blocks-and-partition \ + -fno-reorder-functions \ + -DHP_CORES_SMP_MODE + +TGT_CFLAGS = -std=c11 \ + $(TGT_ALLFLAGS) + +TGT_CXXFLAGS = -std=c++23 \ + $(TGT_ALLFLAGS) + +TGT_INCLUDES = -I$(PATH_TGT)/startup/Code \ + -I$(PATH_TGT)/startup/Code/Appli \ + -I$(PATH_TGT)/startup/Code/Mcal \ + -I$(PATH_TGT)/startup/Code/Startup + + +TGT_AFLAGS = + +TGT_LDFLAGS = -nostdlib \ + -nostartfiles \ + -Wl,--no-warn-rwx-segments \ + -Wl,-z,max-page-size=4096 \ + -Wl,-Map,$(APP).map \ + -T $(LINKER_DEFINITION_FILE) \ + --specs=nano.specs \ + --specs=nosys.specs + + +# ------------------------------------------------------------------------------ +# Rule to assemble source file (*.S) to object file (*.o). +# ------------------------------------------------------------------------------ + +ifeq ($(TYP_OS),WIN) +TGT_GCC := $(PATH_TOOLS_CC)/$(GCC_PREFIX)-gcc.exe +TGT_GCC := $(subst /,\,$(TGT_GCC)) +else +TGT_GCC := $(GCC_PREFIX)-gcc +endif + + +# ------------------------------------------------------------------------------ +# Image file and flash batch file. +# ------------------------------------------------------------------------------ + +RULE_SPECIAL_MAKE_IMAGE_FILE := + +ifeq ($(TYP_OS),WIN) + +ESP32S3_ESP_TOOL_DIR := $(PATH_TOOLS)/espressif/esptool-v4.11.0-windows-amd64 + +ESP32S3_ESP_TOOL_FLAGS_PROG := --chip esp32p4 \ + -p COM5 -b 460800 \ + --before=default_reset \ + --after=hard_reset write_flash \ + --flash_mode dio \ + --flash_freq 80m \ + --flash_size 32MB \ + 0x2000 $(CURDIR)/$(PATH_TGT)/startup/Code/SBL/Output/SBL.bin \ + 0x5000 $(CURDIR)/$(basename $(APP).$(TGT_SUFFIX)).bin + + +OBJCOPY := $(subst /,\,$(PATH_TOOLS_CC)/$(GCC_PREFIX)-objcopy.exe) + + +RULE_SPECIAL_MAKE_IMAGE_FILE := $(OBJCOPY) $(APP).$(TGT_SUFFIX) -O binary $(APP).bin + + +ESP32S3_ESP_TOOL_CMD_COPY_PART2 := copy /Y $(subst /,\\,$(ESP32S3_ESP_TOOL_DIR)\*.*) $(subst /,\,$(CURDIR)/bin) > 2 > NUL +ESP32S3_ESP_TOOL_CMD_ECHO := $(ECHO) esptool.exe $(subst /,\\,$(ESP32S3_ESP_TOOL_FLAGS_PROG)) > $(subst /,\,$(CURDIR)/bin/flash.bat) + + +RULE_SPECIAL_MAKE_FLASH_BATCH := $(ESP32S3_ESP_TOOL_CMD_COPY_PART2) \ + && $(ESP32S3_ESP_TOOL_CMD_ECHO) + +endif diff --git a/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Appli/main.c b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Appli/main.c new file mode 100644 index 000000000..6c7036b84 --- /dev/null +++ b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Appli/main.c @@ -0,0 +1,59 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2026. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +// Originally from: + +/****************************************************************************************** + Filename : main.c + + Core : RISC-V + + MCU : ESP32-P4 + + Author : Chalandi Amine + + Owner : Chalandi Amine + + Date : 25.01.2026 + + Description : Application main function + +******************************************************************************************/ + +#include +#include + +extern uint32_t osGetActiveCore(void); + +extern void main_core0(void); +extern void main_core1(void); + +void main_x(void) __attribute__((used,noinline)); + +void main_x(void) +{ + const bool core_id_is_zero = ((uint32_t) UINT8_C(0) == osGetActiveCore()); + + // Go to the core-specific main subroutines. + if(core_id_is_zero) + { + main_core0(); + } + else + { + main_core1(); + } +} + +int main(void) __attribute__((used,noinline)); + +void main_caller(); + +void main_caller() +{ + (void) main(); +} diff --git a/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Appli/main_cores.cpp b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Appli/main_cores.cpp new file mode 100644 index 000000000..084834b1e --- /dev/null +++ b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Appli/main_cores.cpp @@ -0,0 +1,82 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2026. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +#include +#include +#include +#include +#include + +#include + +extern "C" +{ + extern auto osGetActiveCore(void) -> std::uint32_t; + + auto main_core0() -> void; + auto main_core1() -> void; + auto main_caller() -> void; +} + +auto main(void) -> int __attribute__((used,noinline)); + +namespace local +{ + struct timer_core1_backend + { + using tick_type = std::uint64_t; + + static auto get_now() -> tick_type { return static_cast(mcal::gpt::secure::get_time_elapsed_core1()); } + }; + + using timer_type = util::timer; + + constexpr typename timer_type::tick_type + led_timeout + { + static_cast(timer_type::seconds(UINT8_C(1))) + }; + + using timer_core1_type = util::timer; +} // namespace local + +extern "C" +auto main_core0() -> void +{ + mcal::wdg::init(nullptr); + mcal::osc::init(nullptr); + + mcal::port::init(nullptr); + + ::main_caller(); +} + +extern "C" +auto main_core1() -> void +{ + mcal::wdg::init(nullptr); + mcal::osc::init(nullptr); + + mcal::gpt::init(nullptr); + + local::timer_core1_type local_led_timer(local::led_timeout); + + auto& my_led1_ref { mcal::led::led1() }; + + my_led1_ref.toggle(); + + // Endless LED1 togglee-loop: Never return or break. + for(;;) + { + if(local_led_timer.timeout()) + { + my_led1_ref.toggle(); + + local_led_timer.start_interval(local::led_timeout); + } + } +} diff --git a/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Mcal/gpio.c b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Mcal/gpio.c new file mode 100644 index 000000000..56076fd3c --- /dev/null +++ b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Mcal/gpio.c @@ -0,0 +1,177 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2026. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +// Originally from: + +/****************************************************************************************** + Filename : gpio.c + + Core : RISC-V + + MCU : ESP32-P4 + + Author : Chalandi Amine + + Owner : Chalandi Amine + + Date : 25.01.2026 + + Description : GPIO driver implementation + +******************************************************************************************/ + +#include + +#include + +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +#define GPIO_BASE 0x500E0000UL +#define LP_IO_MUX_BASE 0x5012B000UL +#define IO_MUX_BASE 0x500E1000UL + +typedef union +{ + volatile uint32_t reg; + + struct + { + volatile uint32_t MCU_OE : 1; + volatile uint32_t SLP_SEL : 1; + volatile uint32_t MCU_WPD : 1; + volatile uint32_t MCU_WPU : 1; + volatile uint32_t MCU_IE : 1; + volatile uint32_t MCU_DRV : 2; + volatile uint32_t FUN_WPD : 1; + volatile uint32_t FUN_WPU : 1; + volatile uint32_t FUN_IE : 1; + volatile uint32_t FUN_DRV : 2; + volatile uint32_t MCU_SEL : 3; + volatile uint32_t FILTER_EN : 1; + uint32_t : 16; + } + bit; +} +IO_MUX_GPIO; + +typedef union +{ + __IOM uint32_t reg; + + struct + { + __IOM uint32_t OUT_SEL : 9; + __IOM uint32_t INV_SEL : 1; + __IOM uint32_t OEN_SEL : 1; + __IOM uint32_t OEN_INV_SEL : 1; + uint32_t : 20; + } + bit; +} +GPIO_FUNC_OUT_SEL_CFG; + +typedef union +{ + __IOM uint32_t reg; + + struct + { + __IOM uint32_t REG_PAD_DRV : 2; + __IOM uint32_t REG_PAD_RDE : 1; + __IOM uint32_t REG_PAD_RUE : 1; + __IOM uint32_t REG_PAD_MUX_SEL : 1; + __IOM uint32_t REG_PAD_FUN_SEL : 2; + __IOM uint32_t REG_PAD_SLP_SEL : 1; + __IOM uint32_t REG_PAD_SLP_IE : 1; + __IOM uint32_t REG_PAD_SLP_OE : 1; + __IOM uint32_t REG_PAD_FUN_IE : 1; + __IOM uint32_t REG_PAD_FILTER_EN : 1; + uint32_t : 20; + } + bit; +} +LP_IO_MUX_GPIO; + +//----------------------------------------------------------------------------------------- +/// \brief +/// +/// \param +/// +/// \return +//----------------------------------------------------------------------------------------- +void gpio_cfg_output(uint8_t pin) +{ + if((unsigned) pin > 54u) + { + return; + } + + volatile IO_MUX_GPIO* pIO_MUX_GPIO = (volatile IO_MUX_GPIO*)(IO_MUX_BASE + 4u + 4u * (unsigned) pin); + volatile GPIO_FUNC_OUT_SEL_CFG* pGPIO_FUNC_OUT_SEL_CFG = (volatile GPIO_FUNC_OUT_SEL_CFG*)(GPIO_BASE + 0x558ul + 4u * (unsigned) pin); + volatile LP_IO_MUX_GPIO* pLP_IO_MUX_GPIO = (volatile LP_IO_MUX_GPIO*)(LP_IO_MUX_BASE + 8u + 4u * (unsigned) pin); + volatile uint32_t* pGPIO_OUTx_W1TC = (volatile uint32_t*)(GPIO_BASE + (((unsigned) pin < 32u) ? 0x0Cu : 0x18u)); + volatile uint32_t* pGPIO_ENABLE1x_W1TS = (volatile uint32_t*)(GPIO_BASE + (((unsigned) pin < 32u) ? 0x24u : 0x30u)); + + /* configure the pinmux */ + pIO_MUX_GPIO->bit.FUN_DRV = 2; + pIO_MUX_GPIO->bit.FUN_IE = 0; + pIO_MUX_GPIO->bit.MCU_SEL = 1; + + /* set the output configuration */ + pGPIO_FUNC_OUT_SEL_CFG->bit.OUT_SEL = 256; + pGPIO_FUNC_OUT_SEL_CFG->bit.OEN_SEL = 1; + + if(pin < 16) + { + /* make LP_GPIO use HP_IO_MUX */ + pLP_IO_MUX_GPIO->bit.REG_PAD_MUX_SEL = 0; + } + + /* drive the IO output low */ + *pGPIO_OUTx_W1TC = (uint32_t)(1u << (((unsigned) pin < 32u) ? (unsigned) pin : ((unsigned) pin - 32u))); + *pGPIO_ENABLE1x_W1TS = (uint32_t)(1u << (((unsigned) pin < 32u) ? (unsigned) pin : ((unsigned) pin - 32u))); +} + +//----------------------------------------------------------------------------------------- +/// \brief +/// +/// \param +/// +/// \return +//----------------------------------------------------------------------------------------- +void gpio_set_output_level(uint8_t pin, uint8_t level) +{ + volatile uint32_t* pGPIO_OUT_W1Tx = (volatile uint32_t*)(GPIO_BASE + (((unsigned) pin < 32u) ? 8u : 0x14u) + (((unsigned) level == 1u) ? (0u) : (4u))); + + if(((unsigned) pin > 54u) || ((unsigned) level > 1u)) + { + return; + } + + *pGPIO_OUT_W1Tx = (uint32_t)(1u << (((unsigned) pin < 32u) ? (unsigned) pin : ((unsigned) pin - 32u))); +} + +//----------------------------------------------------------------------------------------- +/// \brief +/// +/// \param +/// +/// \return +//----------------------------------------------------------------------------------------- +void gpio_toggle_output_level(uint8_t pin) +{ + volatile uint32_t* pGPIO_OUT = (volatile uint32_t*)(GPIO_BASE + 4u + (((unsigned) pin < 32u) ? 0u : 0xCu)); + + if((unsigned) pin > 54u) + { + return; + } + + *pGPIO_OUT ^= (uint32_t)(1u << (((unsigned) pin < 32u) ? (unsigned) pin : ((unsigned) pin - 32u))); +} diff --git a/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Mcal/gpio.h b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Mcal/gpio.h new file mode 100644 index 000000000..34a6d0343 --- /dev/null +++ b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Mcal/gpio.h @@ -0,0 +1,48 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2026. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +// Originally from: + +/****************************************************************************************** + Filename : gpio.h + + Core : RISC-V + + MCU : ESP32-P4 + + Author : Chalandi Amine + + Owner : Chalandi Amine + + Date : 25.01.2026 + + Description : GPIO driver header file + +******************************************************************************************/ +#ifndef __GPIO_H__ +#define __GPIO_H__ +//----------------------------------------------------------------------------------------- +// Includes +//----------------------------------------------------------------------------------------- + +#include +#include + +#if defined(__cplusplus) +extern "C" +{ +#endif + +void gpio_cfg_output(uint8_t pin); +void gpio_set_output_level(uint8_t pin, uint8_t level); +void gpio_toggle_output_level(uint8_t pin); + +#if defined(__cplusplus) +} +#endif + +#endif /*__GPIO_H__*/ diff --git a/ref_app/target/micros/xtensa_esp32_p4/startup/Code/SBL/Output/SBL.bin b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/SBL/Output/SBL.bin new file mode 100644 index 000000000..48c5e3ee4 Binary files /dev/null and b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/SBL/Output/SBL.bin differ diff --git a/ref_app/target/micros/xtensa_esp32_p4/startup/Code/SBL/Output/SBL.elf b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/SBL/Output/SBL.elf new file mode 100644 index 000000000..a2c9609dc Binary files /dev/null and b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/SBL/Output/SBL.elf differ diff --git a/ref_app/target/micros/xtensa_esp32_p4/startup/Code/SBL/Output/SBL.hex b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/SBL/Output/SBL.hex new file mode 100644 index 000000000..339c60727 --- /dev/null +++ b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/SBL/Output/SBL.hex @@ -0,0 +1,274 @@ +:020000043010BA +:10000000732540F139EDB7570E50938707063758DF +:100010000E501308C803054588C32320A8003701E4 +:10002000FA4FEF00E028EF00A022EF00C02CEF0015 +:10003000A00A1705000013050503B70711509387A1 +:10004000471688C3B7670E50D1078843136505016B +:1000500088C3B7670E509387070C88431375F5EF75 +:1000600088C39757F00F9387E7F9828701A00000B4 +:10007000505352414D2063686970206973206E6F40 +:100080007420636F6E6E65637465640A0D00000012 +:10009000505352414D20494420726561642065727D +:1000A000726F723A203078253038782C2066616C77 +:1000B0006C6261636B20746F207573652064656684 +:1000C00061756C74206472697665722070617474F5 +:1000D00065726E0A0D000000B7C608503687130718 +:1000E000C737938606388147130600409CC22320F9 +:1000F00007008507E39CC7FE37C60850B286938683 +:10010000C637130606388147056593050020139707 +:10011000070141831CC2498F850798C2E399B7FE46 +:10012000B7E6085036871307C737938606388147E6 +:10013000130600409CC2232007008507E39CC7FEEE +:10014000B7E50850AE86056693850538130606C0E8 +:100150009386C63781471305002013970701418313 +:100160009CC1518F850798C2E399A7FE8280000049 +:1001700037870040B70711501307070098D7B757C4 +:10018000115003A74718B706002037060040558FC7 +:1001900023A2E71883A647183707008037054000D9 +:1001A000D18E23A2D71883A6871837061250B71509 +:1001B0001150D98E23A4D71883A6C718F98EC98EDB +:1001C00023A6D7181446D98E14C69441CD9A94C14B +:1001D0001442D98E14C283A6C719558F23AEE718CF +:1001E00003A747189316B700E3DC06FE03A74718DA +:1001F000B70600E0FD16758F23A2E7188280000085 +:10020000411122C437E41B4306C6130434E89700A7 +:10021000B01FE780E034B335850237151030130581 +:10022000850BC9819700B01FE78000E09700B01FE1 +:10023000E7804033B33585022244B2403715103091 +:100240001305050D4101C9811703B01F6700C3DD08 +:10025000411106C622C4371711503C4337E41B43F3 +:10026000130434E8F19B93E717003CC39700B01FD9 +:10027000E780002FB3358502371510301305850B45 +:10028000C9819700B01FE78020DA9700B01FE78090 +:10029000602DB33585022244B24037151030130566 +:1002A000050D4101C9811703B01F6700E3D70000A6 +:1002B0003747D850B7671150130717AA98CF23A014 +:1002C000070023AC070098D3D04FB7050040B726EE +:1002D0000C504D8ED0CF23A00702F8D223A40604E1 +:1002E00023A20606B7370C50F8D323A4070423A291 +:1002F000070682800000411106C622C40008B757D5 +:1003000011503707005F23AAE71CB7571150370772 +:1003100020401307070823A8E71CB757115003A76D +:10032000071D1367071023A8E71CB757115083A6B2 +:10033000C71537070001558F23AEE714B7171150C3 +:10034000B44337070010558FB8C3B7670E50945B9E +:1003500075777D17F98E0567558F98DBB7170E50A7 +:100360009387C721944375777D17F98E0967558F59 +:1003700098C3B7170E509387C721D44375777D175D +:10038000F98E0967558FD8C3B7170E509387C721C9 +:10039000944775777D17F98E0967558F98C7B717FA +:1003A0000E509387C721D44775777D17F98E09675B +:1003B000558FD8C7B7170E509387C721944B7577C1 +:1003C0007D17F98E0967558F98CBB7170E50938715 +:1003D000C721D44B75777D17F98E0967558FD8CB18 +:1003E000B7170E509387C721944F75777D17F98EF5 +:1003F0000967558F98CFB7170E509387C721D44FF1 +:1004000075777D17F98E0967558FD8CFB7170E50BE +:100410009387C721945321777D17F98E4167558FB4 +:1004200098D3B7170E509387C721D45375777D178C +:10043000F98E0967558FD8D3B7170E509387C72108 +:10044000945775777D17F98E0967558F98D7B71729 +:100450000E509387C721D45775777D17F98E09679A +:10046000558FD8D7B7170E509387C721945B7577F0 +:100470007D17F98E0967558F98DBB7170E50938754 +:10048000C721D45B75777D17F98E0967558FD8DB47 +:10049000B7170E509387C721945F75777D17F98E34 +:1004A0000967558F98DFB7170E509387C721D45F20 +:1004B00075777D17F98E0967558FD8DFB7170E50FE +:1004C0009387C721B44375777D17F98E0967558FD8 +:1004D000B8C3B7170E509387C721F44375777D17BC +:1004E000F98E0967558FF8C3B7170E509387C72148 +:1004F000B44775777D17F98E0967558FB8C7B71759 +:100500000E509387C721F44721777D17F98E4167F5 +:10051000558FF8C7B7170E509387C72198531367A5 +:10052000170098D3B7170E509387C721F847136762 +:100530001700F8C7B7E708509387070003A7071A03 +:100540001367170023A0E71AB7E70850938707003F +:1005500003A7071A137737F81367C70023A0E71A12 +:10056000B7E708509387070003A7071A1367270008 +:1005700023A0E71AB7E708509387070083A6071A56 +:100580007D771307F707758F1367071823A0E71AFE +:10059000B7E708509387070083A6071A370700823A +:1005A0007D17F98E37070004558F23A0E71AB7E7A8 +:1005B00008509387070083A6071A37070080558FD6 +:1005C00023A0E71AB7E708509387070083A64717C9 +:1005D00037070C00558F23AAE716B7E70850938713 +:1005E000070041670507B8CBB7F7085093870700A6 +:1005F00041670507D8CBB7E708509387070003A7E3 +:1006000007191367070223A8E718B7E7085093876D +:10061000070003A707181367070223A0E718B717F7 +:1006200010309387870E03C70700136707022380E4 +:10063000E700B71710309387870E03C707000D9B9D +:10064000136707012380E700B71710309387870EE1 +:1006500003C70700719B2380E700B717103093870B +:10066000870E03C747007D8B136707022382E700CD +:10067000B71710309387870E03C7570013673700EB +:10068000A382E700B71710309387870E03C7570080 +:100690006D9BA382E700B71710309387870E03C7BF +:1006A000570013678700A382E700B71710309387BE +:1006B000870E03C7570013670704A382E700B71725 +:1006C00010309385870E0D4585230D45EF00100BE7 +:1006D000AA8799CBB7071030138507079700B01F7B +:1006E000E7808094FD5741A8B71710309385870E97 +:1006F0000D45EF00D010B71710309387870E83C7D2 +:100700001700FD8B13F7F70FB5476300F704B71712 +:1007100010309387870E83C71700FD8B13F7F70FF1 +:10072000E9476304F702B71710309387870E9C439D +:10073000A183FD8B93F7F70FBE85B70710301385A4 +:1007400007099700B01FE780208E1D28B7E70850E3 +:100750009387070003A7870D1367270023ACE70CD7 +:10076000B7F708509387070003A7470D13672700C3 +:1007700023AAE70C81473E85B24022444101828092 +:10078000717122D7001989472326F4F6C147232423 +:10079000F4F6A167938707082322F4F6B7E7085019 +:1007A00093870700B44337071000558FB8C38327DA +:1007B00084F693F7F70FFD1793F7F70FBD8B13F739 +:1007C000F70FB7E70850938707007207F047B7069F +:1007D0000010FD16F18E558FF8C7B7E708509387C4 +:1007E0000700FC472320F4F6832704F6232EF4F4B5 +:1007F000832744F6C207C183231EF4F40327C4F5FC +:10080000B7E7085093870700F8C701008947232EF0 +:10081000F4F6C147232CF4F6232A04F6B7E7085070 +:1008200093870700B84313670702B8C3832784F789 +:1008300093F7F70FFD1793F7F70FBD8B13F7F70F2C +:10084000B7E70850938707007207B047B706001054 +:10085000FD16F18E558FB8C7B7E70850938707008C +:10086000BC472328F4F6832704F7232CF4F48327CA +:1008700044F7C207C183231CF4F4032784F5B7E7C8 +:10088000085093870700B8C7010089472322F4F86E +:10089000930700022320F4F8832704F893F7F70F57 +:1008A000FD1793F7F70F93F7F70313F7F70FB7E772 +:1008B0000850938707001377F7033A07B043B7460A +:1008C000F0FFFD16F18E558FB8C30100894723262E +:1008D000F4F88547A305F4F8B7E7085093870700B5 +:1008E0000347B4F8058BB443F99A558FB8C3010098 +:1008F0008947232AF4F8B1472328F4F8B7E70850CA +:1009000093870700B84313678700B8C3832704F9A8 +:1009100093F7F70FFD1793F7F70F93F7F70313F715 +:10092000F70FB7E70850938707001377F7035A07C5 +:10093000B043B70640F0FD16F18E558FB8C30100E5 +:100940008947232EF4F8E947232CF4F8B7E7085039 +:1009500093870700B84313670701B8C3832784F957 +:1009600093F7F70FFD1793F7F70F93F7F70313F7C5 +:10097000F70FB7E70850938707001377F7031A07B5 +:10098000B043FD769386F603F18E558FB8C3010010 +:1009900089472322F4FA8547A301F4FA032744FA8E +:1009A00089476311F702B7E70850938707000347A9 +:1009B00034FA058B060783A6870DF59A558F23AC6D +:1009C000E70C25A0032744FA8D476310F702B7F719 +:1009D000085093870700034734FA058B060783A660 +:1009E000470DF59A558F23AAE70C01008947232666 +:1009F000F4FA8547A305F4FAB7E708509387070090 +:100A00000347B4FA058B5E07F043B70680FFFD1677 +:100A1000F18E558FF8C301008947232AF4FAA30900 +:100A200004FAB7E7085093870700034734FB058BA8 +:100A30000E0783A6870DDD9A558F23ACE70C0100C6 +:100A40008947232EF4FAA30D04FAB7E708509387D9 +:100A500007000347B4FB058B0A0783A6870DED9AB1 +:100A6000558F23ACE70C010089472322F4FC85470E +:100A7000A301F4FCB7E7085093870700034734FC51 +:100A8000058B83A6870DF99A558F23ACE70C0100DF +:100A900089472326F4FC8547A305F4FCB7E70850F3 +:100AA000938707000347B4FC058B5607B043B7068E +:100AB000E0FFFD16F18E558FB8C3B7E70850938756 +:100AC00007000347B4FC058B5607F043B706E0FF69 +:100AD000FD16F18E558FF8C3B7E7085093870700CE +:100AE0000347B4FC058B5207F043B706F0FFFD1631 +:100AF000F18E558FF8C3B7E7085093870700034777 +:100B0000B4FC058B4E07F043B706F8FFFD16F18ED7 +:100B1000558FF8C3B7E70850938707000347B4FC25 +:100B2000058B4A07F043B706FCFFFD16F18E558F83 +:100B3000F8C301008947232AF4FC8547A309F4FC84 +:100B4000B7E7085093870700034734FD058B6A0712 +:100B5000F043B70600FCFD16F18E558FF8C3B7E7DA +:100B6000085093870700034734FD058B6E07F04359 +:100B7000B70600F8FD16F18E558FF8C301008947BE +:100B8000232EF4FC8547A30DF4FCB7E708509387A8 +:100B900007000347B4FD058BD45FF99A558FD8DF62 +:100BA0008347B4FD93C7170013F7F70FB7E7085053 +:100BB000938707007E07D05FB706008093C6F6FFD5 +:100BC000F18E558FD8DF010089472322F4FE854737 +:100BD000A301F4FEB7E7085093870700034734FEEC +:100BE000058B6A07D047B70600FCFD16F18E558FBE +:100BF000D8C7010089472326F4FE8547A305F4FEE4 +:100C0000B7E70850938707000347B4FE058B6607D4 +:100C1000D047B70600FEFD16F18E558FD8C70100EC +:100C200001003A544D6182805D7186C6A2C480087D +:100C30002326A4FC2324B4FCC1472326F4FE23244A +:100C400004FE930700022322F4FEB1472320F4FEA2 +:100C5000232A04FC231C04FCC147232EF4FC032597 +:100C6000C4FC0326C4FE032744FE832604FE832718 +:100C7000C4FD02C43EC2930744FD3EC08148014802 +:100C8000B687832684FE916593850504052C9147DC +:100C90002324F4FE0325C4FC0326C4FE032744FEDC +:100CA000832604FE8327C4FD02C43EC2930744FD8D +:100CB00091073EC081480148B687832684FE91652E +:100CC00093850504E52A832784FC83C70700958361 +:100CD000858B93F7F70F858B93965700834744FDD9 +:100CE00093F7F7FD3E87B687D98F230AF4FC832755 +:100CF00084FC83C7070089839D8B93F7F70F9D8B37 +:100D000093962700834744FD8D9B3E87B687D98FF6 +:100D1000230AF4FC832784FC83C707008D8B93F799 +:100D2000F70F93F63700834744FDF19B3E87B68764 +:100D3000D98F230AF4FC832784FC83C7470095835B +:100D400093F7F70F93965700834784FDFD8B3E87FB +:100D5000B687D98F230CF4FC232404FE0325C4FC9E +:100D60000326C4FE032744FE930744FD02C402C2C7 +:100D700002C0C1483E888147832684FEB1659385C1 +:100D8000050C2D2A91472324F4FE0325C4FC0326D9 +:100D9000C4FE032744FE930744FD910702C402C228 +:100DA00002C0C1483E888147832684FEB165938591 +:100DB000050C2922A1472324F4FEA147232EF4FC8D +:100DC0000325C4FC0326C4FE032744FE832604FE39 +:100DD0008327C4FD02C43EC2930744FD95073EC06D +:100DE00081480148B687832684FE91659385050472 +:100DF000F120832784FC83C757008983858B93F771 +:100E0000F70F858B93962700834794FDED9B3E87D4 +:100E1000B687D98FA30CF4FC832784FC83C75700C3 +:100E20008D8B93F7F70F93F63700834794FDF19B73 +:100E30003E87B687D98FA30CF4FC832784FC83C735 +:100E400057008D83858B93F7F70F858B939637002B +:100E5000834794FDDD9B3E87B687D98FA30CF4FCB6 +:100E6000832784FC83C757009983858B93F7F70FFB +:100E7000858B93966700834794FD93F7F7FB3E8736 +:100E8000B687D98FA30CF4FC0325C4FC0326C4FE4B +:100E9000032744FE930744FD950702C402C202C023 +:100EA000C1483E888147832684FEB1659385050C41 +:100EB00031200100B6402644616182805D7186C6A2 +:100EC000A2C480082326A4FC2324B4FC2322C4FC4F +:100ED0002320D4FC232EE4FA232CF4FA232A04FB47 +:100EE000232814FB8327C4FC9D453E8597F0AF1F44 +:100EF000E7804022832784FCC207C1832318F4FCC7 +:100F0000832744FCC207C1832319F4FC930704FC24 +:100F1000232AF4FC8327C4FB232CF4FC832744FB03 +:100F2000232EF4FC832704FB2320F4FE1C40232201 +:100F3000F4FE5C402324F4FE832784FB2326F4FE86 +:100F40008327C4FC130704FDBA853E8597F0AF1FC5 +:100F5000E780C01B0325C4FC5C408D83C207C183AE +:100F60000347840089463E860C4097F0AF1FE78018 +:100F7000201A0100B640264461618280397106DE84 +:100F800022DC8000232EA4FCB7876B5A9387D7C836 +:100F90002326F4FE232404FE0325C4FD9307C4FE88 +:100FA00002C402C202C0930800023E88B147130780 +:100FB000000281464146A165938505080137032556 +:100FC000C4FD02C4930700023EC2930784FE3EC0E4 +:100FD00081480148E947130700028146414681459F +:100FE000F13D032784FE8327C4FE6314F700814785 +:100FF00011A0FD573E85F2506254216182807971C3 +:1010000006D622D400182326A4FE2324B4FE0325EA +:10101000C4FE832784FE02C441473AC23EC08148D1 +:101020000148B14713070002814641469165938507 +:10103000050469350325C4FE832784FE890702C49D +:1010400041473AC23EC081480148B14713070002F8 +:10105000894641469165938505048D350325C4FE77 +:10106000832784FE910702C421473AC23EC08148CB +:101070000148B147130700029146414691659385A7 +:1010800005042D3D0325C4FE832784FE950702C475 +:1010900021473AC23EC081480148B14713070002C8 +:1010A000A1464146916593850504093D0100B25072 +:0610B0002254456182801C +:1010B8005854414C5F46524551203D202575204DDE +:1010C800487A0A0D000000004350555F46524551CA +:0D10D80020203D202575204D487A0A0D008E +:0400000530100000B7 +:00000001FF diff --git a/ref_app/target/micros/xtensa_esp32_p4/startup/Code/SBL/Output/SBL.map b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/SBL/Output/SBL.map new file mode 100644 index 000000000..e90ea9aaf --- /dev/null +++ b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/SBL/Output/SBL.map @@ -0,0 +1,167 @@ +Archive member included to satisfy reference by file (symbol) + +./libpsram.a(psram.o) /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/boot.o (psram_init) + +There are no discarded input sections + +Memory Configuration + +Name Origin Length Attributes +HP_TCM 0x30100000 0x00002000 xrw +*default* 0x00000000 0xffffffff + +Linker script and memory map + +LOAD /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/boot.o +LOAD /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o +LOAD /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o +LOAD /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o +LOAD /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o +LOAD ./libpsram.a + +.text 0x30100000 0x10b6 + *(.boot) + .boot 0x30100000 0x6e /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/boot.o + 0x30100000 _start + *(.rodata) + *fill* 0x3010006e 0x2 + .rodata 0x30100070 0x66 ./libpsram.a(psram.o) + .text 0x301000d6 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/boot.o + *fill* 0x301000d6 0x2 + .text 0x301000d8 0x96 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + 0x301000d8 mmu_init + *fill* 0x3010016e 0x2 + .text 0x30100170 0x8e /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + 0x30100170 ulp_boot + *fill* 0x301001fe 0x2 + .text 0x30100200 0xb0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + 0x30100200 clk_info + 0x30100250 clock_init + .text 0x301002b0 0x46 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + 0x301002b0 wdt_disable_all_wdt + .text 0x301002f6 0xdc0 ./libpsram.a(psram.o) + 0x301002f6 psram_init + 0x40005000 __app_entry_point = 0x40005000 + 0x40008000 __ulp_entry_point = 0x40008000 + 0x5008e000 SPIMEM2 = 0x5008e000 + 0x5008f000 SPIMEM3 = 0x5008f000 + 0x50120000 LPPERI = 0x50120000 + 0x500e6000 HP_SYS_CLKRST = 0x500e6000 + 0x4fc00024 ets_printf = 0x4fc00024 + 0x4fc00110 esp_rom_spi_set_op_mode = 0x4fc00110 + 0x4fc00108 esp_rom_spi_cmd_config = 0x4fc00108 + 0x4fc0010c esp_rom_spi_cmd_start = 0x4fc0010c + 0x4fc0055c ets_clk_get_xtal_freq = 0x4fc0055c + 0x4fc00560 ets_clk_get_cpu_freq = 0x4fc00560 +OUTPUT(/mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/SBL.elf elf32-littleriscv) + +.rodata.str1.4 0x301010b8 0x2d + .rodata.str1.4 + 0x301010b8 0x2d /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + +.rela.dyn 0x301010e8 0x0 + .rela.text 0x301010e8 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + +.data 0x301010e5 0x0 + .data 0x301010e5 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/boot.o + .data 0x301010e5 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + .data 0x301010e5 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .data 0x301010e5 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .data 0x301010e5 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .data 0x301010e5 0x0 ./libpsram.a(psram.o) + +.bss 0x301010e8 0x6 + .bss 0x301010e8 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/boot.o + .bss 0x301010e8 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + .bss 0x301010e8 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .bss 0x301010e8 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .bss 0x301010e8 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .bss 0x301010e8 0x6 ./libpsram.a(psram.o) + +.riscv.attributes + 0x00000000 0x59 + .riscv.attributes + 0x00000000 0x57 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/boot.o + .riscv.attributes + 0x00000057 0x55 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + .riscv.attributes + 0x000000ac 0x55 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .riscv.attributes + 0x00000101 0x55 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .riscv.attributes + 0x00000156 0x55 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .riscv.attributes + 0x000001ab 0x30 ./libpsram.a(psram.o) + +.comment 0x00000000 0x5f + .comment 0x00000000 0x5f /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + 0x30 (size before relaxing) + .comment 0x0000005f 0x30 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .comment 0x0000005f 0x30 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .comment 0x0000005f 0x30 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .comment 0x0000005f 0x31 ./libpsram.a(psram.o) + +.note.GNU-stack + 0x00000000 0x0 + .note.GNU-stack + 0x00000000 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + .note.GNU-stack + 0x00000000 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .note.GNU-stack + 0x00000000 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .note.GNU-stack + 0x00000000 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + +.debug_info 0x00000000 0x16604 + .debug_info 0x00000000 0xff /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + .debug_info 0x000000ff 0x5dd7 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .debug_info 0x00005ed6 0xf17 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .debug_info 0x00006ded 0xe4b /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .debug_info 0x00007c38 0xe9cc ./libpsram.a(psram.o) + +.debug_abbrev 0x00000000 0x799 + .debug_abbrev 0x00000000 0x78 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + .debug_abbrev 0x00000078 0x11b /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .debug_abbrev 0x00000193 0x1a0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .debug_abbrev 0x00000333 0xf7 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .debug_abbrev 0x0000042a 0x36f ./libpsram.a(psram.o) + +.debug_loc 0x00000000 0x86 + .debug_loc 0x00000000 0x86 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + +.debug_aranges 0x00000000 0xa0 + .debug_aranges + 0x00000000 0x20 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + .debug_aranges + 0x00000020 0x20 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .debug_aranges + 0x00000040 0x20 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .debug_aranges + 0x00000060 0x20 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .debug_aranges + 0x00000080 0x20 ./libpsram.a(psram.o) + +.debug_line 0x00000000 0x10ac + .debug_line 0x00000000 0x2e8 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + .debug_line 0x000002e8 0x21f /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .debug_line 0x00000507 0x22f /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .debug_line 0x00000736 0x1d5 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .debug_line 0x0000090b 0x7a1 ./libpsram.a(psram.o) + +.debug_str 0x00000000 0xc770 + .debug_str 0x00000000 0xc770 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + 0x1a9 (size before relaxing) + .debug_str 0x0000c770 0x57db /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .debug_str 0x0000c770 0x1361 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .debug_str 0x0000c770 0x6d8 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .debug_str 0x0000c770 0xc57c ./libpsram.a(psram.o) + +.debug_frame 0x00000000 0x1b0 + .debug_frame 0x00000000 0x20 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + .debug_frame 0x00000020 0x20 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .debug_frame 0x00000040 0x50 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .debug_frame 0x00000090 0x20 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .debug_frame 0x000000b0 0x100 ./libpsram.a(psram.o) + +.debug_ranges 0x00000000 0x30 + .debug_ranges 0x00000000 0x30 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o diff --git a/ref_app/target/micros/xtensa_esp32_p4/startup/Code/SBL/Output/SBL.readelf b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/SBL/Output/SBL.readelf new file mode 100644 index 000000000..efc537232 --- /dev/null +++ b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/SBL/Output/SBL.readelf @@ -0,0 +1,1754 @@ +ELF Header: + Magic: 7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 + Class: ELF32 + Data: 2's complement, little endian + Version: 1 (current) + OS/ABI: UNIX - System V + ABI Version: 0 + Type: EXEC (Executable file) + Machine: RISC-V + Version: 0x1 + Entry point address: 0x30100000 + Start of program headers: 52 (bytes into file) + Start of section headers: 159988 (bytes into file) + Flags: 0x3, RVC, single-float ABI + Size of this header: 52 (bytes) + Size of program headers: 32 (bytes) + Number of program headers: 3 + Size of section headers: 40 (bytes) + Number of section headers: 17 + Section header string table index: 16 + +Section Headers: + [Nr] Name Type Addr Off Size ES Flg Lk Inf Al + [ 0] NULL 00000000 000000 000000 00 0 0 0 + [ 1] .text PROGBITS 30100000 001000 0010b6 00 AX 0 0 4 + [ 2] .rodata.str1.4 PROGBITS 301010b8 0020b8 00002d 01 AMS 0 0 4 + [ 3] .bss NOBITS 301010e8 0020e5 000006 00 WA 0 0 4 + [ 4] .riscv.attributes RISCV_ATTRIBUTES 00000000 0020e5 000059 00 0 0 1 + [ 5] .comment PROGBITS 00000000 00213e 00005f 01 MS 0 0 1 + [ 6] .debug_info PROGBITS 00000000 00219d 016604 00 0 0 1 + [ 7] .debug_abbrev PROGBITS 00000000 0187a1 000799 00 0 0 1 + [ 8] .debug_loc PROGBITS 00000000 018f3a 000086 00 0 0 1 + [ 9] .debug_aranges PROGBITS 00000000 018fc0 0000a0 00 0 0 1 + [10] .debug_line PROGBITS 00000000 019060 0010ac 00 0 0 1 + [11] .debug_str PROGBITS 00000000 01a10c 00c770 01 MS 0 0 1 + [12] .debug_frame PROGBITS 00000000 02687c 0001b0 00 0 0 4 + [13] .debug_ranges PROGBITS 00000000 026a2c 000030 00 0 0 1 + [14] .symtab SYMTAB 00000000 026a5c 000370 10 15 36 4 + [15] .strtab STRTAB 00000000 026dcc 000270 00 0 0 1 + [16] .shstrtab STRTAB 00000000 02703c 0000b6 00 0 0 1 +Key to Flags: + W (write), A (alloc), X (execute), M (merge), S (strings), I (info), + L (link order), O (extra OS processing required), G (group), T (TLS), + C (compressed), x (unknown), o (OS specific), E (exclude), + D (mbind), p (processor specific) +Archive member included to satisfy reference by file (symbol) + +./libpsram.a(psram.o) /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/boot.o (psram_init) + +There are no discarded input sections + +Memory Configuration + +Name Origin Length Attributes +HP_TCM 0x30100000 0x00002000 xrw +*default* 0x00000000 0xffffffff + +Linker script and memory map + +LOAD /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/boot.o +LOAD /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o +LOAD /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o +LOAD /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o +LOAD /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o +LOAD ./libpsram.a + +.text 0x30100000 0x10b6 + *(.boot) + .boot 0x30100000 0x6e /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/boot.o + 0x30100000 _start + *(.rodata) + *fill* 0x3010006e 0x2 + .rodata 0x30100070 0x66 ./libpsram.a(psram.o) + .text 0x301000d6 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/boot.o + *fill* 0x301000d6 0x2 + .text 0x301000d8 0x96 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + 0x301000d8 mmu_init + *fill* 0x3010016e 0x2 + .text 0x30100170 0x8e /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + 0x30100170 ulp_boot + *fill* 0x301001fe 0x2 + .text 0x30100200 0xb0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + 0x30100200 clk_info + 0x30100250 clock_init + .text 0x301002b0 0x46 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + 0x301002b0 wdt_disable_all_wdt + .text 0x301002f6 0xdc0 ./libpsram.a(psram.o) + 0x301002f6 psram_init + 0x40005000 __app_entry_point = 0x40005000 + 0x40008000 __ulp_entry_point = 0x40008000 + 0x5008e000 SPIMEM2 = 0x5008e000 + 0x5008f000 SPIMEM3 = 0x5008f000 + 0x50120000 LPPERI = 0x50120000 + 0x500e6000 HP_SYS_CLKRST = 0x500e6000 + 0x4fc00024 ets_printf = 0x4fc00024 + 0x4fc00110 esp_rom_spi_set_op_mode = 0x4fc00110 + 0x4fc00108 esp_rom_spi_cmd_config = 0x4fc00108 + 0x4fc0010c esp_rom_spi_cmd_start = 0x4fc0010c + 0x4fc0055c ets_clk_get_xtal_freq = 0x4fc0055c + 0x4fc00560 ets_clk_get_cpu_freq = 0x4fc00560 +OUTPUT(/mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/SBL.elf elf32-littleriscv) + +.rodata.str1.4 0x301010b8 0x2d + .rodata.str1.4 + 0x301010b8 0x2d /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + +.rela.dyn 0x301010e8 0x0 + .rela.text 0x301010e8 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + +.data 0x301010e5 0x0 + .data 0x301010e5 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/boot.o + .data 0x301010e5 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + .data 0x301010e5 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .data 0x301010e5 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .data 0x301010e5 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .data 0x301010e5 0x0 ./libpsram.a(psram.o) + +.bss 0x301010e8 0x6 + .bss 0x301010e8 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/boot.o + .bss 0x301010e8 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + .bss 0x301010e8 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .bss 0x301010e8 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .bss 0x301010e8 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .bss 0x301010e8 0x6 ./libpsram.a(psram.o) + +.riscv.attributes + 0x00000000 0x59 + .riscv.attributes + 0x00000000 0x57 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/boot.o + .riscv.attributes + 0x00000057 0x55 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + .riscv.attributes + 0x000000ac 0x55 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .riscv.attributes + 0x00000101 0x55 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .riscv.attributes + 0x00000156 0x55 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .riscv.attributes + 0x000001ab 0x30 ./libpsram.a(psram.o) + +.comment 0x00000000 0x5f + .comment 0x00000000 0x5f /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + 0x30 (size before relaxing) + .comment 0x0000005f 0x30 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .comment 0x0000005f 0x30 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .comment 0x0000005f 0x30 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .comment 0x0000005f 0x31 ./libpsram.a(psram.o) + +.note.GNU-stack + 0x00000000 0x0 + .note.GNU-stack + 0x00000000 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + .note.GNU-stack + 0x00000000 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .note.GNU-stack + 0x00000000 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .note.GNU-stack + 0x00000000 0x0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + +.debug_info 0x00000000 0x16604 + .debug_info 0x00000000 0xff /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + .debug_info 0x000000ff 0x5dd7 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .debug_info 0x00005ed6 0xf17 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .debug_info 0x00006ded 0xe4b /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .debug_info 0x00007c38 0xe9cc ./libpsram.a(psram.o) + +.debug_abbrev 0x00000000 0x799 + .debug_abbrev 0x00000000 0x78 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + .debug_abbrev 0x00000078 0x11b /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .debug_abbrev 0x00000193 0x1a0 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .debug_abbrev 0x00000333 0xf7 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .debug_abbrev 0x0000042a 0x36f ./libpsram.a(psram.o) + +.debug_loc 0x00000000 0x86 + .debug_loc 0x00000000 0x86 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + +.debug_aranges 0x00000000 0xa0 + .debug_aranges + 0x00000000 0x20 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + .debug_aranges + 0x00000020 0x20 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .debug_aranges + 0x00000040 0x20 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .debug_aranges + 0x00000060 0x20 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .debug_aranges + 0x00000080 0x20 ./libpsram.a(psram.o) + +.debug_line 0x00000000 0x10ac + .debug_line 0x00000000 0x2e8 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + .debug_line 0x000002e8 0x21f /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .debug_line 0x00000507 0x22f /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .debug_line 0x00000736 0x1d5 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .debug_line 0x0000090b 0x7a1 ./libpsram.a(psram.o) + +.debug_str 0x00000000 0xc770 + .debug_str 0x00000000 0xc770 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + 0x1a9 (size before relaxing) + .debug_str 0x0000c770 0x57db /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .debug_str 0x0000c770 0x1361 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .debug_str 0x0000c770 0x6d8 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .debug_str 0x0000c770 0xc57c ./libpsram.a(psram.o) + +.debug_frame 0x00000000 0x1b0 + .debug_frame 0x00000000 0x20 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/mmu.o + .debug_frame 0x00000020 0x20 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/ulp.o + .debug_frame 0x00000040 0x50 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + .debug_frame 0x00000090 0x20 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/wdt.o + .debug_frame 0x000000b0 0x100 ./libpsram.a(psram.o) + +.debug_ranges 0x00000000 0x30 + .debug_ranges 0x00000000 0x30 /mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/obj/clock.o + +Symbol table '.symtab' contains 55 entries: + Num: Value Size Type Bind Vis Ndx Name + 0: 00000000 0 NOTYPE LOCAL DEFAULT UND + 1: 30100000 0 SECTION LOCAL DEFAULT 1 .text + 2: 301010b8 0 SECTION LOCAL DEFAULT 2 .rodata.str1.4 + 3: 301010e8 0 SECTION LOCAL DEFAULT 3 .bss + 4: 00000000 0 SECTION LOCAL DEFAULT 4 .riscv.attributes + 5: 00000000 0 SECTION LOCAL DEFAULT 5 .comment + 6: 00000000 0 SECTION LOCAL DEFAULT 6 .debug_info + 7: 00000000 0 SECTION LOCAL DEFAULT 7 .debug_abbrev + 8: 00000000 0 SECTION LOCAL DEFAULT 8 .debug_loc + 9: 00000000 0 SECTION LOCAL DEFAULT 9 .debug_aranges + 10: 00000000 0 SECTION LOCAL DEFAULT 10 .debug_line + 11: 00000000 0 SECTION LOCAL DEFAULT 11 .debug_str + 12: 00000000 0 SECTION LOCAL DEFAULT 12 .debug_frame + 13: 00000000 0 SECTION LOCAL DEFAULT 13 .debug_ranges + 14: 00000000 0 FILE LOCAL DEFAULT ABS boot.o + 15: 50110164 0 NOTYPE LOCAL DEFAULT ABS BOOT_ADDR_HP_CORE1 + 16: 50110028 0 NOTYPE LOCAL DEFAULT ABS BOOT_ADDR_LP_CORE + 17: 500e6014 0 NOTYPE LOCAL DEFAULT ABS SOC_CLK_CTRL0 + 18: 500e60c0 0 NOTYPE LOCAL DEFAULT ABS HP_RST_EN0 + 19: 500e5060 0 NOTYPE LOCAL DEFAULT ABS L2_MEM_RAM_PWR_CTRL0_REG + 20: 500e503c 0 NOTYPE LOCAL DEFAULT ABS SCRATCHPAD_MEM_RAM_PWR_CTRL0_REG + 21: 00000000 0 FILE LOCAL DEFAULT ABS psram.c + 22: 301010e8 6 OBJECT LOCAL DEFAULT 3 mode_reg.0 + 23: 30100c28 660 FUNC LOCAL DEFAULT 1 s_init_psram_mode_reg + 24: 30100f7c 130 FUNC LOCAL DEFAULT 1 s_check_psram_connected + 25: 30100ffe 184 FUNC LOCAL DEFAULT 1 s_get_psram_mode_reg + 26: 30100780 1192 FUNC LOCAL DEFAULT 1 s_config_mspi_for_psram + 27: 30100ebc 192 FUNC LOCAL DEFAULT 1 s_psram_common_transaction + 28: 00000000 0 FILE LOCAL DEFAULT ABS mmu.c + 29: 301000d8 0 NOTYPE LOCAL DEFAULT 1 $xrv32i2p1_m2p0_a2p1_f2p2_c2p0_zicsr2p0_zmmul1p0_zaamo1p0_zalrsc1p0 + 30: 00000000 0 FILE LOCAL DEFAULT ABS ulp.c + 31: 30100170 0 NOTYPE LOCAL DEFAULT 1 $xrv32i2p1_m2p0_a2p1_f2p2_c2p0_zicsr2p0_zmmul1p0_zaamo1p0_zalrsc1p0 + 32: 00000000 0 FILE LOCAL DEFAULT ABS clock.c + 33: 30100200 0 NOTYPE LOCAL DEFAULT 1 $xrv32i2p1_m2p0_a2p1_f2p2_c2p0_zicsr2p0_zmmul1p0_zaamo1p0_zalrsc1p0 + 34: 00000000 0 FILE LOCAL DEFAULT ABS wdt.c + 35: 301002b0 0 NOTYPE LOCAL DEFAULT 1 $xrv32i2p1_m2p0_a2p1_f2p2_c2p0_zicsr2p0_zmmul1p0_zaamo1p0_zalrsc1p0 + 36: 40008000 0 NOTYPE GLOBAL DEFAULT ABS __ulp_entry_point + 37: 5008e000 0 NOTYPE GLOBAL DEFAULT ABS SPIMEM2 + 38: 4fc0010c 0 NOTYPE GLOBAL DEFAULT ABS esp_rom_spi_cmd_start + 39: 4fc00108 0 NOTYPE GLOBAL DEFAULT ABS esp_rom_spi_cmd_config + 40: 50120000 0 NOTYPE GLOBAL DEFAULT ABS LPPERI + 41: 301002f6 1162 FUNC GLOBAL DEFAULT 1 psram_init + 42: 4fc00560 0 NOTYPE GLOBAL DEFAULT ABS ets_clk_get_cpu_freq + 43: 30100200 80 FUNC GLOBAL DEFAULT 1 clk_info + 44: 40005000 0 NOTYPE GLOBAL DEFAULT ABS __app_entry_point + 45: 30100250 94 FUNC GLOBAL DEFAULT 1 clock_init + 46: 4fc0055c 0 NOTYPE GLOBAL DEFAULT ABS ets_clk_get_xtal_freq + 47: 30100000 110 FUNC GLOBAL DEFAULT 1 _start + 48: 4fc00110 0 NOTYPE GLOBAL DEFAULT ABS esp_rom_spi_set_op_mode + 49: 5008f000 0 NOTYPE GLOBAL DEFAULT ABS SPIMEM3 + 50: 30100170 142 FUNC GLOBAL DEFAULT 1 ulp_boot + 51: 301000d8 150 FUNC GLOBAL DEFAULT 1 mmu_init + 52: 4fc00024 0 NOTYPE GLOBAL DEFAULT ABS ets_printf + 53: 301002b0 68 FUNC GLOBAL DEFAULT 1 wdt_disable_all_wdt + 54: 500e6000 0 NOTYPE GLOBAL DEFAULT ABS HP_SYS_CLKRST + +/mnt/c/Users/ckorm/Documents/Ks/uC_Software/Boards/Baremetal_esp32p4_nosdk/Code/SBL/Output/SBL.elf: file format elf32-littleriscv + + +Disassembly of section .text: + +30100000 <_start>: +30100000: f1402573 csrr a0,mhartid +30100004: ,-- ed39 bnez a0,30100062 <_start+0x62> +30100006: | 500e57b7 lui a5,0x500e5 +3010000a: | 06078793 addi a5,a5,96 # 500e5060 +3010000e: | 500e5837 lui a6,0x500e5 +30100012: | 03c80813 addi a6,a6,60 # 500e503c +30100016: | 4505 li a0,1 +30100018: | c388 sw a0,0(a5) +3010001a: | 00a82023 sw a0,0(a6) +3010001e: | 4ffa0137 lui sp,0x4ffa0 +30100022: | 28e000ef jal 301002b0 +30100026: | 22a000ef jal 30100250 +3010002a: | 2cc000ef jal 301002f6 +3010002e: | 0aa000ef jal 301000d8 +30100032: | 00000517 auipc a0,0x0 +30100036: | 03050513 addi a0,a0,48 # 30100062 <_start+0x62> +3010003a: | 501107b7 lui a5,0x50110 +3010003e: | 16478793 addi a5,a5,356 # 50110164 +30100042: | c388 sw a0,0(a5) +30100044: | 500e67b7 lui a5,0x500e6 +30100048: | 07d1 addi a5,a5,20 # 500e6014 +3010004a: | 4388 lw a0,0(a5) +3010004c: | 01056513 ori a0,a0,16 +30100050: | c388 sw a0,0(a5) +30100052: | 500e67b7 lui a5,0x500e6 +30100056: | 0c078793 addi a5,a5,192 # 500e60c0 +3010005a: | 4388 lw a0,0(a5) +3010005c: | eff57513 andi a0,a0,-257 +30100060: | c388 sw a0,0(a5) +30100062: '-> 0ff05797 auipc a5,0xff05 +30100066: f9e78793 addi a5,a5,-98 # 40005000 <__app_entry_point> +3010006a: 8782 jr a5 +3010006c: ,-- a001 j 3010006c <_start+0x6c> +3010006e: 0000 unimp +30100070: 5350 lw a2,36(a4) +30100072: 4152 lw sp,20(sp) +30100074: 204d jal 30100116 +30100076: 70696863 bltu s2,t1,30100786 +3010007a: 6920 flw fs0,80(a0) +3010007c: 6f6e2073 csrs 0x6f6,t3 +30100080: 2074 .insn 2, 0x2074 +30100082: 6e6e6f63 bltu t3,t1,30100780 +30100086: 6365 lui t1,0x19 +30100088: 6574 flw fa3,76(a0) +3010008a: 0a64 addi s1,sp,284 +3010008c: 000d c.nop 3 +3010008e: 0000 unimp +30100090: 5350 lw a2,36(a4) +30100092: 4152 lw sp,20(sp) +30100094: 204d jal 30100136 +30100096: 4449 li s0,18 +30100098: 7220 flw fs0,96(a2) +3010009a: 6165 addi sp,sp,112 +3010009c: 2064 .insn 2, 0x2064 +3010009e: 7265 lui tp,0xffff9 +301000a0: 6f72 flw ft10,28(sp) +301000a2: 3a72 .insn 2, 0x3a72 +301000a4: 3020 .insn 2, 0x3020 +301000a6: 2578 .insn 2, 0x2578 +301000a8: 3830 .insn 2, 0x3830 +301000aa: 2c78 .insn 2, 0x2c78 +301000ac: 6620 flw fs0,72(a2) +301000ae: 6c61 lui s8,0x18 +301000b0: 626c flw fa1,68(a2) +301000b2: 6361 lui t1,0x18 +301000b4: 6f74206b .insn 4, 0x6f74206b +301000b8: 7520 flw fs0,104(a0) +301000ba: 64206573 csrrsi a0,0x642,0 +301000be: 6665 lui a2,0x19 +301000c0: 7561 lui a0,0xffff8 +301000c2: 746c flw fa1,108(s0) +301000c4: 6420 flw fs0,72(s0) +301000c6: 6972 flw fs2,28(sp) +301000c8: 6576 flw fa0,92(sp) +301000ca: 2072 .insn 2, 0x2072 +301000cc: 6170 flw fa2,68(a0) +301000ce: 7474 flw fa3,108(s0) +301000d0: 7265 lui tp,0xffff9 +301000d2: 0a6e slli s4,s4,0x1b +301000d4: 000d c.nop 3 + ... + +301000d8 : +301000d8: 5008c6b7 lui a3,0x5008c +301000dc: 8736 mv a4,a3 +301000de: 37c70713 addi a4,a4,892 +301000e2: 38068693 addi a3,a3,896 # 5008c380 +301000e6: 4781 li a5,0 +301000e8: 40000613 li a2,1024 +301000ec: ,-> c29c sw a5,0(a3) +301000ee: | 00072023 sw zero,0(a4) +301000f2: | 0785 addi a5,a5,1 +301000f4: '-- fec79ce3 bne a5,a2,301000ec +301000f8: 5008c637 lui a2,0x5008c +301000fc: 86b2 mv a3,a2 +301000fe: 37c68693 addi a3,a3,892 +30100102: 38060613 addi a2,a2,896 # 5008c380 +30100106: 4781 li a5,0 +30100108: 6505 lui a0,0x1 +3010010a: 20000593 li a1,512 +3010010e: ,-> 01079713 slli a4,a5,0x10 +30100112: | 8341 srli a4,a4,0x10 +30100114: | c21c sw a5,0(a2) +30100116: | 8f49 or a4,a4,a0 +30100118: | 0785 addi a5,a5,1 +3010011a: | c298 sw a4,0(a3) +3010011c: '-- feb799e3 bne a5,a1,3010010e +30100120: 5008e6b7 lui a3,0x5008e +30100124: 8736 mv a4,a3 +30100126: 37c70713 addi a4,a4,892 +3010012a: 38068693 addi a3,a3,896 # 5008e380 +3010012e: 4781 li a5,0 +30100130: 40000613 li a2,1024 +30100134: ,-> c29c sw a5,0(a3) +30100136: | 00072023 sw zero,0(a4) +3010013a: | 0785 addi a5,a5,1 +3010013c: '-- fec79ce3 bne a5,a2,30100134 +30100140: 5008e5b7 lui a1,0x5008e +30100144: 86ae mv a3,a1 +30100146: 6605 lui a2,0x1 +30100148: 38058593 addi a1,a1,896 # 5008e380 +3010014c: c0060613 addi a2,a2,-1024 # c00 <_start-0x300ff400> +30100150: 37c68693 addi a3,a3,892 +30100154: 4781 li a5,0 +30100156: 20000513 li a0,512 +3010015a: ,-> 01079713 slli a4,a5,0x10 +3010015e: | 8341 srli a4,a4,0x10 +30100160: | c19c sw a5,0(a1) +30100162: | 8f51 or a4,a4,a2 +30100164: | 0785 addi a5,a5,1 +30100166: | c298 sw a4,0(a3) +30100168: '-- fea799e3 bne a5,a0,3010015a +3010016c: 8082 ret + ... + +30100170 : +30100170: 40008737 lui a4,0x40008 +30100174: 501107b7 lui a5,0x50110 +30100178: 00070713 mv a4,a4 +3010017c: d798 sw a4,40(a5) +3010017e: 501157b7 lui a5,0x50115 +30100182: 1847a703 lw a4,388(a5) # 50115184 +30100186: 200006b7 lui a3,0x20000 +3010018a: 40000637 lui a2,0x40000 +3010018e: 8f55 or a4,a4,a3 +30100190: 18e7a223 sw a4,388(a5) +30100194: 1847a683 lw a3,388(a5) +30100198: 80000737 lui a4,0x80000 +3010019c: 00400537 lui a0,0x400 +301001a0: 8ed1 or a3,a3,a2 +301001a2: 18d7a223 sw a3,388(a5) +301001a6: 1887a683 lw a3,392(a5) +301001aa: 50120637 lui a2,0x50120 +301001ae: 501115b7 lui a1,0x50111 +301001b2: 8ed9 or a3,a3,a4 +301001b4: 18d7a423 sw a3,392(a5) +301001b8: 18c7a683 lw a3,396(a5) +301001bc: 8ef9 and a3,a3,a4 +301001be: 8ec9 or a3,a3,a0 +301001c0: 18d7a623 sw a3,396(a5) +301001c4: 4614 lw a3,8(a2) +301001c6: 8ed9 or a3,a3,a4 +301001c8: c614 sw a3,8(a2) +301001ca: 4194 lw a3,0(a1) +301001cc: 9acd andi a3,a3,-13 +301001ce: c194 sw a3,0(a1) +301001d0: 4214 lw a3,0(a2) +301001d2: 8ed9 or a3,a3,a4 +301001d4: c214 sw a3,0(a2) +301001d6: 19c7a683 lw a3,412(a5) +301001da: 8f55 or a4,a4,a3 +301001dc: 18e7ae23 sw a4,412(a5) +301001e0: ,-> 1847a703 lw a4,388(a5) +301001e4: | 00b71693 slli a3,a4,0xb +301001e8: '-- fe06dce3 bgez a3,301001e0 +301001ec: 1847a703 lw a4,388(a5) +301001f0: e00006b7 lui a3,0xe0000 +301001f4: 16fd addi a3,a3,-1 # dfffffff +301001f6: 8f75 and a4,a4,a3 +301001f8: 18e7a223 sw a4,388(a5) +301001fc: 8082 ret + ... + +30100200 : +30100200: 1141 addi sp,sp,-16 +30100202: c422 sw s0,8(sp) +30100204: 431be437 lui s0,0x431be +30100208: c606 sw ra,12(sp) +3010020a: e8340413 addi s0,s0,-381 # 431bde83 <__ulp_entry_point+0x31b5e83> +3010020e: 1fb00097 auipc ra,0x1fb00 +30100212: 34e080e7 jalr 846(ra) # 4fc0055c +30100216: 028535b3 mulhu a1,a0,s0 +3010021a: 30101537 lui a0,0x30101 +3010021e: 0b850513 addi a0,a0,184 # 301010b8 +30100222: 81c9 srli a1,a1,0x12 +30100224: 1fb00097 auipc ra,0x1fb00 +30100228: e00080e7 jalr -512(ra) # 4fc00024 +3010022c: 1fb00097 auipc ra,0x1fb00 +30100230: 334080e7 jalr 820(ra) # 4fc00560 +30100234: 028535b3 mulhu a1,a0,s0 +30100238: 4422 lw s0,8(sp) +3010023a: 40b2 lw ra,12(sp) +3010023c: 30101537 lui a0,0x30101 +30100240: 0d050513 addi a0,a0,208 # 301010d0 +30100244: 0141 addi sp,sp,16 +30100246: 81c9 srli a1,a1,0x12 +30100248: 1fb00317 auipc t1,0x1fb00 +3010024c: ddc30067 jr -548(t1) # 4fc00024 + +30100250 : +30100250: 1141 addi sp,sp,-16 +30100252: c606 sw ra,12(sp) +30100254: c422 sw s0,8(sp) +30100256: 50111737 lui a4,0x50111 +3010025a: 433c lw a5,64(a4) +3010025c: 431be437 lui s0,0x431be +30100260: e8340413 addi s0,s0,-381 # 431bde83 <__ulp_entry_point+0x31b5e83> +30100264: 9bf1 andi a5,a5,-4 +30100266: 0017e793 ori a5,a5,1 +3010026a: c33c sw a5,64(a4) +3010026c: 1fb00097 auipc ra,0x1fb00 +30100270: 2f0080e7 jalr 752(ra) # 4fc0055c +30100274: 028535b3 mulhu a1,a0,s0 +30100278: 30101537 lui a0,0x30101 +3010027c: 0b850513 addi a0,a0,184 # 301010b8 +30100280: 81c9 srli a1,a1,0x12 +30100282: 1fb00097 auipc ra,0x1fb00 +30100286: da2080e7 jalr -606(ra) # 4fc00024 +3010028a: 1fb00097 auipc ra,0x1fb00 +3010028e: 2d6080e7 jalr 726(ra) # 4fc00560 +30100292: 028535b3 mulhu a1,a0,s0 +30100296: 4422 lw s0,8(sp) +30100298: 40b2 lw ra,12(sp) +3010029a: 30101537 lui a0,0x30101 +3010029e: 0d050513 addi a0,a0,208 # 301010d0 +301002a2: 0141 addi sp,sp,16 +301002a4: 81c9 srli a1,a1,0x12 +301002a6: 1fb00317 auipc t1,0x1fb00 +301002aa: d7e30067 jr -642(t1) # 4fc00024 + ... + +301002b0 : +301002b0: 50d84737 lui a4,0x50d84 +301002b4: 501167b7 lui a5,0x50116 +301002b8: aa170713 addi a4,a4,-1375 # 50d83aa1 +301002bc: cf98 sw a4,24(a5) +301002be: 0007a023 sw zero,0(a5) # 50116000 +301002c2: 0007ac23 sw zero,24(a5) +301002c6: d398 sw a4,32(a5) +301002c8: 4fd0 lw a2,28(a5) +301002ca: 400005b7 lui a1,0x40000 +301002ce: 500c26b7 lui a3,0x500c2 +301002d2: 8e4d or a2,a2,a1 +301002d4: cfd0 sw a2,28(a5) +301002d6: 0207a023 sw zero,32(a5) +301002da: d2f8 sw a4,100(a3) +301002dc: 0406a423 sw zero,72(a3) # 500c2048 +301002e0: 0606a223 sw zero,100(a3) +301002e4: 500c37b7 lui a5,0x500c3 +301002e8: d3f8 sw a4,100(a5) +301002ea: 0407a423 sw zero,72(a5) # 500c3048 +301002ee: 0607a223 sw zero,100(a5) +301002f2: 8082 ret + ... + +301002f6 : +301002f6: 1141 addi sp,sp,-16 +301002f8: c606 sw ra,12(sp) +301002fa: c422 sw s0,8(sp) +301002fc: 0800 addi s0,sp,16 +301002fe: 501157b7 lui a5,0x50115 +30100302: 5f000737 lui a4,0x5f000 +30100306: 1ce7aa23 sw a4,468(a5) # 501151d4 +3010030a: 501157b7 lui a5,0x50115 +3010030e: 40200737 lui a4,0x40200 +30100312: 08070713 addi a4,a4,128 # 40200080 <__ulp_entry_point+0x1f8080> +30100316: 1ce7a823 sw a4,464(a5) # 501151d0 +3010031a: 501157b7 lui a5,0x50115 +3010031e: 1d07a703 lw a4,464(a5) # 501151d0 +30100322: 10076713 ori a4,a4,256 +30100326: 1ce7a823 sw a4,464(a5) +3010032a: 501157b7 lui a5,0x50115 +3010032e: 15c7a683 lw a3,348(a5) # 5011515c +30100332: 01000737 lui a4,0x1000 +30100336: 8f55 or a4,a4,a3 +30100338: 14e7ae23 sw a4,348(a5) +3010033c: 501117b7 lui a5,0x50111 +30100340: 43b4 lw a3,64(a5) +30100342: 10000737 lui a4,0x10000 +30100346: 8f55 or a4,a4,a3 +30100348: c3b8 sw a4,64(a5) +3010034a: 500e67b7 lui a5,0x500e6 +3010034e: 5b94 lw a3,48(a5) +30100350: 7775 lui a4,0xffffd +30100352: 177d addi a4,a4,-1 # ffffcfff +30100354: 8ef9 and a3,a3,a4 +30100356: 6705 lui a4,0x1 +30100358: 8f55 or a4,a4,a3 +3010035a: db98 sw a4,48(a5) +3010035c: 500e17b7 lui a5,0x500e1 +30100360: 21c78793 addi a5,a5,540 # 500e121c +30100364: 4394 lw a3,0(a5) +30100366: 7775 lui a4,0xffffd +30100368: 177d addi a4,a4,-1 # ffffcfff +3010036a: 8ef9 and a3,a3,a4 +3010036c: 6709 lui a4,0x2 +3010036e: 8f55 or a4,a4,a3 +30100370: c398 sw a4,0(a5) +30100372: 500e17b7 lui a5,0x500e1 +30100376: 21c78793 addi a5,a5,540 # 500e121c +3010037a: 43d4 lw a3,4(a5) +3010037c: 7775 lui a4,0xffffd +3010037e: 177d addi a4,a4,-1 # ffffcfff +30100380: 8ef9 and a3,a3,a4 +30100382: 6709 lui a4,0x2 +30100384: 8f55 or a4,a4,a3 +30100386: c3d8 sw a4,4(a5) +30100388: 500e17b7 lui a5,0x500e1 +3010038c: 21c78793 addi a5,a5,540 # 500e121c +30100390: 4794 lw a3,8(a5) +30100392: 7775 lui a4,0xffffd +30100394: 177d addi a4,a4,-1 # ffffcfff +30100396: 8ef9 and a3,a3,a4 +30100398: 6709 lui a4,0x2 +3010039a: 8f55 or a4,a4,a3 +3010039c: c798 sw a4,8(a5) +3010039e: 500e17b7 lui a5,0x500e1 +301003a2: 21c78793 addi a5,a5,540 # 500e121c +301003a6: 47d4 lw a3,12(a5) +301003a8: 7775 lui a4,0xffffd +301003aa: 177d addi a4,a4,-1 # ffffcfff +301003ac: 8ef9 and a3,a3,a4 +301003ae: 6709 lui a4,0x2 +301003b0: 8f55 or a4,a4,a3 +301003b2: c7d8 sw a4,12(a5) +301003b4: 500e17b7 lui a5,0x500e1 +301003b8: 21c78793 addi a5,a5,540 # 500e121c +301003bc: 4b94 lw a3,16(a5) +301003be: 7775 lui a4,0xffffd +301003c0: 177d addi a4,a4,-1 # ffffcfff +301003c2: 8ef9 and a3,a3,a4 +301003c4: 6709 lui a4,0x2 +301003c6: 8f55 or a4,a4,a3 +301003c8: cb98 sw a4,16(a5) +301003ca: 500e17b7 lui a5,0x500e1 +301003ce: 21c78793 addi a5,a5,540 # 500e121c +301003d2: 4bd4 lw a3,20(a5) +301003d4: 7775 lui a4,0xffffd +301003d6: 177d addi a4,a4,-1 # ffffcfff +301003d8: 8ef9 and a3,a3,a4 +301003da: 6709 lui a4,0x2 +301003dc: 8f55 or a4,a4,a3 +301003de: cbd8 sw a4,20(a5) +301003e0: 500e17b7 lui a5,0x500e1 +301003e4: 21c78793 addi a5,a5,540 # 500e121c +301003e8: 4f94 lw a3,24(a5) +301003ea: 7775 lui a4,0xffffd +301003ec: 177d addi a4,a4,-1 # ffffcfff +301003ee: 8ef9 and a3,a3,a4 +301003f0: 6709 lui a4,0x2 +301003f2: 8f55 or a4,a4,a3 +301003f4: cf98 sw a4,24(a5) +301003f6: 500e17b7 lui a5,0x500e1 +301003fa: 21c78793 addi a5,a5,540 # 500e121c +301003fe: 4fd4 lw a3,28(a5) +30100400: 7775 lui a4,0xffffd +30100402: 177d addi a4,a4,-1 # ffffcfff +30100404: 8ef9 and a3,a3,a4 +30100406: 6709 lui a4,0x2 +30100408: 8f55 or a4,a4,a3 +3010040a: cfd8 sw a4,28(a5) +3010040c: 500e17b7 lui a5,0x500e1 +30100410: 21c78793 addi a5,a5,540 # 500e121c +30100414: 5394 lw a3,32(a5) +30100416: 7721 lui a4,0xfffe8 +30100418: 177d addi a4,a4,-1 # fffe7fff +3010041a: 8ef9 and a3,a3,a4 +3010041c: 6741 lui a4,0x10 +3010041e: 8f55 or a4,a4,a3 +30100420: d398 sw a4,32(a5) +30100422: 500e17b7 lui a5,0x500e1 +30100426: 21c78793 addi a5,a5,540 # 500e121c +3010042a: 53d4 lw a3,36(a5) +3010042c: 7775 lui a4,0xffffd +3010042e: 177d addi a4,a4,-1 # ffffcfff +30100430: 8ef9 and a3,a3,a4 +30100432: 6709 lui a4,0x2 +30100434: 8f55 or a4,a4,a3 +30100436: d3d8 sw a4,36(a5) +30100438: 500e17b7 lui a5,0x500e1 +3010043c: 21c78793 addi a5,a5,540 # 500e121c +30100440: 5794 lw a3,40(a5) +30100442: 7775 lui a4,0xffffd +30100444: 177d addi a4,a4,-1 # ffffcfff +30100446: 8ef9 and a3,a3,a4 +30100448: 6709 lui a4,0x2 +3010044a: 8f55 or a4,a4,a3 +3010044c: d798 sw a4,40(a5) +3010044e: 500e17b7 lui a5,0x500e1 +30100452: 21c78793 addi a5,a5,540 # 500e121c +30100456: 57d4 lw a3,44(a5) +30100458: 7775 lui a4,0xffffd +3010045a: 177d addi a4,a4,-1 # ffffcfff +3010045c: 8ef9 and a3,a3,a4 +3010045e: 6709 lui a4,0x2 +30100460: 8f55 or a4,a4,a3 +30100462: d7d8 sw a4,44(a5) +30100464: 500e17b7 lui a5,0x500e1 +30100468: 21c78793 addi a5,a5,540 # 500e121c +3010046c: 5b94 lw a3,48(a5) +3010046e: 7775 lui a4,0xffffd +30100470: 177d addi a4,a4,-1 # ffffcfff +30100472: 8ef9 and a3,a3,a4 +30100474: 6709 lui a4,0x2 +30100476: 8f55 or a4,a4,a3 +30100478: db98 sw a4,48(a5) +3010047a: 500e17b7 lui a5,0x500e1 +3010047e: 21c78793 addi a5,a5,540 # 500e121c +30100482: 5bd4 lw a3,52(a5) +30100484: 7775 lui a4,0xffffd +30100486: 177d addi a4,a4,-1 # ffffcfff +30100488: 8ef9 and a3,a3,a4 +3010048a: 6709 lui a4,0x2 +3010048c: 8f55 or a4,a4,a3 +3010048e: dbd8 sw a4,52(a5) +30100490: 500e17b7 lui a5,0x500e1 +30100494: 21c78793 addi a5,a5,540 # 500e121c +30100498: 5f94 lw a3,56(a5) +3010049a: 7775 lui a4,0xffffd +3010049c: 177d addi a4,a4,-1 # ffffcfff +3010049e: 8ef9 and a3,a3,a4 +301004a0: 6709 lui a4,0x2 +301004a2: 8f55 or a4,a4,a3 +301004a4: df98 sw a4,56(a5) +301004a6: 500e17b7 lui a5,0x500e1 +301004aa: 21c78793 addi a5,a5,540 # 500e121c +301004ae: 5fd4 lw a3,60(a5) +301004b0: 7775 lui a4,0xffffd +301004b2: 177d addi a4,a4,-1 # ffffcfff +301004b4: 8ef9 and a3,a3,a4 +301004b6: 6709 lui a4,0x2 +301004b8: 8f55 or a4,a4,a3 +301004ba: dfd8 sw a4,60(a5) +301004bc: 500e17b7 lui a5,0x500e1 +301004c0: 21c78793 addi a5,a5,540 # 500e121c +301004c4: 43b4 lw a3,64(a5) +301004c6: 7775 lui a4,0xffffd +301004c8: 177d addi a4,a4,-1 # ffffcfff +301004ca: 8ef9 and a3,a3,a4 +301004cc: 6709 lui a4,0x2 +301004ce: 8f55 or a4,a4,a3 +301004d0: c3b8 sw a4,64(a5) +301004d2: 500e17b7 lui a5,0x500e1 +301004d6: 21c78793 addi a5,a5,540 # 500e121c +301004da: 43f4 lw a3,68(a5) +301004dc: 7775 lui a4,0xffffd +301004de: 177d addi a4,a4,-1 # ffffcfff +301004e0: 8ef9 and a3,a3,a4 +301004e2: 6709 lui a4,0x2 +301004e4: 8f55 or a4,a4,a3 +301004e6: c3f8 sw a4,68(a5) +301004e8: 500e17b7 lui a5,0x500e1 +301004ec: 21c78793 addi a5,a5,540 # 500e121c +301004f0: 47b4 lw a3,72(a5) +301004f2: 7775 lui a4,0xffffd +301004f4: 177d addi a4,a4,-1 # ffffcfff +301004f6: 8ef9 and a3,a3,a4 +301004f8: 6709 lui a4,0x2 +301004fa: 8f55 or a4,a4,a3 +301004fc: c7b8 sw a4,72(a5) +301004fe: 500e17b7 lui a5,0x500e1 +30100502: 21c78793 addi a5,a5,540 # 500e121c +30100506: 47f4 lw a3,76(a5) +30100508: 7721 lui a4,0xfffe8 +3010050a: 177d addi a4,a4,-1 # fffe7fff +3010050c: 8ef9 and a3,a3,a4 +3010050e: 6741 lui a4,0x10 +30100510: 8f55 or a4,a4,a3 +30100512: c7f8 sw a4,76(a5) +30100514: 500e17b7 lui a5,0x500e1 +30100518: 21c78793 addi a5,a5,540 # 500e121c +3010051c: 5398 lw a4,32(a5) +3010051e: 00176713 ori a4,a4,1 +30100522: d398 sw a4,32(a5) +30100524: 500e17b7 lui a5,0x500e1 +30100528: 21c78793 addi a5,a5,540 # 500e121c +3010052c: 47f8 lw a4,76(a5) +3010052e: 00176713 ori a4,a4,1 +30100532: c7f8 sw a4,76(a5) +30100534: 5008e7b7 lui a5,0x5008e +30100538: 00078793 mv a5,a5 +3010053c: 1a07a703 lw a4,416(a5) # 5008e1a0 +30100540: 00176713 ori a4,a4,1 +30100544: 1ae7a023 sw a4,416(a5) +30100548: 5008e7b7 lui a5,0x5008e +3010054c: 00078793 mv a5,a5 +30100550: 1a07a703 lw a4,416(a5) # 5008e1a0 +30100554: f8377713 andi a4,a4,-125 +30100558: 00c76713 ori a4,a4,12 +3010055c: 1ae7a023 sw a4,416(a5) +30100560: 5008e7b7 lui a5,0x5008e +30100564: 00078793 mv a5,a5 +30100568: 1a07a703 lw a4,416(a5) # 5008e1a0 +3010056c: 00276713 ori a4,a4,2 +30100570: 1ae7a023 sw a4,416(a5) +30100574: 5008e7b7 lui a5,0x5008e +30100578: 00078793 mv a5,a5 +3010057c: 1a07a683 lw a3,416(a5) # 5008e1a0 +30100580: 777d lui a4,0xfffff +30100582: 07f70713 addi a4,a4,127 # fffff07f +30100586: 8f75 and a4,a4,a3 +30100588: 18076713 ori a4,a4,384 +3010058c: 1ae7a023 sw a4,416(a5) +30100590: 5008e7b7 lui a5,0x5008e +30100594: 00078793 mv a5,a5 +30100598: 1a07a683 lw a3,416(a5) # 5008e1a0 +3010059c: 82000737 lui a4,0x82000 +301005a0: 177d addi a4,a4,-1 # 81ffffff +301005a2: 8ef9 and a3,a3,a4 +301005a4: 04000737 lui a4,0x4000 +301005a8: 8f55 or a4,a4,a3 +301005aa: 1ae7a023 sw a4,416(a5) +301005ae: 5008e7b7 lui a5,0x5008e +301005b2: 00078793 mv a5,a5 +301005b6: 1a07a683 lw a3,416(a5) # 5008e1a0 +301005ba: 80000737 lui a4,0x80000 +301005be: 8f55 or a4,a4,a3 +301005c0: 1ae7a023 sw a4,416(a5) +301005c4: 5008e7b7 lui a5,0x5008e +301005c8: 00078793 mv a5,a5 +301005cc: 1747a683 lw a3,372(a5) # 5008e174 +301005d0: 000c0737 lui a4,0xc0 +301005d4: 8f55 or a4,a4,a3 +301005d6: 16e7aa23 sw a4,372(a5) +301005da: 5008e7b7 lui a5,0x5008e +301005de: 00078793 mv a5,a5 +301005e2: 6741 lui a4,0x10 +301005e4: 0705 addi a4,a4,1 # 10001 <_start-0x300effff> +301005e6: cbb8 sw a4,80(a5) +301005e8: 5008f7b7 lui a5,0x5008f +301005ec: 00078793 mv a5,a5 +301005f0: 6741 lui a4,0x10 +301005f2: 0705 addi a4,a4,1 # 10001 <_start-0x300effff> +301005f4: cbd8 sw a4,20(a5) +301005f6: 5008e7b7 lui a5,0x5008e +301005fa: 00078793 mv a5,a5 +301005fe: 1907a703 lw a4,400(a5) # 5008e190 +30100602: 02076713 ori a4,a4,32 +30100606: 18e7a823 sw a4,400(a5) +3010060a: 5008e7b7 lui a5,0x5008e +3010060e: 00078793 mv a5,a5 +30100612: 1807a703 lw a4,384(a5) # 5008e180 +30100616: 02076713 ori a4,a4,32 +3010061a: 18e7a023 sw a4,384(a5) +3010061e: 301017b7 lui a5,0x30101 +30100622: 0e878793 addi a5,a5,232 # 301010e8 +30100626: 0007c703 lbu a4,0(a5) +3010062a: 02076713 ori a4,a4,32 +3010062e: 00e78023 sb a4,0(a5) +30100632: 301017b7 lui a5,0x30101 +30100636: 0e878793 addi a5,a5,232 # 301010e8 +3010063a: 0007c703 lbu a4,0(a5) +3010063e: 9b0d andi a4,a4,-29 +30100640: 01076713 ori a4,a4,16 +30100644: 00e78023 sb a4,0(a5) +30100648: 301017b7 lui a5,0x30101 +3010064c: 0e878793 addi a5,a5,232 # 301010e8 +30100650: 0007c703 lbu a4,0(a5) +30100654: 9b71 andi a4,a4,-4 +30100656: 00e78023 sb a4,0(a5) +3010065a: 301017b7 lui a5,0x30101 +3010065e: 0e878793 addi a5,a5,232 # 301010e8 +30100662: 0047c703 lbu a4,4(a5) +30100666: 8b7d andi a4,a4,31 +30100668: 02076713 ori a4,a4,32 +3010066c: 00e78223 sb a4,4(a5) +30100670: 301017b7 lui a5,0x30101 +30100674: 0e878793 addi a5,a5,232 # 301010e8 +30100678: 0057c703 lbu a4,5(a5) +3010067c: 00376713 ori a4,a4,3 +30100680: 00e782a3 sb a4,5(a5) +30100684: 301017b7 lui a5,0x30101 +30100688: 0e878793 addi a5,a5,232 # 301010e8 +3010068c: 0057c703 lbu a4,5(a5) +30100690: 9b6d andi a4,a4,-5 +30100692: 00e782a3 sb a4,5(a5) +30100696: 301017b7 lui a5,0x30101 +3010069a: 0e878793 addi a5,a5,232 # 301010e8 +3010069e: 0057c703 lbu a4,5(a5) +301006a2: 00876713 ori a4,a4,8 +301006a6: 00e782a3 sb a4,5(a5) +301006aa: 301017b7 lui a5,0x30101 +301006ae: 0e878793 addi a5,a5,232 # 301010e8 +301006b2: 0057c703 lbu a4,5(a5) +301006b6: 04076713 ori a4,a4,64 +301006ba: 00e782a3 sb a4,5(a5) +301006be: 301017b7 lui a5,0x30101 +301006c2: 0e878593 addi a1,a5,232 # 301010e8 +301006c6: 450d li a0,3 +301006c8: 2385 jal 30100c28 +301006ca: 450d li a0,3 +301006cc: 0b1000ef jal 30100f7c +301006d0: 87aa mv a5,a0 +301006d2: ,-- cb99 beqz a5,301006e8 +301006d4: | 301007b7 lui a5,0x30100 +301006d8: | 07078513 addi a0,a5,112 # 30100070 <_start+0x70> +301006dc: | 1fb00097 auipc ra,0x1fb00 +301006e0: | 948080e7 jalr -1720(ra) # 4fc00024 +301006e4: | 57fd li a5,-1 +301006e6: ,--|-- a841 j 30100776 +301006e8: | '-> 301017b7 lui a5,0x30101 +301006ec: | 0e878593 addi a1,a5,232 # 301010e8 +301006f0: | 450d li a0,3 +301006f2: | 10d000ef jal 30100ffe +301006f6: | 301017b7 lui a5,0x30101 +301006fa: | 0e878793 addi a5,a5,232 # 301010e8 +301006fe: | 0017c783 lbu a5,1(a5) +30100702: | 8bfd andi a5,a5,31 +30100704: | 0ff7f713 zext.b a4,a5 +30100708: | 47b5 li a5,13 +3010070a: | ,-- 04f70063 beq a4,a5,3010074a +3010070e: | | 301017b7 lui a5,0x30101 +30100712: | | 0e878793 addi a5,a5,232 # 301010e8 +30100716: | | 0017c783 lbu a5,1(a5) +3010071a: | | 8bfd andi a5,a5,31 +3010071c: | | 0ff7f713 zext.b a4,a5 +30100720: | | 47e9 li a5,26 +30100722: | +-- 02f70463 beq a4,a5,3010074a +30100726: | | 301017b7 lui a5,0x30101 +3010072a: | | 0e878793 addi a5,a5,232 # 301010e8 +3010072e: | | 439c lw a5,0(a5) +30100730: | | 83a1 srli a5,a5,0x8 +30100732: | | 8bfd andi a5,a5,31 +30100734: | | 0ff7f793 zext.b a5,a5 +30100738: | | 85be mv a1,a5 +3010073a: | | 301007b7 lui a5,0x30100 +3010073e: | | 09078513 addi a0,a5,144 # 30100090 <_start+0x90> +30100742: | | 1fb00097 auipc ra,0x1fb00 +30100746: | | 8e2080e7 jalr -1822(ra) # 4fc00024 +3010074a: | '-> 281d jal 30100780 +3010074c: | 5008e7b7 lui a5,0x5008e +30100750: | 00078793 mv a5,a5 +30100754: | 0d87a703 lw a4,216(a5) # 5008e0d8 +30100758: | 00276713 ori a4,a4,2 +3010075c: | 0ce7ac23 sw a4,216(a5) +30100760: | 5008f7b7 lui a5,0x5008f +30100764: | 00078793 mv a5,a5 +30100768: | 0d47a703 lw a4,212(a5) # 5008f0d4 +3010076c: | 00276713 ori a4,a4,2 +30100770: | 0ce7aa23 sw a4,212(a5) +30100774: | 4781 li a5,0 +30100776: '----> 853e mv a0,a5 +30100778: 40b2 lw ra,12(sp) +3010077a: 4422 lw s0,8(sp) +3010077c: 0141 addi sp,sp,16 +3010077e: 8082 ret + +30100780 : +30100780: 7171 addi sp,sp,-176 +30100782: d722 sw s0,172(sp) +30100784: 1900 addi s0,sp,176 +30100786: 4789 li a5,2 +30100788: f6f42623 sw a5,-148(s0) +3010078c: 47c1 li a5,16 +3010078e: f6f42423 sw a5,-152(s0) +30100792: 67a1 lui a5,0x8 +30100794: 08078793 addi a5,a5,128 # 8080 <_start-0x300f7f80> +30100798: f6f42223 sw a5,-156(s0) +3010079c: 5008e7b7 lui a5,0x5008e +301007a0: 00078793 mv a5,a5 +301007a4: 43b4 lw a3,64(a5) +301007a6: 00100737 lui a4,0x100 +301007aa: 8f55 or a4,a4,a3 +301007ac: c3b8 sw a4,64(a5) +301007ae: f6842783 lw a5,-152(s0) +301007b2: 0ff7f793 zext.b a5,a5 +301007b6: 17fd addi a5,a5,-1 # 5008dfff +301007b8: 0ff7f793 zext.b a5,a5 +301007bc: 8bbd andi a5,a5,15 +301007be: 0ff7f713 zext.b a4,a5 +301007c2: 5008e7b7 lui a5,0x5008e +301007c6: 00078793 mv a5,a5 +301007ca: 0772 slli a4,a4,0x1c +301007cc: 47f0 lw a2,76(a5) +301007ce: 100006b7 lui a3,0x10000 +301007d2: 16fd addi a3,a3,-1 # fffffff <_start-0x20100001> +301007d4: 8ef1 and a3,a3,a2 +301007d6: 8f55 or a4,a4,a3 +301007d8: c7f8 sw a4,76(a5) +301007da: 5008e7b7 lui a5,0x5008e +301007de: 00078793 mv a5,a5 +301007e2: 47fc lw a5,76(a5) +301007e4: f6f42023 sw a5,-160(s0) +301007e8: f6042783 lw a5,-160(s0) +301007ec: f4f42e23 sw a5,-164(s0) +301007f0: f6442783 lw a5,-156(s0) +301007f4: 07c2 slli a5,a5,0x10 +301007f6: 83c1 srli a5,a5,0x10 +301007f8: f4f41e23 sh a5,-164(s0) +301007fc: f5c42703 lw a4,-164(s0) +30100800: 5008e7b7 lui a5,0x5008e +30100804: 00078793 mv a5,a5 +30100808: c7f8 sw a4,76(a5) +3010080a: 0001 nop +3010080c: 4789 li a5,2 +3010080e: f6f42e23 sw a5,-132(s0) +30100812: 47c1 li a5,16 +30100814: f6f42c23 sw a5,-136(s0) +30100818: f6042a23 sw zero,-140(s0) +3010081c: 5008e7b7 lui a5,0x5008e +30100820: 00078793 mv a5,a5 +30100824: 43b8 lw a4,64(a5) +30100826: 02076713 ori a4,a4,32 +3010082a: c3b8 sw a4,64(a5) +3010082c: f7842783 lw a5,-136(s0) +30100830: 0ff7f793 zext.b a5,a5 +30100834: 17fd addi a5,a5,-1 # 5008dfff +30100836: 0ff7f793 zext.b a5,a5 +3010083a: 8bbd andi a5,a5,15 +3010083c: 0ff7f713 zext.b a4,a5 +30100840: 5008e7b7 lui a5,0x5008e +30100844: 00078793 mv a5,a5 +30100848: 0772 slli a4,a4,0x1c +3010084a: 47b0 lw a2,72(a5) +3010084c: 100006b7 lui a3,0x10000 +30100850: 16fd addi a3,a3,-1 # fffffff <_start-0x20100001> +30100852: 8ef1 and a3,a3,a2 +30100854: 8f55 or a4,a4,a3 +30100856: c7b8 sw a4,72(a5) +30100858: 5008e7b7 lui a5,0x5008e +3010085c: 00078793 mv a5,a5 +30100860: 47bc lw a5,72(a5) +30100862: f6f42823 sw a5,-144(s0) +30100866: f7042783 lw a5,-144(s0) +3010086a: f4f42c23 sw a5,-168(s0) +3010086e: f7442783 lw a5,-140(s0) +30100872: 07c2 slli a5,a5,0x10 +30100874: 83c1 srli a5,a5,0x10 +30100876: f4f41c23 sh a5,-168(s0) +3010087a: f5842703 lw a4,-168(s0) +3010087e: 5008e7b7 lui a5,0x5008e +30100882: 00078793 mv a5,a5 +30100886: c7b8 sw a4,72(a5) +30100888: 0001 nop +3010088a: 4789 li a5,2 +3010088c: f8f42223 sw a5,-124(s0) +30100890: 02000793 li a5,32 +30100894: f8f42023 sw a5,-128(s0) +30100898: f8042783 lw a5,-128(s0) +3010089c: 0ff7f793 zext.b a5,a5 +301008a0: 17fd addi a5,a5,-1 # 5008dfff +301008a2: 0ff7f793 zext.b a5,a5 +301008a6: 03f7f793 andi a5,a5,63 +301008aa: 0ff7f713 zext.b a4,a5 +301008ae: 5008e7b7 lui a5,0x5008e +301008b2: 00078793 mv a5,a5 +301008b6: 03f77713 andi a4,a4,63 +301008ba: 073a slli a4,a4,0xe +301008bc: 43b0 lw a2,64(a5) +301008be: fff046b7 lui a3,0xfff04 +301008c2: 16fd addi a3,a3,-1 # fff03fff +301008c4: 8ef1 and a3,a3,a2 +301008c6: 8f55 or a4,a4,a3 +301008c8: c3b8 sw a4,64(a5) +301008ca: 0001 nop +301008cc: 4789 li a5,2 +301008ce: f8f42623 sw a5,-116(s0) +301008d2: 4785 li a5,1 +301008d4: f8f405a3 sb a5,-117(s0) +301008d8: 5008e7b7 lui a5,0x5008e +301008dc: 00078793 mv a5,a5 +301008e0: f8b44703 lbu a4,-117(s0) +301008e4: 8b05 andi a4,a4,1 +301008e6: 43b4 lw a3,64(a5) +301008e8: 9af9 andi a3,a3,-2 +301008ea: 8f55 or a4,a4,a3 +301008ec: c3b8 sw a4,64(a5) +301008ee: 0001 nop +301008f0: 4789 li a5,2 +301008f2: f8f42a23 sw a5,-108(s0) +301008f6: 47b1 li a5,12 +301008f8: f8f42823 sw a5,-112(s0) +301008fc: 5008e7b7 lui a5,0x5008e +30100900: 00078793 mv a5,a5 +30100904: 43b8 lw a4,64(a5) +30100906: 00876713 ori a4,a4,8 +3010090a: c3b8 sw a4,64(a5) +3010090c: f9042783 lw a5,-112(s0) +30100910: 0ff7f793 zext.b a5,a5 +30100914: 17fd addi a5,a5,-1 # 5008dfff +30100916: 0ff7f793 zext.b a5,a5 +3010091a: 03f7f793 andi a5,a5,63 +3010091e: 0ff7f713 zext.b a4,a5 +30100922: 5008e7b7 lui a5,0x5008e +30100926: 00078793 mv a5,a5 +3010092a: 03f77713 andi a4,a4,63 +3010092e: 075a slli a4,a4,0x16 +30100930: 43b0 lw a2,64(a5) +30100932: f04006b7 lui a3,0xf0400 +30100936: 16fd addi a3,a3,-1 # f03fffff +30100938: 8ef1 and a3,a3,a2 +3010093a: 8f55 or a4,a4,a3 +3010093c: c3b8 sw a4,64(a5) +3010093e: 0001 nop +30100940: 4789 li a5,2 +30100942: f8f42e23 sw a5,-100(s0) +30100946: 47e9 li a5,26 +30100948: f8f42c23 sw a5,-104(s0) +3010094c: 5008e7b7 lui a5,0x5008e +30100950: 00078793 mv a5,a5 +30100954: 43b8 lw a4,64(a5) +30100956: 01076713 ori a4,a4,16 +3010095a: c3b8 sw a4,64(a5) +3010095c: f9842783 lw a5,-104(s0) +30100960: 0ff7f793 zext.b a5,a5 +30100964: 17fd addi a5,a5,-1 # 5008dfff +30100966: 0ff7f793 zext.b a5,a5 +3010096a: 03f7f793 andi a5,a5,63 +3010096e: 0ff7f713 zext.b a4,a5 +30100972: 5008e7b7 lui a5,0x5008e +30100976: 00078793 mv a5,a5 +3010097a: 03f77713 andi a4,a4,63 +3010097e: 071a slli a4,a4,0x6 +30100980: 43b0 lw a2,64(a5) +30100982: 76fd lui a3,0xfffff +30100984: 03f68693 addi a3,a3,63 # fffff03f +30100988: 8ef1 and a3,a3,a2 +3010098a: 8f55 or a4,a4,a3 +3010098c: c3b8 sw a4,64(a5) +3010098e: 0001 nop +30100990: 4789 li a5,2 +30100992: faf42223 sw a5,-92(s0) +30100996: 4785 li a5,1 +30100998: faf401a3 sb a5,-93(s0) +3010099c: fa442703 lw a4,-92(s0) +301009a0: 4789 li a5,2 +301009a2: ,-- 02f71163 bne a4,a5,301009c4 +301009a6: | 5008e7b7 lui a5,0x5008e +301009aa: | 00078793 mv a5,a5 +301009ae: | fa344703 lbu a4,-93(s0) +301009b2: | 8b05 andi a4,a4,1 +301009b4: | 0706 slli a4,a4,0x1 +301009b6: | 0d87a683 lw a3,216(a5) # 5008e0d8 +301009ba: | 9af5 andi a3,a3,-3 +301009bc: | 8f55 or a4,a4,a3 +301009be: | 0ce7ac23 sw a4,216(a5) +301009c2: ,--|-- a025 j 301009ea +301009c4: | '-> fa442703 lw a4,-92(s0) +301009c8: | 478d li a5,3 +301009ca: +----- 02f71063 bne a4,a5,301009ea +301009ce: | 5008f7b7 lui a5,0x5008f +301009d2: | 00078793 mv a5,a5 +301009d6: | fa344703 lbu a4,-93(s0) +301009da: | 8b05 andi a4,a4,1 +301009dc: | 0706 slli a4,a4,0x1 +301009de: | 0d47a683 lw a3,212(a5) # 5008f0d4 +301009e2: | 9af5 andi a3,a3,-3 +301009e4: | 8f55 or a4,a4,a3 +301009e6: | 0ce7aa23 sw a4,212(a5) +301009ea: '----> 0001 nop +301009ec: 4789 li a5,2 +301009ee: faf42623 sw a5,-84(s0) +301009f2: 4785 li a5,1 +301009f4: faf405a3 sb a5,-85(s0) +301009f8: 5008e7b7 lui a5,0x5008e +301009fc: 00078793 mv a5,a5 +30100a00: fab44703 lbu a4,-85(s0) +30100a04: 8b05 andi a4,a4,1 +30100a06: 075e slli a4,a4,0x17 +30100a08: 43f0 lw a2,68(a5) +30100a0a: ff8006b7 lui a3,0xff800 +30100a0e: 16fd addi a3,a3,-1 # ff7fffff +30100a10: 8ef1 and a3,a3,a2 +30100a12: 8f55 or a4,a4,a3 +30100a14: c3f8 sw a4,68(a5) +30100a16: 0001 nop +30100a18: 4789 li a5,2 +30100a1a: faf42a23 sw a5,-76(s0) +30100a1e: fa0409a3 sb zero,-77(s0) +30100a22: 5008e7b7 lui a5,0x5008e +30100a26: 00078793 mv a5,a5 +30100a2a: fb344703 lbu a4,-77(s0) +30100a2e: 8b05 andi a4,a4,1 +30100a30: 070e slli a4,a4,0x3 +30100a32: 0d87a683 lw a3,216(a5) # 5008e0d8 +30100a36: 9add andi a3,a3,-9 +30100a38: 8f55 or a4,a4,a3 +30100a3a: 0ce7ac23 sw a4,216(a5) +30100a3e: 0001 nop +30100a40: 4789 li a5,2 +30100a42: faf42e23 sw a5,-68(s0) +30100a46: fa040da3 sb zero,-69(s0) +30100a4a: 5008e7b7 lui a5,0x5008e +30100a4e: 00078793 mv a5,a5 +30100a52: fbb44703 lbu a4,-69(s0) +30100a56: 8b05 andi a4,a4,1 +30100a58: 070a slli a4,a4,0x2 +30100a5a: 0d87a683 lw a3,216(a5) # 5008e0d8 +30100a5e: 9aed andi a3,a3,-5 +30100a60: 8f55 or a4,a4,a3 +30100a62: 0ce7ac23 sw a4,216(a5) +30100a66: 0001 nop +30100a68: 4789 li a5,2 +30100a6a: fcf42223 sw a5,-60(s0) +30100a6e: 4785 li a5,1 +30100a70: fcf401a3 sb a5,-61(s0) +30100a74: 5008e7b7 lui a5,0x5008e +30100a78: 00078793 mv a5,a5 +30100a7c: fc344703 lbu a4,-61(s0) +30100a80: 8b05 andi a4,a4,1 +30100a82: 0d87a683 lw a3,216(a5) # 5008e0d8 +30100a86: 9af9 andi a3,a3,-2 +30100a88: 8f55 or a4,a4,a3 +30100a8a: 0ce7ac23 sw a4,216(a5) +30100a8e: 0001 nop +30100a90: 4789 li a5,2 +30100a92: fcf42623 sw a5,-52(s0) +30100a96: 4785 li a5,1 +30100a98: fcf405a3 sb a5,-53(s0) +30100a9c: 5008e7b7 lui a5,0x5008e +30100aa0: 00078793 mv a5,a5 +30100aa4: fcb44703 lbu a4,-53(s0) +30100aa8: 8b05 andi a4,a4,1 +30100aaa: 0756 slli a4,a4,0x15 +30100aac: 43b0 lw a2,64(a5) +30100aae: ffe006b7 lui a3,0xffe00 +30100ab2: 16fd addi a3,a3,-1 # ffdfffff +30100ab4: 8ef1 and a3,a3,a2 +30100ab6: 8f55 or a4,a4,a3 +30100ab8: c3b8 sw a4,64(a5) +30100aba: 5008e7b7 lui a5,0x5008e +30100abe: 00078793 mv a5,a5 +30100ac2: fcb44703 lbu a4,-53(s0) +30100ac6: 8b05 andi a4,a4,1 +30100ac8: 0756 slli a4,a4,0x15 +30100aca: 43f0 lw a2,68(a5) +30100acc: ffe006b7 lui a3,0xffe00 +30100ad0: 16fd addi a3,a3,-1 # ffdfffff +30100ad2: 8ef1 and a3,a3,a2 +30100ad4: 8f55 or a4,a4,a3 +30100ad6: c3f8 sw a4,68(a5) +30100ad8: 5008e7b7 lui a5,0x5008e +30100adc: 00078793 mv a5,a5 +30100ae0: fcb44703 lbu a4,-53(s0) +30100ae4: 8b05 andi a4,a4,1 +30100ae6: 0752 slli a4,a4,0x14 +30100ae8: 43f0 lw a2,68(a5) +30100aea: fff006b7 lui a3,0xfff00 +30100aee: 16fd addi a3,a3,-1 # ffefffff +30100af0: 8ef1 and a3,a3,a2 +30100af2: 8f55 or a4,a4,a3 +30100af4: c3f8 sw a4,68(a5) +30100af6: 5008e7b7 lui a5,0x5008e +30100afa: 00078793 mv a5,a5 +30100afe: fcb44703 lbu a4,-53(s0) +30100b02: 8b05 andi a4,a4,1 +30100b04: 074e slli a4,a4,0x13 +30100b06: 43f0 lw a2,68(a5) +30100b08: fff806b7 lui a3,0xfff80 +30100b0c: 16fd addi a3,a3,-1 # fff7ffff +30100b0e: 8ef1 and a3,a3,a2 +30100b10: 8f55 or a4,a4,a3 +30100b12: c3f8 sw a4,68(a5) +30100b14: 5008e7b7 lui a5,0x5008e +30100b18: 00078793 mv a5,a5 +30100b1c: fcb44703 lbu a4,-53(s0) +30100b20: 8b05 andi a4,a4,1 +30100b22: 074a slli a4,a4,0x12 +30100b24: 43f0 lw a2,68(a5) +30100b26: fffc06b7 lui a3,0xfffc0 +30100b2a: 16fd addi a3,a3,-1 # fffbffff +30100b2c: 8ef1 and a3,a3,a2 +30100b2e: 8f55 or a4,a4,a3 +30100b30: c3f8 sw a4,68(a5) +30100b32: 0001 nop +30100b34: 4789 li a5,2 +30100b36: fcf42a23 sw a5,-44(s0) +30100b3a: 4785 li a5,1 +30100b3c: fcf409a3 sb a5,-45(s0) +30100b40: 5008e7b7 lui a5,0x5008e +30100b44: 00078793 mv a5,a5 +30100b48: fd344703 lbu a4,-45(s0) +30100b4c: 8b05 andi a4,a4,1 +30100b4e: 076a slli a4,a4,0x1a +30100b50: 43f0 lw a2,68(a5) +30100b52: fc0006b7 lui a3,0xfc000 +30100b56: 16fd addi a3,a3,-1 # fbffffff +30100b58: 8ef1 and a3,a3,a2 +30100b5a: 8f55 or a4,a4,a3 +30100b5c: c3f8 sw a4,68(a5) +30100b5e: 5008e7b7 lui a5,0x5008e +30100b62: 00078793 mv a5,a5 +30100b66: fd344703 lbu a4,-45(s0) +30100b6a: 8b05 andi a4,a4,1 +30100b6c: 076e slli a4,a4,0x1b +30100b6e: 43f0 lw a2,68(a5) +30100b70: f80006b7 lui a3,0xf8000 +30100b74: 16fd addi a3,a3,-1 # f7ffffff +30100b76: 8ef1 and a3,a3,a2 +30100b78: 8f55 or a4,a4,a3 +30100b7a: c3f8 sw a4,68(a5) +30100b7c: 0001 nop +30100b7e: 4789 li a5,2 +30100b80: fcf42e23 sw a5,-36(s0) +30100b84: 4785 li a5,1 +30100b86: fcf40da3 sb a5,-37(s0) +30100b8a: 5008e7b7 lui a5,0x5008e +30100b8e: 00078793 mv a5,a5 +30100b92: fdb44703 lbu a4,-37(s0) +30100b96: 8b05 andi a4,a4,1 +30100b98: 5fd4 lw a3,60(a5) +30100b9a: 9af9 andi a3,a3,-2 +30100b9c: 8f55 or a4,a4,a3 +30100b9e: dfd8 sw a4,60(a5) +30100ba0: fdb44783 lbu a5,-37(s0) +30100ba4: 0017c793 xori a5,a5,1 +30100ba8: 0ff7f713 zext.b a4,a5 +30100bac: 5008e7b7 lui a5,0x5008e +30100bb0: 00078793 mv a5,a5 +30100bb4: 077e slli a4,a4,0x1f +30100bb6: 5fd0 lw a2,60(a5) +30100bb8: 800006b7 lui a3,0x80000 +30100bbc: fff6c693 not a3,a3 +30100bc0: 8ef1 and a3,a3,a2 +30100bc2: 8f55 or a4,a4,a3 +30100bc4: dfd8 sw a4,60(a5) +30100bc6: 0001 nop +30100bc8: 4789 li a5,2 +30100bca: fef42223 sw a5,-28(s0) +30100bce: 4785 li a5,1 +30100bd0: fef401a3 sb a5,-29(s0) +30100bd4: 5008e7b7 lui a5,0x5008e +30100bd8: 00078793 mv a5,a5 +30100bdc: fe344703 lbu a4,-29(s0) +30100be0: 8b05 andi a4,a4,1 +30100be2: 076a slli a4,a4,0x1a +30100be4: 47d0 lw a2,12(a5) +30100be6: fc0006b7 lui a3,0xfc000 +30100bea: 16fd addi a3,a3,-1 # fbffffff +30100bec: 8ef1 and a3,a3,a2 +30100bee: 8f55 or a4,a4,a3 +30100bf0: c7d8 sw a4,12(a5) +30100bf2: 0001 nop +30100bf4: 4789 li a5,2 +30100bf6: fef42623 sw a5,-20(s0) +30100bfa: 4785 li a5,1 +30100bfc: fef405a3 sb a5,-21(s0) +30100c00: 5008e7b7 lui a5,0x5008e +30100c04: 00078793 mv a5,a5 +30100c08: feb44703 lbu a4,-21(s0) +30100c0c: 8b05 andi a4,a4,1 +30100c0e: 0766 slli a4,a4,0x19 +30100c10: 47d0 lw a2,12(a5) +30100c12: fe0006b7 lui a3,0xfe000 +30100c16: 16fd addi a3,a3,-1 # fdffffff +30100c18: 8ef1 and a3,a3,a2 +30100c1a: 8f55 or a4,a4,a3 +30100c1c: c7d8 sw a4,12(a5) +30100c1e: 0001 nop +30100c20: 0001 nop +30100c22: 543a lw s0,172(sp) +30100c24: 614d addi sp,sp,176 +30100c26: 8082 ret + +30100c28 : +30100c28: 715d addi sp,sp,-80 +30100c2a: c686 sw ra,76(sp) +30100c2c: c4a2 sw s0,72(sp) +30100c2e: 0880 addi s0,sp,80 +30100c30: fca42623 sw a0,-52(s0) +30100c34: fcb42423 sw a1,-56(s0) +30100c38: 47c1 li a5,16 +30100c3a: fef42623 sw a5,-20(s0) +30100c3e: fe042423 sw zero,-24(s0) +30100c42: 02000793 li a5,32 +30100c46: fef42223 sw a5,-28(s0) +30100c4a: 47b1 li a5,12 +30100c4c: fef42023 sw a5,-32(s0) +30100c50: fc042a23 sw zero,-44(s0) +30100c54: fc041c23 sh zero,-40(s0) +30100c58: 47c1 li a5,16 +30100c5a: fcf42e23 sw a5,-36(s0) +30100c5e: fcc42503 lw a0,-52(s0) +30100c62: fec42603 lw a2,-20(s0) +30100c66: fe442703 lw a4,-28(s0) +30100c6a: fe042683 lw a3,-32(s0) +30100c6e: fdc42783 lw a5,-36(s0) +30100c72: c402 sw zero,8(sp) +30100c74: c23e sw a5,4(sp) +30100c76: fd440793 addi a5,s0,-44 +30100c7a: c03e sw a5,0(sp) +30100c7c: 4881 li a7,0 +30100c7e: 4801 li a6,0 +30100c80: 87b6 mv a5,a3 +30100c82: fe842683 lw a3,-24(s0) +30100c86: 6591 lui a1,0x4 +30100c88: 04058593 addi a1,a1,64 # 4040 <_start-0x300fbfc0> +30100c8c: 2c05 jal 30100ebc +30100c8e: 4791 li a5,4 +30100c90: fef42423 sw a5,-24(s0) +30100c94: fcc42503 lw a0,-52(s0) +30100c98: fec42603 lw a2,-20(s0) +30100c9c: fe442703 lw a4,-28(s0) +30100ca0: fe042683 lw a3,-32(s0) +30100ca4: fdc42783 lw a5,-36(s0) +30100ca8: c402 sw zero,8(sp) +30100caa: c23e sw a5,4(sp) +30100cac: fd440793 addi a5,s0,-44 +30100cb0: 0791 addi a5,a5,4 +30100cb2: c03e sw a5,0(sp) +30100cb4: 4881 li a7,0 +30100cb6: 4801 li a6,0 +30100cb8: 87b6 mv a5,a3 +30100cba: fe842683 lw a3,-24(s0) +30100cbe: 6591 lui a1,0x4 +30100cc0: 04058593 addi a1,a1,64 # 4040 <_start-0x300fbfc0> +30100cc4: 2ae5 jal 30100ebc +30100cc6: fc842783 lw a5,-56(s0) +30100cca: 0007c783 lbu a5,0(a5) +30100cce: 8395 srli a5,a5,0x5 +30100cd0: 8b85 andi a5,a5,1 +30100cd2: 0ff7f793 zext.b a5,a5 +30100cd6: 8b85 andi a5,a5,1 +30100cd8: 00579693 slli a3,a5,0x5 +30100cdc: fd444783 lbu a5,-44(s0) +30100ce0: fdf7f793 andi a5,a5,-33 +30100ce4: 873e mv a4,a5 +30100ce6: 87b6 mv a5,a3 +30100ce8: 8fd9 or a5,a5,a4 +30100cea: fcf40a23 sb a5,-44(s0) +30100cee: fc842783 lw a5,-56(s0) +30100cf2: 0007c783 lbu a5,0(a5) +30100cf6: 8389 srli a5,a5,0x2 +30100cf8: 8b9d andi a5,a5,7 +30100cfa: 0ff7f793 zext.b a5,a5 +30100cfe: 8b9d andi a5,a5,7 +30100d00: 00279693 slli a3,a5,0x2 +30100d04: fd444783 lbu a5,-44(s0) +30100d08: 9b8d andi a5,a5,-29 +30100d0a: 873e mv a4,a5 +30100d0c: 87b6 mv a5,a3 +30100d0e: 8fd9 or a5,a5,a4 +30100d10: fcf40a23 sb a5,-44(s0) +30100d14: fc842783 lw a5,-56(s0) +30100d18: 0007c783 lbu a5,0(a5) +30100d1c: 8b8d andi a5,a5,3 +30100d1e: 0ff7f793 zext.b a5,a5 +30100d22: 0037f693 andi a3,a5,3 +30100d26: fd444783 lbu a5,-44(s0) +30100d2a: 9bf1 andi a5,a5,-4 +30100d2c: 873e mv a4,a5 +30100d2e: 87b6 mv a5,a3 +30100d30: 8fd9 or a5,a5,a4 +30100d32: fcf40a23 sb a5,-44(s0) +30100d36: fc842783 lw a5,-56(s0) +30100d3a: 0047c783 lbu a5,4(a5) +30100d3e: 8395 srli a5,a5,0x5 +30100d40: 0ff7f793 zext.b a5,a5 +30100d44: 00579693 slli a3,a5,0x5 +30100d48: fd844783 lbu a5,-40(s0) +30100d4c: 8bfd andi a5,a5,31 +30100d4e: 873e mv a4,a5 +30100d50: 87b6 mv a5,a3 +30100d52: 8fd9 or a5,a5,a4 +30100d54: fcf40c23 sb a5,-40(s0) +30100d58: fe042423 sw zero,-24(s0) +30100d5c: fcc42503 lw a0,-52(s0) +30100d60: fec42603 lw a2,-20(s0) +30100d64: fe442703 lw a4,-28(s0) +30100d68: fd440793 addi a5,s0,-44 +30100d6c: c402 sw zero,8(sp) +30100d6e: c202 sw zero,4(sp) +30100d70: c002 sw zero,0(sp) +30100d72: 48c1 li a7,16 +30100d74: 883e mv a6,a5 +30100d76: 4781 li a5,0 +30100d78: fe842683 lw a3,-24(s0) +30100d7c: 65b1 lui a1,0xc +30100d7e: 0c058593 addi a1,a1,192 # c0c0 <_start-0x300f3f40> +30100d82: 2a2d jal 30100ebc +30100d84: 4791 li a5,4 +30100d86: fef42423 sw a5,-24(s0) +30100d8a: fcc42503 lw a0,-52(s0) +30100d8e: fec42603 lw a2,-20(s0) +30100d92: fe442703 lw a4,-28(s0) +30100d96: fd440793 addi a5,s0,-44 +30100d9a: 0791 addi a5,a5,4 +30100d9c: c402 sw zero,8(sp) +30100d9e: c202 sw zero,4(sp) +30100da0: c002 sw zero,0(sp) +30100da2: 48c1 li a7,16 +30100da4: 883e mv a6,a5 +30100da6: 4781 li a5,0 +30100da8: fe842683 lw a3,-24(s0) +30100dac: 65b1 lui a1,0xc +30100dae: 0c058593 addi a1,a1,192 # c0c0 <_start-0x300f3f40> +30100db2: 2229 jal 30100ebc +30100db4: 47a1 li a5,8 +30100db6: fef42423 sw a5,-24(s0) +30100dba: 47a1 li a5,8 +30100dbc: fcf42e23 sw a5,-36(s0) +30100dc0: fcc42503 lw a0,-52(s0) +30100dc4: fec42603 lw a2,-20(s0) +30100dc8: fe442703 lw a4,-28(s0) +30100dcc: fe042683 lw a3,-32(s0) +30100dd0: fdc42783 lw a5,-36(s0) +30100dd4: c402 sw zero,8(sp) +30100dd6: c23e sw a5,4(sp) +30100dd8: fd440793 addi a5,s0,-44 +30100ddc: 0795 addi a5,a5,5 +30100dde: c03e sw a5,0(sp) +30100de0: 4881 li a7,0 +30100de2: 4801 li a6,0 +30100de4: 87b6 mv a5,a3 +30100de6: fe842683 lw a3,-24(s0) +30100dea: 6591 lui a1,0x4 +30100dec: 04058593 addi a1,a1,64 # 4040 <_start-0x300fbfc0> +30100df0: 20f1 jal 30100ebc +30100df2: fc842783 lw a5,-56(s0) +30100df6: 0057c783 lbu a5,5(a5) +30100dfa: 8389 srli a5,a5,0x2 +30100dfc: 8b85 andi a5,a5,1 +30100dfe: 0ff7f793 zext.b a5,a5 +30100e02: 8b85 andi a5,a5,1 +30100e04: 00279693 slli a3,a5,0x2 +30100e08: fd944783 lbu a5,-39(s0) +30100e0c: 9bed andi a5,a5,-5 +30100e0e: 873e mv a4,a5 +30100e10: 87b6 mv a5,a3 +30100e12: 8fd9 or a5,a5,a4 +30100e14: fcf40ca3 sb a5,-39(s0) +30100e18: fc842783 lw a5,-56(s0) +30100e1c: 0057c783 lbu a5,5(a5) +30100e20: 8b8d andi a5,a5,3 +30100e22: 0ff7f793 zext.b a5,a5 +30100e26: 0037f693 andi a3,a5,3 +30100e2a: fd944783 lbu a5,-39(s0) +30100e2e: 9bf1 andi a5,a5,-4 +30100e30: 873e mv a4,a5 +30100e32: 87b6 mv a5,a3 +30100e34: 8fd9 or a5,a5,a4 +30100e36: fcf40ca3 sb a5,-39(s0) +30100e3a: fc842783 lw a5,-56(s0) +30100e3e: 0057c783 lbu a5,5(a5) +30100e42: 838d srli a5,a5,0x3 +30100e44: 8b85 andi a5,a5,1 +30100e46: 0ff7f793 zext.b a5,a5 +30100e4a: 8b85 andi a5,a5,1 +30100e4c: 00379693 slli a3,a5,0x3 +30100e50: fd944783 lbu a5,-39(s0) +30100e54: 9bdd andi a5,a5,-9 +30100e56: 873e mv a4,a5 +30100e58: 87b6 mv a5,a3 +30100e5a: 8fd9 or a5,a5,a4 +30100e5c: fcf40ca3 sb a5,-39(s0) +30100e60: fc842783 lw a5,-56(s0) +30100e64: 0057c783 lbu a5,5(a5) +30100e68: 8399 srli a5,a5,0x6 +30100e6a: 8b85 andi a5,a5,1 +30100e6c: 0ff7f793 zext.b a5,a5 +30100e70: 8b85 andi a5,a5,1 +30100e72: 00679693 slli a3,a5,0x6 +30100e76: fd944783 lbu a5,-39(s0) +30100e7a: fbf7f793 andi a5,a5,-65 +30100e7e: 873e mv a4,a5 +30100e80: 87b6 mv a5,a3 +30100e82: 8fd9 or a5,a5,a4 +30100e84: fcf40ca3 sb a5,-39(s0) +30100e88: fcc42503 lw a0,-52(s0) +30100e8c: fec42603 lw a2,-20(s0) +30100e90: fe442703 lw a4,-28(s0) +30100e94: fd440793 addi a5,s0,-44 +30100e98: 0795 addi a5,a5,5 +30100e9a: c402 sw zero,8(sp) +30100e9c: c202 sw zero,4(sp) +30100e9e: c002 sw zero,0(sp) +30100ea0: 48c1 li a7,16 +30100ea2: 883e mv a6,a5 +30100ea4: 4781 li a5,0 +30100ea6: fe842683 lw a3,-24(s0) +30100eaa: 65b1 lui a1,0xc +30100eac: 0c058593 addi a1,a1,192 # c0c0 <_start-0x300f3f40> +30100eb0: 2031 jal 30100ebc +30100eb2: 0001 nop +30100eb4: 40b6 lw ra,76(sp) +30100eb6: 4426 lw s0,72(sp) +30100eb8: 6161 addi sp,sp,80 +30100eba: 8082 ret + +30100ebc : +30100ebc: 715d addi sp,sp,-80 +30100ebe: c686 sw ra,76(sp) +30100ec0: c4a2 sw s0,72(sp) +30100ec2: 0880 addi s0,sp,80 +30100ec4: fca42623 sw a0,-52(s0) +30100ec8: fcb42423 sw a1,-56(s0) +30100ecc: fcc42223 sw a2,-60(s0) +30100ed0: fcd42023 sw a3,-64(s0) +30100ed4: fae42e23 sw a4,-68(s0) +30100ed8: faf42c23 sw a5,-72(s0) +30100edc: fb042a23 sw a6,-76(s0) +30100ee0: fb142823 sw a7,-80(s0) +30100ee4: fcc42783 lw a5,-52(s0) +30100ee8: 459d li a1,7 +30100eea: 853e mv a0,a5 +30100eec: 1faff097 auipc ra,0x1faff +30100ef0: 224080e7 jalr 548(ra) # 4fc00110 +30100ef4: fc842783 lw a5,-56(s0) +30100ef8: 07c2 slli a5,a5,0x10 +30100efa: 83c1 srli a5,a5,0x10 +30100efc: fcf41823 sh a5,-48(s0) +30100f00: fc442783 lw a5,-60(s0) +30100f04: 07c2 slli a5,a5,0x10 +30100f06: 83c1 srli a5,a5,0x10 +30100f08: fcf41923 sh a5,-46(s0) +30100f0c: fc040793 addi a5,s0,-64 +30100f10: fcf42a23 sw a5,-44(s0) +30100f14: fbc42783 lw a5,-68(s0) +30100f18: fcf42c23 sw a5,-40(s0) +30100f1c: fb442783 lw a5,-76(s0) +30100f20: fcf42e23 sw a5,-36(s0) +30100f24: fb042783 lw a5,-80(s0) +30100f28: fef42023 sw a5,-32(s0) +30100f2c: 401c lw a5,0(s0) +30100f2e: fef42223 sw a5,-28(s0) +30100f32: 405c lw a5,4(s0) +30100f34: fef42423 sw a5,-24(s0) +30100f38: fb842783 lw a5,-72(s0) +30100f3c: fef42623 sw a5,-20(s0) +30100f40: fcc42783 lw a5,-52(s0) +30100f44: fd040713 addi a4,s0,-48 +30100f48: 85ba mv a1,a4 +30100f4a: 853e mv a0,a5 +30100f4c: 1faff097 auipc ra,0x1faff +30100f50: 1bc080e7 jalr 444(ra) # 4fc00108 +30100f54: fcc42503 lw a0,-52(s0) +30100f58: 405c lw a5,4(s0) +30100f5a: 838d srli a5,a5,0x3 +30100f5c: 07c2 slli a5,a5,0x10 +30100f5e: 83c1 srli a5,a5,0x10 +30100f60: 00844703 lbu a4,8(s0) +30100f64: 4689 li a3,2 +30100f66: 863e mv a2,a5 +30100f68: 400c lw a1,0(s0) +30100f6a: 1faff097 auipc ra,0x1faff +30100f6e: 1a2080e7 jalr 418(ra) # 4fc0010c +30100f72: 0001 nop +30100f74: 40b6 lw ra,76(sp) +30100f76: 4426 lw s0,72(sp) +30100f78: 6161 addi sp,sp,80 +30100f7a: 8082 ret + +30100f7c : +30100f7c: 7139 addi sp,sp,-64 +30100f7e: de06 sw ra,60(sp) +30100f80: dc22 sw s0,56(sp) +30100f82: 0080 addi s0,sp,64 +30100f84: fca42e23 sw a0,-36(s0) +30100f88: 5a6b87b7 lui a5,0x5a6b8 +30100f8c: c8d78793 addi a5,a5,-883 # 5a6b7c8d +30100f90: fef42623 sw a5,-20(s0) +30100f94: fe042423 sw zero,-24(s0) +30100f98: fdc42503 lw a0,-36(s0) +30100f9c: fec40793 addi a5,s0,-20 +30100fa0: c402 sw zero,8(sp) +30100fa2: c202 sw zero,4(sp) +30100fa4: c002 sw zero,0(sp) +30100fa6: 02000893 li a7,32 +30100faa: 883e mv a6,a5 +30100fac: 47b1 li a5,12 +30100fae: 02000713 li a4,32 +30100fb2: 4681 li a3,0 +30100fb4: 4641 li a2,16 +30100fb6: 65a1 lui a1,0x8 +30100fb8: 08058593 addi a1,a1,128 # 8080 <_start-0x300f7f80> +30100fbc: 3701 jal 30100ebc +30100fbe: fdc42503 lw a0,-36(s0) +30100fc2: c402 sw zero,8(sp) +30100fc4: 02000793 li a5,32 +30100fc8: c23e sw a5,4(sp) +30100fca: fe840793 addi a5,s0,-24 +30100fce: c03e sw a5,0(sp) +30100fd0: 4881 li a7,0 +30100fd2: 4801 li a6,0 +30100fd4: 47e9 li a5,26 +30100fd6: 02000713 li a4,32 +30100fda: 4681 li a3,0 +30100fdc: 4641 li a2,16 +30100fde: 4581 li a1,0 +30100fe0: 3df1 jal 30100ebc +30100fe2: fe842703 lw a4,-24(s0) +30100fe6: fec42783 lw a5,-20(s0) +30100fea: ,----- 00f71463 bne a4,a5,30100ff2 +30100fee: | 4781 li a5,0 +30100ff0: | ,-- a011 j 30100ff4 +30100ff2: '--|-> 57fd li a5,-1 +30100ff4: '-> 853e mv a0,a5 +30100ff6: 50f2 lw ra,60(sp) +30100ff8: 5462 lw s0,56(sp) +30100ffa: 6121 addi sp,sp,64 +30100ffc: 8082 ret + +30100ffe : +30100ffe: 7179 addi sp,sp,-48 +30101000: d606 sw ra,44(sp) +30101002: d422 sw s0,40(sp) +30101004: 1800 addi s0,sp,48 +30101006: fea42623 sw a0,-20(s0) +3010100a: feb42423 sw a1,-24(s0) +3010100e: fec42503 lw a0,-20(s0) +30101012: fe842783 lw a5,-24(s0) +30101016: c402 sw zero,8(sp) +30101018: 4741 li a4,16 +3010101a: c23a sw a4,4(sp) +3010101c: c03e sw a5,0(sp) +3010101e: 4881 li a7,0 +30101020: 4801 li a6,0 +30101022: 47b1 li a5,12 +30101024: 02000713 li a4,32 +30101028: 4681 li a3,0 +3010102a: 4641 li a2,16 +3010102c: 6591 lui a1,0x4 +3010102e: 04058593 addi a1,a1,64 # 4040 <_start-0x300fbfc0> +30101032: 3569 jal 30100ebc +30101034: fec42503 lw a0,-20(s0) +30101038: fe842783 lw a5,-24(s0) +3010103c: 0789 addi a5,a5,2 +3010103e: c402 sw zero,8(sp) +30101040: 4741 li a4,16 +30101042: c23a sw a4,4(sp) +30101044: c03e sw a5,0(sp) +30101046: 4881 li a7,0 +30101048: 4801 li a6,0 +3010104a: 47b1 li a5,12 +3010104c: 02000713 li a4,32 +30101050: 4689 li a3,2 +30101052: 4641 li a2,16 +30101054: 6591 lui a1,0x4 +30101056: 04058593 addi a1,a1,64 # 4040 <_start-0x300fbfc0> +3010105a: 358d jal 30100ebc +3010105c: fec42503 lw a0,-20(s0) +30101060: fe842783 lw a5,-24(s0) +30101064: 0791 addi a5,a5,4 +30101066: c402 sw zero,8(sp) +30101068: 4721 li a4,8 +3010106a: c23a sw a4,4(sp) +3010106c: c03e sw a5,0(sp) +3010106e: 4881 li a7,0 +30101070: 4801 li a6,0 +30101072: 47b1 li a5,12 +30101074: 02000713 li a4,32 +30101078: 4691 li a3,4 +3010107a: 4641 li a2,16 +3010107c: 6591 lui a1,0x4 +3010107e: 04058593 addi a1,a1,64 # 4040 <_start-0x300fbfc0> +30101082: 3d2d jal 30100ebc +30101084: fec42503 lw a0,-20(s0) +30101088: fe842783 lw a5,-24(s0) +3010108c: 0795 addi a5,a5,5 +3010108e: c402 sw zero,8(sp) +30101090: 4721 li a4,8 +30101092: c23a sw a4,4(sp) +30101094: c03e sw a5,0(sp) +30101096: 4881 li a7,0 +30101098: 4801 li a6,0 +3010109a: 47b1 li a5,12 +3010109c: 02000713 li a4,32 +301010a0: 46a1 li a3,8 +301010a2: 4641 li a2,16 +301010a4: 6591 lui a1,0x4 +301010a6: 04058593 addi a1,a1,64 # 4040 <_start-0x300fbfc0> +301010aa: 3d09 jal 30100ebc +301010ac: 0001 nop +301010ae: 50b2 lw ra,44(sp) +301010b0: 5422 lw s0,40(sp) +301010b2: 6145 addi sp,sp,48 +301010b4: 8082 ret diff --git a/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Startup/Startup.c b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Startup/Startup.c new file mode 100644 index 000000000..e57215024 --- /dev/null +++ b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Startup/Startup.c @@ -0,0 +1,202 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2026. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +// Originally from: + +// *************************************************************************************** +// Filename : Startup.c +// +// Author : Chalandi Amine +// +// Owner : Chalandi Amine +// +// Date : 11.03.2020 +// +// Description : C/C++ Runtime Setup (Crt0) +// +// *************************************************************************************** + +#include + +//========================================================================================= +// Types definitions +//========================================================================================= +typedef struct +{ + unsigned long sourceAddr; /* Source Address (section in ROM memory) */ + unsigned long targetAddr; /* Target Address (section in RAM memory) */ + unsigned long size; /* length of section (bytes) */ +} +runtimeCopyTable_t; + +typedef struct +{ + unsigned long addr; /* Source Address (section in RAM memory) */ + unsigned long size; /* Length of section (bytes) */ +} +runtimeClearTable_t; + +//========================================================================================= +// Linker variables +//========================================================================================= +extern const runtimeCopyTable_t __RUNTIME_COPY_TABLE[]; +extern const runtimeClearTable_t __RUNTIME_CLEAR_TABLE[]; +extern unsigned long __CTOR_LIST__[]; + +//========================================================================================= +// Defines +//========================================================================================= +#define __STARTUP_RUNTIME_COPYTABLE (runtimeCopyTable_t*)(&__RUNTIME_COPY_TABLE[0]) +#define __STARTUP_RUNTIME_CLEARTABLE (runtimeClearTable_t*)(&__RUNTIME_CLEAR_TABLE[0]) +#define __STARTUP_RUNTIME_CTORS (unsigned long*)(&__CTOR_LIST__[0]) + +//========================================================================================= +// Function prototype +//========================================================================================= +void Startup_Init(void); +static void Startup_InitRam(void); +static void Startup_InitCtors(void); +static void Startup_RunApplication(void); +static void Startup_Unexpected_Exit(void); +static void Startup_InitMcuSystem(void); + +//========================================================================================= +// Extern function prototype +//========================================================================================= +extern int main_x(void) __attribute__((used,noinline)); + +//----------------------------------------------------------------------------------------- +/// \brief Startup_Init function +/// +/// \param void +/// +/// \return void +//----------------------------------------------------------------------------------------- +void Startup_Init(void) +{ + /* Initialize the MCU system */ + Startup_InitMcuSystem(); + + /* Initialize the RAM memory */ + Startup_InitRam(); + + /* Initialize the non-local C++ objects */ + Startup_InitCtors(); + + /* Run the main application */ + Startup_RunApplication(); +} + +//----------------------------------------------------------------------------------------- +/// \brief Startup_InitRam function +/// +/// \param void +/// +/// \return void +//----------------------------------------------------------------------------------------- +static void Startup_InitRam(void) +{ + unsigned long ClearTableIdx = 0; + unsigned long CopyTableIdx = 0; + + /* Clear Table */ + while((__STARTUP_RUNTIME_CLEARTABLE)[ClearTableIdx].addr != (unsigned long)-1 && (__STARTUP_RUNTIME_CLEARTABLE)[ClearTableIdx].size != (unsigned long)-1) + { + for(unsigned long idx = 0; idx < ((unsigned long)((__STARTUP_RUNTIME_CLEARTABLE)[ClearTableIdx].size) / 4); idx++) + { + ((unsigned long*)((__STARTUP_RUNTIME_CLEARTABLE)[ClearTableIdx].addr))[idx] = 0; + } + + ClearTableIdx++; + } + + /* Copy Table */ + while((__STARTUP_RUNTIME_COPYTABLE)[CopyTableIdx].sourceAddr != (unsigned long)-1 && + (__STARTUP_RUNTIME_COPYTABLE)[CopyTableIdx].targetAddr != (unsigned long)-1 && + (__STARTUP_RUNTIME_COPYTABLE)[CopyTableIdx].size != (unsigned long)-1 + ) + { + for(unsigned long idx = 0; idx < ((unsigned long)((__STARTUP_RUNTIME_COPYTABLE)[CopyTableIdx].size) / 4); idx++) + { + ((unsigned long*)((__STARTUP_RUNTIME_COPYTABLE)[CopyTableIdx].targetAddr))[idx] = + ((unsigned long*)((__STARTUP_RUNTIME_COPYTABLE)[CopyTableIdx].sourceAddr))[idx]; + } + + CopyTableIdx++; + } +} + +//----------------------------------------------------------------------------------------- +/// \brief Startup_InitCtors function +/// +/// \param void +/// +/// \return void +//----------------------------------------------------------------------------------------- +static void Startup_InitCtors(void) +{ + unsigned long CtorIdx = 0U; + + while((__STARTUP_RUNTIME_CTORS)[CtorIdx] != ((unsigned long)-1)) + { + ((void (*)(void))((__STARTUP_RUNTIME_CTORS)[CtorIdx++]))(); + } +} + +//----------------------------------------------------------------------------------------- +/// \brief Startup_RunApplication function +/// +/// \param void +/// +/// \return void +//----------------------------------------------------------------------------------------- +static void Startup_RunApplication(void) +{ + /* check the weak function */ + if((unsigned int) &main_x != 0) + { +#ifdef HP_CORES_SMP_MODE + // note: RISC-V has no WFE/SEV instructions to synchronize SMP system + // so I am using CLINT to synchronize both HP cores on ESP32-P4 + + // Notify core1 that the setup of the runtime environment is done + // by setting the SW interrupt pending bit in CLINT on core1. + + *(volatile uint32_t*)0x20010000 = 1; +#endif + + // Call the main function. + main_x(); + } + + // Catch unexpected exit from main or if main does not exist. + Startup_Unexpected_Exit(); +} + +//----------------------------------------------------------------------------------------- +/// \brief Startup_Unexpected_Exit function +/// +/// \param void +/// +/// \return void +//----------------------------------------------------------------------------------------- +static void Startup_Unexpected_Exit(void) +{ + for(;;); +} + +//----------------------------------------------------------------------------------------- +/// \brief Startup_InitMcuSystem function +/// +/// \param void +/// +/// \return void +//----------------------------------------------------------------------------------------- +static void Startup_InitMcuSystem(void) +{ + // The system clock is set by the SBL. +} diff --git a/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Startup/boot.s b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Startup/boot.s new file mode 100644 index 000000000..2af61f36c --- /dev/null +++ b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Startup/boot.s @@ -0,0 +1,211 @@ +/****************************************************************************************** +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2026. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +// Originally from: +******************************************************************************************/ + +/****************************************************************************************** + Filename : boot.s + + Core : RISC-V + + MCU : ESP32-P4 + + Author : Chalandi Amine + + Owner : Chalandi Amine + + Date : 06.01.2026 + + Description : boot routine for HP cores + +******************************************************************************************/ + +/******************************************************************************************* + \brief + + \param + + \return +********************************************************************************************/ +.section .boot +.type _start, @function +.align 2 +.globl _start +.extern main_x + +.set mtvt, 0x307 +.set msip, 0x20000000 + +_start: + /* setup the interrupt vector table (CLIC) */ + la t0, InterruptVectorTable + csrw mtvt, t0 + + /* setup the exception vector table (CLINT) */ + la t0, ExceptionVectorTable + csrw mtvec, t0 + + /* Enable FPU by setting FS bits in mstatus */ + li t0, 0x00006000 + csrs mstatus, t0 + fscsr x0 + + /* Read machine hart ID */ + csrr a0, mhartid + bnez a0, .L_core1 + la sp, __CORE0_STACK_TOP + jal Startup_Init + j . + +.L_core1: + /* note: - RISC-V has no WFE/SEV instructions to synchronize SMP system + so I am using CLINT to synchronize both HP cores on ESP32-P4. + - Core0 will set the software interrupt pending flag in CLINT on Core1 + once the runtime environment setup is complete. + */ + li a5, msip + lw a0, 0(a5) + beqz a0, .L_core1 + li a0, 0 + sw a0, 0(a5) + la sp, __CORE1_STACK_TOP + jal main_x + j . + +/******************************************************************************************* + \brief + + \param + + \return +********************************************************************************************/ +.section .text +.type ExceptionVectorTable, @function +.align 6 +.globl ExceptionVectorTable + +ExceptionVectorTable: + j . + +.size ExceptionVectorTable, .-ExceptionVectorTable + +/******************************************************************************************* + \brief uint32_t osGetActiveCore(void) + + \param void + + \return uint32_t : Active Core ID +********************************************************************************************/ +.section ".text", "ax" +.align 2 +.globl osGetActiveCore +.type osGetActiveCore, @function + + +osGetActiveCore: + csrr a0, mhartid + ret + +.size osGetActiveCore, .-osGetActiveCore + +/******************************************************************************************* + \brief void osHwAcquireSpinLock(uint32* lock) + + \param lock: pointer to the lock variable + + \return void +********************************************************************************************/ +.section ".text", "ax" +.align 2 +.globl osHwAcquireSpinLock +.type osHwAcquireSpinLock, @function + + +osHwAcquireSpinLock: lr.w a1, (a0) + bne zero, a1, osHwAcquireSpinLock + add a1, zero, 1 + sc.w t0, a1, (a0) + bnez t0, osHwAcquireSpinLock + ret + +.size osHwAcquireSpinLock, .-osHwAcquireSpinLock + +/******************************************************************************************* + \brief uint32_t osHwTryToAcquireSpinLock(uint32_t* lock) + + \param lock: pointer to the lock variable + + \return uint32_t 0 -> not acquired, 1 -> acquired +********************************************************************************************/ +.section ".text", "ax" +.align 2 +.globl osHwTryToAcquireSpinLock +.type osHwTryToAcquireSpinLock, @function + + +osHwTryToAcquireSpinLock: + lr.w a1, (a0) + bne zero, a1, .L_not_acquired + add a1, zero, 1 + sc.w t0, a1, (a0) + bnez t0, .L_not_acquired + add a0, x0, 1 + ret +.L_not_acquired: + mv a0, x0 + ret + +.size osHwTryToAcquireSpinLock, .-osHwTryToAcquireSpinLock + +/******************************************************************************************* + \brief void osHwReleaseSpinLock(uint32_t* lock) + + \param lock: pointer to the lock variable + + \return void +********************************************************************************************/ +.section ".text", "ax" +.align 2 +.globl osHwReleaseSpinLock +.type osHwReleaseSpinLock, @function + + +osHwReleaseSpinLock: lr.w a1, (a0) + add a2, zero, 1 + bne a2, a1, osHwReleaseSpinLock + sc.w t0, zero, (a0) + bnez t0, osHwReleaseSpinLock + ret + +.size osHwReleaseSpinLock, .-osHwReleaseSpinLock + +/* +----------------------------------------------------------------- + Register | ABI Name | Description | Saver +----------------------------------------------------------------- + x0 | zero | Hard-wired zero | - + x1 | ra | Return address | Caller + x2 | sp | Stack pointer | Callee + x3 | gp | Global pointer | - + x4 | tp | Thread pointer | - + x5-7 | t0-2 | Temporaries | Caller + x8 | s0/fp | Saved register/frame pointer | Callee + x9 | s1 | Saved register | Callee + x10-11 | a0-1 | Function arguments/return values | Caller + x12-17 | a2-7 | Function arguments | Caller + x18-27 | s2-11 | Saved registers | Callee + x28-31 | t3-6 | Temporaries | Caller + f0-7 | ft0-7 | FP temporaries | Caller + f8-9 | fs0-1 | FP saved registers | Callee + f10-11 | fa0-1 | FP arguments/return values | Caller + f12-17 | fa2-7 | FP arguments | Caller + f18-27 | fs2-11 | FP saved registers | Callee + f28-31 | ft8-11 | FP temporaries | Caller +----------------------------------------------------------------- +*/ diff --git a/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Startup/intvect.c b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Startup/intvect.c new file mode 100644 index 000000000..391b26a49 --- /dev/null +++ b/ref_app/target/micros/xtensa_esp32_p4/startup/Code/Startup/intvect.c @@ -0,0 +1,127 @@ +/////////////////////////////////////////////////////////////////////////////// +// Copyright Christopher Kormanyos 2026. +// Distributed under the Boost Software License, +// Version 1.0. (See accompanying file LICENSE_1_0.txt +// or copy at http://www.boost.org/LICENSE_1_0.txt) +// + +// Originally from: + +/****************************************************************************************************** + Filename : intvect.c + + Core : RISC-V + + MCU : ESP32-P4 + + Author : Chalandi Amine + + Owner : Chalandi Amine + + Date : 22.01.2026 + + Description : Interrupt vector table implementation + +******************************************************************************************************/ + +//===================================================================================================== +// Includes +//===================================================================================================== +#include + +//===================================================================================================== +// Functions prototype +//===================================================================================================== +static void UndefinedHandler(void); +static void UndefinedHandler(void){ for(;;); } + +void Isr_SW_Interrupt (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt00 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt01 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt02 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt03 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt04 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt05 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt06 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt07 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt08 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt09 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt10 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt11 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt12 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt13 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt14 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt15 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt16 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt17 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt18 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt19 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt20 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt21 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt22 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt23 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt24 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt25 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt26 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt27 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt28 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt29 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt30 (void) __attribute__((weak, alias("UndefinedHandler"))); +void Isr_ExtInt31 (void) __attribute__((weak, alias("UndefinedHandler"))); + +typedef void (*InterruptHandler)(void); + +//===================================================================================================== +// Interrupt vector table +//===================================================================================================== +const InterruptHandler __attribute__((aligned(64))) InterruptVectorTable[] = +{ + (InterruptHandler)&UndefinedHandler, /* IRQ 00 Reserved */ + (InterruptHandler)&UndefinedHandler, /* IRQ 01 Reserved */ + (InterruptHandler)&UndefinedHandler, /* IRQ 02 Reserved */ + (InterruptHandler)&Isr_SW_Interrupt, /* IRQ 03 M mode software interrupt */ + (InterruptHandler)&UndefinedHandler, /* IRQ 04 Reserved */ + (InterruptHandler)&UndefinedHandler, /* IRQ 05 Reserved */ + (InterruptHandler)&UndefinedHandler, /* IRQ 06 Reserved */ + (InterruptHandler)&UndefinedHandler, /* IRQ 07 M mode timer interrupt */ + (InterruptHandler)&UndefinedHandler, /* IRQ 08 Reserved */ + (InterruptHandler)&UndefinedHandler, /* IRQ 09 Reserved */ + (InterruptHandler)&UndefinedHandler, /* IRQ 10 Reserved */ + (InterruptHandler)&UndefinedHandler, /* IRQ 11 Reserved */ + (InterruptHandler)&UndefinedHandler, /* IRQ 12 Reserved */ + (InterruptHandler)&UndefinedHandler, /* IRQ 13 Reserved */ + (InterruptHandler)&UndefinedHandler, /* IRQ 14 Reserved */ + (InterruptHandler)&UndefinedHandler, /* IRQ 15 Reserved */ + (InterruptHandler)&Isr_ExtInt00, /* IRQ 16 External Interrupt (00) */ + (InterruptHandler)&Isr_ExtInt01, /* IRQ 17 External Interrupt (01) */ + (InterruptHandler)&Isr_ExtInt02, /* IRQ 18 External Interrupt (02) */ + (InterruptHandler)&Isr_ExtInt03, /* IRQ 19 External Interrupt (03) */ + (InterruptHandler)&Isr_ExtInt04, /* IRQ 20 External Interrupt (04) */ + (InterruptHandler)&Isr_ExtInt05, /* IRQ 21 External Interrupt (05) */ + (InterruptHandler)&Isr_ExtInt06, /* IRQ 22 External Interrupt (06) */ + (InterruptHandler)&Isr_ExtInt07, /* IRQ 23 External Interrupt (07) */ + (InterruptHandler)&Isr_ExtInt08, /* IRQ 24 External Interrupt (08) */ + (InterruptHandler)&Isr_ExtInt09, /* IRQ 25 External Interrupt (09) */ + (InterruptHandler)&Isr_ExtInt10, /* IRQ 26 External Interrupt (10) */ + (InterruptHandler)&Isr_ExtInt11, /* IRQ 27 External Interrupt (11) */ + (InterruptHandler)&Isr_ExtInt12, /* IRQ 28 External Interrupt (12) */ + (InterruptHandler)&Isr_ExtInt13, /* IRQ 29 External Interrupt (13) */ + (InterruptHandler)&Isr_ExtInt14, /* IRQ 30 External Interrupt (14) */ + (InterruptHandler)&Isr_ExtInt15, /* IRQ 31 External Interrupt (15) */ + (InterruptHandler)&Isr_ExtInt16, /* IRQ 32 External Interrupt (16) */ + (InterruptHandler)&Isr_ExtInt17, /* IRQ 33 External Interrupt (17) */ + (InterruptHandler)&Isr_ExtInt18, /* IRQ 34 External Interrupt (18) */ + (InterruptHandler)&Isr_ExtInt19, /* IRQ 35 External Interrupt (19) */ + (InterruptHandler)&Isr_ExtInt20, /* IRQ 36 External Interrupt (20) */ + (InterruptHandler)&Isr_ExtInt21, /* IRQ 37 External Interrupt (21) */ + (InterruptHandler)&Isr_ExtInt22, /* IRQ 38 External Interrupt (22) */ + (InterruptHandler)&Isr_ExtInt23, /* IRQ 39 External Interrupt (23) */ + (InterruptHandler)&Isr_ExtInt24, /* IRQ 40 External Interrupt (24) */ + (InterruptHandler)&Isr_ExtInt25, /* IRQ 41 External Interrupt (25) */ + (InterruptHandler)&Isr_ExtInt26, /* IRQ 42 External Interrupt (26) */ + (InterruptHandler)&Isr_ExtInt27, /* IRQ 43 External Interrupt (27) */ + (InterruptHandler)&Isr_ExtInt28, /* IRQ 44 External Interrupt (28) */ + (InterruptHandler)&Isr_ExtInt29, /* IRQ 45 External Interrupt (29) */ + (InterruptHandler)&Isr_ExtInt30, /* IRQ 46 External Interrupt (30) */ + (InterruptHandler)&Isr_ExtInt31, /* IRQ 47 External Interrupt (31) */ +}; diff --git a/ref_app/target/micros/xtensa_esp32_s3_riscv_cop/make/xtensa_esp32_s3_riscv_cop_flags.gmk b/ref_app/target/micros/xtensa_esp32_s3_riscv_cop/make/xtensa_esp32_s3_riscv_cop_flags.gmk index 89cfcb7dc..bce3b52d6 100644 --- a/ref_app/target/micros/xtensa_esp32_s3_riscv_cop/make/xtensa_esp32_s3_riscv_cop_flags.gmk +++ b/ref_app/target/micros/xtensa_esp32_s3_riscv_cop/make/xtensa_esp32_s3_riscv_cop_flags.gmk @@ -1,4 +1,4 @@ -# Copyright Christopher Kormanyos 2022 - 2025. +# Copyright Christopher Kormanyos 2022 - 2026. # Distributed under the Boost Software License, # Version 1.0. (See accompanying file LICENSE_1_0.txt # or copy at http://www.boost.org/LICENSE_1_0.txt) @@ -8,10 +8,10 @@ # compiler flags for the target architecture # ------------------------------------------------------------------------------ -GCC_TARGET := riscv-none-elf -GCC_PREFIX := riscv-none-elf +GCC_TARGET := riscv32-esp-elf +GCC_PREFIX := riscv32-esp-elf -GCC_VERSION := 15.2.0 +GCC_VERSION := 14.2.0 TGT_SUFFIX := elf