diff --git a/ref_app/ref_app.vcxproj b/ref_app/ref_app.vcxproj index ec9eb4389..9faabde92 100644 --- a/ref_app/ref_app.vcxproj +++ b/ref_app/ref_app.vcxproj @@ -1401,10 +1401,6 @@ true true - - true - true - true true @@ -3277,10 +3273,6 @@ true true - - true - true - true true diff --git a/ref_app/ref_app.vcxproj.filters b/ref_app/ref_app.vcxproj.filters index 4a621cec8..3c8d1f3da 100644 --- a/ref_app/ref_app.vcxproj.filters +++ b/ref_app/ref_app.vcxproj.filters @@ -1402,9 +1402,6 @@ src\mcal\xtensa_esp32_p4 - - src\mcal\xtensa_esp32_p4 - @@ -3198,9 +3195,6 @@ src\mcal\xtensa_esp32_p4 - - src\mcal\xtensa_esp32_p4 - diff --git a/ref_app/src/app/led/app_led.cpp b/ref_app/src/app/led/app_led.cpp index e47acb1b4..96b828769 100644 --- a/ref_app/src/app/led/app_led.cpp +++ b/ref_app/src/app/led/app_led.cpp @@ -1,5 +1,5 @@ /////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2025. +// Copyright Christopher Kormanyos 2007 - 2026. // Distributed under the Boost Software License, // Version 1.0. (See accompanying file LICENSE_1_0.txt // or copy at http://www.boost.org/LICENSE_1_0.txt) @@ -29,24 +29,25 @@ namespace local auto local::app_led_timer() noexcept -> app_led_timer_type& { - static app_led_timer_type local_app_led_timer - { - local::app_led_delay - }; + static app_led_timer_type local_app_led_timer { }; return local_app_led_timer; } auto app::led::task_init() -> void { + local::app_led_timer().start_interval(local::app_led_delay); + mcal::led::led0().toggle(); } auto app::led::task_func() -> void { - if(local::app_led_timer().timeout()) + auto& my_app_led_timer { local::app_led_timer() }; + + if(my_app_led_timer.timeout()) { - local::app_led_timer().start_interval(local::app_led_delay); + my_app_led_timer.start_interval(local::app_led_delay); mcal::led::led0().toggle(); } diff --git a/ref_app/src/mcal/xtensa_esp32_p4/gpio.c b/ref_app/src/mcal/xtensa_esp32_p4/gpio.c deleted file mode 100644 index 3e2660f9b..000000000 --- a/ref_app/src/mcal/xtensa_esp32_p4/gpio.c +++ /dev/null @@ -1,177 +0,0 @@ -/////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2026. -// Distributed under the Boost Software License, -// Version 1.0. (See accompanying file LICENSE_1_0.txt -// or copy at http://www.boost.org/LICENSE_1_0.txt) -// - -// Originally from: - -/****************************************************************************************** - Filename : gpio.c - - Core : RISC-V - - MCU : ESP32-P4 - - Author : Chalandi Amine - - Owner : Chalandi Amine - - Date : 25.01.2026 - - Description : GPIO driver implementation - -******************************************************************************************/ - -#include - -#include - -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -constexpr uintptr_t GPIO_BASE = (uintptr_t) 0x500E0000UL; -constexpr uintptr_t LP_IO_MUX_BASE = (uintptr_t) 0x5012B000UL; -constexpr uintptr_t IO_MUX_BASE = (uintptr_t) 0x500E1000UL; - -typedef union -{ - volatile uint32_t reg; - - struct - { - volatile uint32_t MCU_OE : 1; - volatile uint32_t SLP_SEL : 1; - volatile uint32_t MCU_WPD : 1; - volatile uint32_t MCU_WPU : 1; - volatile uint32_t MCU_IE : 1; - volatile uint32_t MCU_DRV : 2; - volatile uint32_t FUN_WPD : 1; - volatile uint32_t FUN_WPU : 1; - volatile uint32_t FUN_IE : 1; - volatile uint32_t FUN_DRV : 2; - volatile uint32_t MCU_SEL : 3; - volatile uint32_t FILTER_EN : 1; - uint32_t : 16; - } - bit; -} -IO_MUX_GPIO; - -typedef union -{ - __IOM uint32_t reg; - - struct - { - __IOM uint32_t OUT_SEL : 9; - __IOM uint32_t INV_SEL : 1; - __IOM uint32_t OEN_SEL : 1; - __IOM uint32_t OEN_INV_SEL : 1; - uint32_t : 20; - } - bit; -} -GPIO_FUNC_OUT_SEL_CFG; - -typedef union -{ - __IOM uint32_t reg; - - struct - { - __IOM uint32_t REG_PAD_DRV : 2; - __IOM uint32_t REG_PAD_RDE : 1; - __IOM uint32_t REG_PAD_RUE : 1; - __IOM uint32_t REG_PAD_MUX_SEL : 1; - __IOM uint32_t REG_PAD_FUN_SEL : 2; - __IOM uint32_t REG_PAD_SLP_SEL : 1; - __IOM uint32_t REG_PAD_SLP_IE : 1; - __IOM uint32_t REG_PAD_SLP_OE : 1; - __IOM uint32_t REG_PAD_FUN_IE : 1; - __IOM uint32_t REG_PAD_FILTER_EN : 1; - uint32_t : 20; - } - bit; -} -LP_IO_MUX_GPIO; - -//----------------------------------------------------------------------------------------- -/// \brief -/// -/// \param -/// -/// \return -//----------------------------------------------------------------------------------------- -void gpio_cfg_output(const uint8_t pin) -{ - if((unsigned) pin > 54u) - { - return; - } - - volatile IO_MUX_GPIO* pIO_MUX_GPIO = (volatile IO_MUX_GPIO*)(IO_MUX_BASE + 4u + 4u * (unsigned) pin); - volatile GPIO_FUNC_OUT_SEL_CFG* pGPIO_FUNC_OUT_SEL_CFG = (volatile GPIO_FUNC_OUT_SEL_CFG*)(GPIO_BASE + 0x558ul + 4u * (unsigned) pin); - volatile LP_IO_MUX_GPIO* pLP_IO_MUX_GPIO = (volatile LP_IO_MUX_GPIO*)(LP_IO_MUX_BASE + 8u + 4u * (unsigned) pin); - volatile uint32_t* pGPIO_OUTx_W1TC = (volatile uint32_t*)(GPIO_BASE + (((unsigned) pin < 32u) ? 0x0Cu : 0x18u)); - volatile uint32_t* pGPIO_ENABLE1x_W1TS = (volatile uint32_t*)(GPIO_BASE + (((unsigned) pin < 32u) ? 0x24u : 0x30u)); - - /* configure the pinmux */ - pIO_MUX_GPIO->bit.FUN_DRV = 2; - pIO_MUX_GPIO->bit.FUN_IE = 0; - pIO_MUX_GPIO->bit.MCU_SEL = 1; - - /* set the output configuration */ - pGPIO_FUNC_OUT_SEL_CFG->bit.OUT_SEL = 256; - pGPIO_FUNC_OUT_SEL_CFG->bit.OEN_SEL = 1; - - if(pin < 16) - { - /* make LP_GPIO use HP_IO_MUX */ - pLP_IO_MUX_GPIO->bit.REG_PAD_MUX_SEL = 0; - } - - /* drive the IO output low */ - *pGPIO_OUTx_W1TC = (uint32_t)(1u << (((unsigned) pin < 32u) ? (unsigned) pin : ((unsigned) pin - 32u))); - *pGPIO_ENABLE1x_W1TS = (uint32_t)(1u << (((unsigned) pin < 32u) ? (unsigned) pin : ((unsigned) pin - 32u))); -} - -//----------------------------------------------------------------------------------------- -/// \brief -/// -/// \param -/// -/// \return -//----------------------------------------------------------------------------------------- -void gpio_set_output_level(const uint8_t pin, const uint8_t level) -{ - volatile uint32_t* pGPIO_OUT_W1Tx = (volatile uint32_t*)(GPIO_BASE + (((unsigned) pin < 32u) ? 8u : 0x14u) + (((unsigned) level == 1u) ? (0u) : (4u))); - - if(((unsigned) pin > 54u) || ((unsigned) level > 1u)) - { - return; - } - - *pGPIO_OUT_W1Tx = (uint32_t)(1u << (((unsigned) pin < 32u) ? (unsigned) pin : ((unsigned) pin - 32u))); -} - -//----------------------------------------------------------------------------------------- -/// \brief -/// -/// \param -/// -/// \return -//----------------------------------------------------------------------------------------- -void gpio_toggle_output_level(const uint8_t pin) -{ - volatile uint32_t* pGPIO_OUT = (volatile uint32_t*)(GPIO_BASE + 4u + (((unsigned) pin < 32u) ? 0u : 0xCu)); - - if((unsigned) pin > 54u) - { - return; - } - - *pGPIO_OUT ^= (uint32_t)(1u << (((unsigned) pin < 32u) ? (unsigned) pin : ((unsigned) pin - 32u))); -} diff --git a/ref_app/src/mcal/xtensa_esp32_p4/gpio.h b/ref_app/src/mcal/xtensa_esp32_p4/gpio.h deleted file mode 100644 index 57012ad9f..000000000 --- a/ref_app/src/mcal/xtensa_esp32_p4/gpio.h +++ /dev/null @@ -1,48 +0,0 @@ -/////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2026. -// Distributed under the Boost Software License, -// Version 1.0. (See accompanying file LICENSE_1_0.txt -// or copy at http://www.boost.org/LICENSE_1_0.txt) -// - -// Originally from: - -/****************************************************************************************** - Filename : gpio.h - - Core : RISC-V - - MCU : ESP32-P4 - - Author : Chalandi Amine - - Owner : Chalandi Amine - - Date : 25.01.2026 - - Description : GPIO driver header file - -******************************************************************************************/ -#ifndef GPIO_2026_02_13_H - #define GPIO_2026_02_13_H - - #if defined(__cplusplus) - #include - #else - #include - #endif - - #if defined(__cplusplus) - extern "C" - { - #endif - - void gpio_cfg_output(const uint8_t pin); - void gpio_set_output_level(const uint8_t pin, const uint8_t level); - void gpio_toggle_output_level(const uint8_t pin); - - #if defined(__cplusplus) - } - #endif - -#endif // GPIO_2026_02_13_H diff --git a/ref_app/src/mcal/xtensa_esp32_p4/mcal_port.h b/ref_app/src/mcal/xtensa_esp32_p4/mcal_port.h index a6975fb25..5b8254a6f 100644 --- a/ref_app/src/mcal/xtensa_esp32_p4/mcal_port.h +++ b/ref_app/src/mcal/xtensa_esp32_p4/mcal_port.h @@ -1,16 +1,35 @@ /////////////////////////////////////////////////////////////////////////////// -// Copyright Christopher Kormanyos 2007 - 2026. +// Copyright Christopher Kormanyos 2026. // Distributed under the Boost Software License, // Version 1.0. (See accompanying file LICENSE_1_0.txt // or copy at http://www.boost.org/LICENSE_1_0.txt) // +// Register port manipulations are originally from: + +/****************************************************************************************** + Filename : gpio.c + + Core : RISC-V + + MCU : ESP32-P4 + + Author : Chalandi Amine + + Owner : Chalandi Amine + + Date : 25.01.2026 + + Description : GPIO driver implementation + +******************************************************************************************/ + #ifndef MCAL_PORT_2025_02_22_H #define MCAL_PORT_2025_02_22_H - #include #include + #include #include namespace mcal @@ -24,10 +43,130 @@ template class port_pin { + private: + static constexpr std::uint8_t my_pin { static_cast(PortIndex) }; + + static constexpr uintptr_t GPIO_BASE { (uintptr_t) UINT32_C(0x500E0000) }; + static constexpr uintptr_t LP_IO_MUX_BASE { (uintptr_t) UINT32_C(0x5012B000) }; + static constexpr uintptr_t IO_MUX_BASE { (uintptr_t) UINT32_C(0x500E1000) }; + + typedef union + { + volatile uint32_t reg; + + struct + { + volatile uint32_t MCU_OE : 1; + volatile uint32_t SLP_SEL : 1; + volatile uint32_t MCU_WPD : 1; + volatile uint32_t MCU_WPU : 1; + volatile uint32_t MCU_IE : 1; + volatile uint32_t MCU_DRV : 2; + volatile uint32_t FUN_WPD : 1; + volatile uint32_t FUN_WPU : 1; + volatile uint32_t FUN_IE : 1; + volatile uint32_t FUN_DRV : 2; + volatile uint32_t MCU_SEL : 3; + volatile uint32_t FILTER_EN : 1; + uint32_t : 16; + } + bit; + } + IO_MUX_GPIO; + + typedef union + { + volatile uint32_t reg; + + struct + { + volatile uint32_t OUT_SEL : 9; + volatile uint32_t INV_SEL : 1; + volatile uint32_t OEN_SEL : 1; + volatile uint32_t OEN_INV_SEL : 1; + uint32_t : 20; + } + bit; + } + GPIO_FUNC_OUT_SEL_CFG; + + typedef union + { + volatile uint32_t reg; + + struct + { + volatile uint32_t REG_PAD_DRV : 2; + volatile uint32_t REG_PAD_RDE : 1; + volatile uint32_t REG_PAD_RUE : 1; + volatile uint32_t REG_PAD_MUX_SEL : 1; + volatile uint32_t REG_PAD_FUN_SEL : 2; + volatile uint32_t REG_PAD_SLP_SEL : 1; + volatile uint32_t REG_PAD_SLP_IE : 1; + volatile uint32_t REG_PAD_SLP_OE : 1; + volatile uint32_t REG_PAD_FUN_IE : 1; + volatile uint32_t REG_PAD_FILTER_EN : 1; + uint32_t : 20; + } + bit; + } + LP_IO_MUX_GPIO; + + static void gpio_cfg_output() + { + if((unsigned) my_pin <= 54u) + { + volatile IO_MUX_GPIO* pIO_MUX_GPIO = (volatile IO_MUX_GPIO*)(IO_MUX_BASE + 4u + 4u * (unsigned) my_pin); + volatile GPIO_FUNC_OUT_SEL_CFG* pGPIO_FUNC_OUT_SEL_CFG = (volatile GPIO_FUNC_OUT_SEL_CFG*)(GPIO_BASE + 0x558ul + 4u * (unsigned) my_pin); + volatile LP_IO_MUX_GPIO* pLP_IO_MUX_GPIO = (volatile LP_IO_MUX_GPIO*)(LP_IO_MUX_BASE + 8u + 4u * (unsigned) my_pin); + volatile uint32_t* pGPIO_OUTx_W1TC = (volatile uint32_t*)(GPIO_BASE + (((unsigned) my_pin < 32u) ? 0x0Cu : 0x18u)); + volatile uint32_t* pGPIO_ENABLE1x_W1TS = (volatile uint32_t*)(GPIO_BASE + (((unsigned) my_pin < 32u) ? 0x24u : 0x30u)); + + /* configure the pinmux */ + pIO_MUX_GPIO->bit.FUN_DRV = 2; + pIO_MUX_GPIO->bit.FUN_IE = 0; + pIO_MUX_GPIO->bit.MCU_SEL = 1; + + /* set the output configuration */ + pGPIO_FUNC_OUT_SEL_CFG->bit.OUT_SEL = 256; + pGPIO_FUNC_OUT_SEL_CFG->bit.OEN_SEL = 1; + + if((unsigned) my_pin < 16u) + { + /* make LP_GPIO use HP_IO_MUX */ + pLP_IO_MUX_GPIO->bit.REG_PAD_MUX_SEL = 0; + } + + /* drive the IO output low */ + *pGPIO_OUTx_W1TC = (uint32_t)(1u << (((unsigned) my_pin < 32u) ? (unsigned) my_pin : ((unsigned) my_pin - 32u))); + *pGPIO_ENABLE1x_W1TS = (uint32_t)(1u << (((unsigned) my_pin < 32u) ? (unsigned) my_pin : ((unsigned) my_pin - 32u))); + } + } + + static void gpio_set_output_level(const uint8_t level) + { + if(((unsigned) my_pin <= 54u) && ((unsigned) level <= 1u)) + { + volatile uint32_t* pGPIO_OUT_W1Tx = (volatile uint32_t*)(GPIO_BASE + (((unsigned) my_pin < 32u) ? 8u : 0x14u) + (((unsigned) level == 1u) ? (0u) : (4u))); + + *pGPIO_OUT_W1Tx = (uint32_t)(1u << (((unsigned) my_pin < 32u) ? (unsigned) my_pin : ((unsigned) my_pin - 32u))); + } + } + + static void gpio_toggle_output_level() + { + if((unsigned) my_pin <= 54u) + { + volatile uint32_t* pGPIO_OUT = (volatile uint32_t*)(GPIO_BASE + 4u + (((unsigned) my_pin < 32u) ? 0u : 0xCu)); + + *pGPIO_OUT ^= (uint32_t)(1u << (((unsigned) my_pin < 32u) ? (unsigned) my_pin : ((unsigned) my_pin - 32u))); + } + } + public: static auto set_direction_output() -> void { - ::gpio_cfg_output(static_cast(PortIndex)); + gpio_cfg_output(); } static auto set_direction_input() -> void @@ -36,12 +175,12 @@ static auto set_pin_high() -> void { - ::gpio_set_output_level(static_cast(PortIndex), std::uint8_t { UINT8_C(1) }); + gpio_set_output_level(std::uint8_t { UINT8_C(1) }); } static auto set_pin_low() -> void { - ::gpio_set_output_level(static_cast(PortIndex), std::uint8_t { UINT8_C(0) }); + gpio_set_output_level(std::uint8_t { UINT8_C(0) }); } static auto read_input_value() -> bool @@ -51,7 +190,7 @@ static auto toggle_pin() -> void { - ::gpio_toggle_output_level(static_cast(PortIndex)); + gpio_toggle_output_level(); } }; } diff --git a/ref_app/target/micros/xtensa_esp32_p4/make/xtensa_esp32_p4_files.gmk b/ref_app/target/micros/xtensa_esp32_p4/make/xtensa_esp32_p4_files.gmk index 24ef54f1a..188fcb972 100644 --- a/ref_app/target/micros/xtensa_esp32_p4/make/xtensa_esp32_p4_files.gmk +++ b/ref_app/target/micros/xtensa_esp32_p4/make/xtensa_esp32_p4_files.gmk @@ -10,7 +10,6 @@ # ------------------------------------------------------------------------------ FILES_TGT := $(PATH_APP)/mcal/mcal_gcc_cxx_completion \ - $(PATH_APP)/mcal/$(TGT)/gpio \ $(PATH_TGT)/startup/Code/Appli/main \ $(PATH_TGT)/startup/Code/Appli/main_cores \ $(PATH_TGT)/startup/Code/Startup/boot \ diff --git a/ref_app/target/micros/xtensa_esp32_p4/make/xtensa_esp32_p4_flags.gmk b/ref_app/target/micros/xtensa_esp32_p4/make/xtensa_esp32_p4_flags.gmk index 3d7d4d99a..e4e32320f 100644 --- a/ref_app/target/micros/xtensa_esp32_p4/make/xtensa_esp32_p4_flags.gmk +++ b/ref_app/target/micros/xtensa_esp32_p4/make/xtensa_esp32_p4_flags.gmk @@ -35,7 +35,6 @@ TGT_CXXFLAGS = -std=c++23 TGT_INCLUDES = -I$(PATH_TGT)/startup/Code \ -I$(PATH_TGT)/startup/Code/Appli \ - -I$(PATH_TGT)/startup/Code/Mcal \ -I$(PATH_TGT)/startup/Code/Startup