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50 changes: 11 additions & 39 deletions Cargo.lock

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2 changes: 1 addition & 1 deletion Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -39,7 +39,7 @@ fdt = "0.1.5"
chrono = { version = "0.4", default-features = false }

[target.'cfg(target_arch = "x86_64")'.dependencies]
uart_16550 = "0.4.0"
uart_16550 = "0.6.0"
x86_64 = { version = "0.15.4", default-features = false, features = [
"instructions",
] }
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6 changes: 3 additions & 3 deletions src/main.rs
Original file line number Diff line number Diff line change
Expand Up @@ -180,7 +180,7 @@ fn boot_from_device(
#[cfg(target_arch = "x86_64")]
#[no_mangle]
pub extern "C" fn rust64_start(#[cfg(not(feature = "coreboot"))] pvh_info: &pvh::StartInfo) -> ! {
serial::PORT.borrow_mut().init();
serial::init();
logger::init();

arch::x86_64::sse::enable_sse();
Expand All @@ -202,7 +202,7 @@ pub extern "C" fn rust64_start(x0: *const u8) -> ! {
arch::aarch64::paging::setup();

// Use atomic operation before MMU enabled may cause exception, see https://www.ipshop.xyz/5909.html
serial::PORT.borrow_mut().init();
serial::init();
logger::init();

let info = fdt::StartInfo::new(
Expand All @@ -225,7 +225,7 @@ pub extern "C" fn rust64_start(x0: *const u8) -> ! {
pub extern "C" fn rust64_start(a0: u64, a1: *const u8) -> ! {
use crate::bootinfo::{EntryType, Info, MemoryEntry};

serial::PORT.borrow_mut().init();
serial::init();
logger::init();

info!("Starting on RV64 0x{:x} 0x{:x}", a0, a1 as u64,);
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37 changes: 34 additions & 3 deletions src/serial.rs
Original file line number Diff line number Diff line change
Expand Up @@ -12,14 +12,14 @@ use atomic_refcell::AtomicRefCell;
use crate::{arch::aarch64::layout::map, uart_pl011::Pl011 as UartPl011};

#[cfg(target_arch = "x86_64")]
use uart_16550::SerialPort as Uart16550;
use uart_16550::{backend::PioBackend, Config, Uart16550Tty};

#[cfg(target_arch = "riscv64")]
use crate::uart_mmio::UartMmio;

// We use COM1 as it is the standard first serial port.
#[cfg(target_arch = "x86_64")]
pub static PORT: AtomicRefCell<Uart16550> = AtomicRefCell::new(unsafe { Uart16550::new(0x3f8) });
pub static PORT: AtomicRefCell<Option<Uart16550Tty<PioBackend>>> = AtomicRefCell::new(None);

#[cfg(target_arch = "aarch64")]
pub static PORT: AtomicRefCell<UartPl011> =
Expand All @@ -31,10 +31,41 @@ const SERIAL_PORT_ADDRESS: u64 = 0x1000_0000;
#[cfg(target_arch = "riscv64")]
pub static PORT: AtomicRefCell<UartMmio> = AtomicRefCell::new(UartMmio::new(SERIAL_PORT_ADDRESS));

#[cfg(target_arch = "x86_64")]
pub fn init() {
let mut port = PORT.borrow_mut();

if port.is_none() {
*port = Some(unsafe {
Uart16550Tty::new_port(0x3f8, Config::default())
.expect("Failed to initialize UART16550")
});
}
}

#[cfg(not(target_arch = "x86_64"))]
pub fn init() {
PORT.borrow_mut().init();
}

pub struct Serial;
impl fmt::Write for Serial {
fn write_str(&mut self, s: &str) -> fmt::Result {
PORT.borrow_mut().write_str(s)
#[cfg(target_arch = "x86_64")]
{
let mut port = PORT.borrow_mut();

if let Some(port) = port.as_mut() {
return fmt::Write::write_str(port, s);
}

Ok(())
}

#[cfg(not(target_arch = "x86_64"))]
{
PORT.borrow_mut().write_str(s)
}
}
}

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