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| 1 | +From 1940844fb8e77df8343203b29a5308823d11650d Mon Sep 17 00:00:00 2001 |
| 2 | +From: Colin Davidson <colin.davidson@codeplay.com> |
| 3 | +Date: Fri, 29 Aug 2025 13:59:14 +0100 |
| 4 | +Subject: [PATCH] Update lit tests |
| 5 | + |
| 6 | +--- |
| 7 | + .../llvm/VectorPredication/packetize_mask_varying.ll | 8 ++------ |
| 8 | + .../test/lit/llvm/inlined_function_debug_info.ll | 3 +-- |
| 9 | + .../vecz/test/lit/llvm/insert_element_debug_info.ll | 3 +-- |
| 10 | + .../vecz/test/lit/llvm/irreducible_loop.ll | 12 ++---------- |
| 11 | + .../vecz/test/lit/llvm/packetization_debug_info.ll | 3 +-- |
| 12 | + .../vecz/test/lit/llvm/phi_node_debug_info.ll | 3 +-- |
| 13 | + .../vecz/test/lit/llvm/scalarization_debug_info.ll | 3 +-- |
| 14 | + 7 files changed, 9 insertions(+), 26 deletions(-) |
| 15 | + |
| 16 | +diff --git a/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/VectorPredication/packetize_mask_varying.ll b/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/VectorPredication/packetize_mask_varying.ll |
| 17 | +index 5c1df71ed947..0ce65b9f4ca0 100644 |
| 18 | +--- a/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/VectorPredication/packetize_mask_varying.ll |
| 19 | ++++ b/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/VectorPredication/packetize_mask_varying.ll |
| 20 | +@@ -14,8 +14,7 @@ |
| 21 | + ; |
| 22 | + ; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 23 | + |
| 24 | +-; RUN: %pp-llvm-ver -o %t < %s --llvm-ver %LLVMVER |
| 25 | +-; RUN: veczc -k mask_varying -vecz-scalable -vecz-simd-width=4 -vecz-choices=VectorPredication -S < %s | FileCheck %t |
| 26 | ++; RUN: veczc -k mask_varying -vecz-scalable -vecz-simd-width=4 -vecz-choices=VectorPredication -S < %s | FileCheck %s |
| 27 | + |
| 28 | + target triple = "spir64-unknown-unknown" |
| 29 | + target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" |
| 30 | +@@ -40,10 +39,7 @@ if.end: |
| 31 | + ; CHECK: define spir_kernel void @__vecz_nxv4_vp_mask_varying |
| 32 | + ; CHECK: [[CMP:%.*]] = icmp slt <vscale x 4 x i64> %{{.*}}, |
| 33 | + ; CHECK: [[RED:%.*]] = call i1 @llvm.vp.reduce.or.nxv4i1(i1 false, <vscale x 4 x i1> [[CMP]], {{.*}}, i32 {{.*}}) |
| 34 | +-; CHECK-LT20: [[REINS:%.*]] = insertelement <4 x i1> poison, i1 [[RED]], {{(i32|i64)}} 0 |
| 35 | +-; CHECK-LT20: [[RESPLAT:%.*]] = shufflevector <4 x i1> [[REINS]], <4 x i1> poison, <4 x i32> zeroinitializer |
| 36 | +-; CHECK-LT20: [[VAL:%.*]] = call <4 x i32> @__vecz_b_masked_load16_Dv4_ju3ptrDv4_b(ptr %aptr, <4 x i1> [[RESPLAT]]) |
| 37 | +-; CHECK-GE20: [[VAL:%.*]] = load <4 x i32>, ptr %aptr |
| 38 | ++; CHECK: [[VAL:%.*]] = load <4 x i32>, ptr %aptr |
| 39 | + } |
| 40 | + |
| 41 | + declare i64 @__mux_get_global_id(i32) |
| 42 | +diff --git a/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/inlined_function_debug_info.ll b/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/inlined_function_debug_info.ll |
| 43 | +index c14a5a421f95..ce041960424b 100644 |
| 44 | +--- a/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/inlined_function_debug_info.ll |
| 45 | ++++ b/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/inlined_function_debug_info.ll |
| 46 | +@@ -16,8 +16,7 @@ |
| 47 | + |
| 48 | + ; Check VECZ debug info for inlined DILocation metadata nodes |
| 49 | + |
| 50 | +-; RUN: %pp-llvm-ver -o %t < %s --llvm-ver %LLVMVER |
| 51 | +-; RUN: veczc -k functions_one -vecz-passes=builtin-inlining -vecz-simd-width=4 -S < %s | FileCheck %t |
| 52 | ++; RUN: veczc -k functions_one -vecz-passes=builtin-inlining -vecz-simd-width=4 -S < %s | FileCheck %s |
| 53 | + |
| 54 | + ; ModuleID = '/tmp/inlined_function.ll' |
| 55 | + target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" |
| 56 | +diff --git a/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/insert_element_debug_info.ll b/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/insert_element_debug_info.ll |
| 57 | +index 5f82e99e6d58..a0a72bfe7271 100644 |
| 58 | +--- a/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/insert_element_debug_info.ll |
| 59 | ++++ b/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/insert_element_debug_info.ll |
| 60 | +@@ -18,8 +18,7 @@ |
| 61 | + ; intrinsics across all lanes even when scalarization masks disable some |
| 62 | + ; of the lanes. This occurs when we scalarize insertelement instructions. |
| 63 | + |
| 64 | +-; RUN: %pp-llvm-ver -o %t < %s --llvm-ver %LLVMVER |
| 65 | +-; RUN: veczc -k unaligned_load -vecz-passes="function(instcombine,adce),scalarize,packetizer,instcombine" -vecz-simd-width=4 -vecz-choices=FullScalarization -S < %s | FileCheck %t |
| 66 | ++; RUN: veczc -k unaligned_load -vecz-passes="function(instcombine,adce),scalarize,packetizer,instcombine" -vecz-simd-width=4 -vecz-choices=FullScalarization -S < %s | FileCheck %s |
| 67 | + |
| 68 | + ; ModuleID = 'kernel.opencl' |
| 69 | + target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" |
| 70 | +diff --git a/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/irreducible_loop.ll b/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/irreducible_loop.ll |
| 71 | +index e81e139e52da..770a31740a8b 100644 |
| 72 | +--- a/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/irreducible_loop.ll |
| 73 | ++++ b/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/irreducible_loop.ll |
| 74 | +@@ -14,8 +14,7 @@ |
| 75 | + ; |
| 76 | + ; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 77 | + |
| 78 | +-; RUN: %pp-llvm-ver -o %t < %s --llvm-ver %LLVMVER |
| 79 | +-; RUN: veczc -k irreducible_loop -S < %s | FileCheck %t |
| 80 | ++; RUN: veczc -k irreducible_loop -S < %s | FileCheck %s |
| 81 | + |
| 82 | + ; ModuleID = 'Unknown buffer' |
| 83 | + target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" |
| 84 | +@@ -49,17 +48,10 @@ declare i64 @__mux_get_global_id(i32) |
| 85 | + |
| 86 | + ; CHECK: define spir_kernel void @__vecz_v4_irreducible_loop |
| 87 | + ; CHECK: entry: |
| 88 | +-; CHECK-LT20: br label %irr.guard.outer |
| 89 | +- |
| 90 | +-; CHECK-LT20: irr.guard.outer: ; preds = %irr.guard.pure_exit, %entry |
| 91 | + ; CHECK: br label %irr.guard |
| 92 | + |
| 93 | +-; CHECK-LT20: do.end: ; preds = %irr.guard.pure_exit |
| 94 | +-; CHECK-LT20: ret void |
| 95 | +- |
| 96 | + ; CHECK: irr.guard: |
| 97 | + ; CHECK: br i1 %{{.+}}, label %irr.guard.pure_exit, label %irr.guard |
| 98 | + |
| 99 | + ; CHECK: irr.guard.pure_exit: ; preds = %irr.guard |
| 100 | +-; CHECK-LT20: br i1 %{{.+}}, label %do.end, label %irr.guard.outer |
| 101 | +-; CHECK-GE20: ret void |
| 102 | ++; CHECK: ret void |
| 103 | +diff --git a/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/packetization_debug_info.ll b/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/packetization_debug_info.ll |
| 104 | +index eaaba4463f9e..456414d1c22f 100644 |
| 105 | +--- a/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/packetization_debug_info.ll |
| 106 | ++++ b/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/packetization_debug_info.ll |
| 107 | +@@ -17,8 +17,7 @@ |
| 108 | + ; Check that debug info is preserved in the vectorized kernel. |
| 109 | + ; Specifically that the packetization pass creates vector types |
| 110 | + ; in the DI for the variables. |
| 111 | +-; RUN: %pp-llvm-ver -o %t < %s --llvm-ver %LLVMVER |
| 112 | +-; RUN: veczc -k add -S < %s | FileCheck %t |
| 113 | ++; RUN: veczc -k add -S < %s | FileCheck %s |
| 114 | + |
| 115 | + ; ModuleID = 'kernel.opencl' |
| 116 | + target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" |
| 117 | +diff --git a/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/phi_node_debug_info.ll b/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/phi_node_debug_info.ll |
| 118 | +index 8e6c5a095423..aabbd65bf105 100644 |
| 119 | +--- a/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/phi_node_debug_info.ll |
| 120 | ++++ b/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/phi_node_debug_info.ll |
| 121 | +@@ -17,8 +17,7 @@ |
| 122 | + ; Check that debug info intrinsics are correctly placed after |
| 123 | + ; phi nodes. |
| 124 | + |
| 125 | +-; RUN: %pp-llvm-ver -o %t < %s --llvm-ver %LLVMVER |
| 126 | +-; RUN: veczc -vecz-simd-width=4 -S < %s | FileCheck %t |
| 127 | ++; RUN: veczc -vecz-simd-width=4 -S < %s | FileCheck %s |
| 128 | + |
| 129 | + ; ModuleID = 'kernel.opencl' |
| 130 | + target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" |
| 131 | +diff --git a/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/scalarization_debug_info.ll b/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/scalarization_debug_info.ll |
| 132 | +index 85189b3651eb..2e7c1a2202c7 100644 |
| 133 | +--- a/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/scalarization_debug_info.ll |
| 134 | ++++ b/llvm/lib/SYCLNativeCPUUtils/compiler_passes/vecz/test/lit/llvm/scalarization_debug_info.ll |
| 135 | +@@ -18,8 +18,7 @@ |
| 136 | + ; Specifically that the scalarization pass doesn't destroy DI |
| 137 | + ; intrinsics attached to the vector instructions it scalarizes. |
| 138 | + |
| 139 | +-; RUN: %pp-llvm-ver -o %t < %s --llvm-ver %LLVMVER |
| 140 | +-; RUN: veczc -k mul2 -vecz-passes="scalarize,function(mem2reg)" -vecz-choices=FullScalarization -S < %s | FileCheck %t |
| 141 | ++; RUN: veczc -k mul2 -vecz-passes="scalarize,function(mem2reg)" -vecz-choices=FullScalarization -S < %s | FileCheck %s |
| 142 | + |
| 143 | + ; ModuleID = 'kernel.opencl' |
| 144 | + target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" |
| 145 | +-- |
| 146 | +2.51.0 |
| 147 | + |
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