arm64: errata: Mitigate TLBI errata on NVIDIA Olympus CPU

jira VULN-187519
cve CVE-2025-10263
commit-author Shanker Donthineni <sdonthineni@nvidia.com>
commit -
commit-source-sha ec7216f
commit-source arm64
upstream-diff silicon-errata.rst at different path and required manual
  conflict resolution due to missing entries in our branch.
  arm64_repeat_tlbi_cpus[] is a flat struct midr_range array on 4.18;
  added MIDR_ALL_VERSIONS() entry directly instead of nested
  ERRATA_MIDR_RANGE_LIST().

NVIDIA Olympus cores are affected by the TLBI completion issue tracked as
CVE-2025-10263. The existing ARM64_ERRATUM_4118414 handling already uses
ARM64_WORKAROUND_REPEAT_TLBI to issue an additional broadcast TLBI;DSB
sequence and ensure affected memory write effects are globally observed.

Add MIDR_NVIDIA_OLYMPUS to the repeat-TLBI match list so the same
mitigation is enabled on affected Olympus systems. Also document the
NVIDIA Olympus erratum in the arm64 silicon errata table and list it in
the Kconfig help text.

	Signed-off-by: Shanker Donthineni <sdonthineni@nvidia.com>
	Cc: Catalin Marinas <catalin.marinas@arm.com>
	Cc: Will Deacon <will@kernel.org>
	Cc: Mark Rutland <mark.rutland@arm.com>
	Acked-by: Mark Rutland <mark.rutland@arm.com>
	Signed-off-by: Will Deacon <will@kernel.org>
(cherry picked from commit ec7216f)
	Signed-off-by: Brett Mastbergen <bmastbergen@ciq.com>

Author: bmastbergen

Documentation/arm64/silicon-errata.rst

@@ -164,6 +164,8 @@ stable kernels.
 +----------------+-----------------+-----------------+-----------------------------+
 | NVIDIA         | Carmel Core     | N/A             | NVIDIA_CARMEL_CNP_ERRATUM   |
 +----------------+-----------------+-----------------+-----------------------------+
+| NVIDIA         | Olympus core    | T410-OLY-1029   | ARM64_ERRATUM_4118414       |
++----------------+-----------------+-----------------+-----------------------------+
 +----------------+-----------------+-----------------+-----------------------------+
 | Freescale/NXP  | LS2080A/LS1043A | A-008585        | FSL_ERRATUM_A008585         |
 +----------------+-----------------+-----------------+-----------------------------+

arch/arm64/Kconfig

@@ -623,7 +623,7 @@ config ARM64_ERRATUM_1542419
 	  If unsure, say Y.
 
 config ARM64_ERRATUM_4118414
-	bool "Cortex-*/Neoverse-*/C1-*: Completion of affected memory accesses might not be guaranteed by completion of a TLBI"
+	bool "Various: Completion of affected memory accesses might not be guaranteed by completion of a TLBI"
 	default y
 	select ARM64_WORKAROUND_REPEAT_TLBI
 	help
@@ -650,6 +650,7 @@ config ARM64_ERRATUM_4118414
 	  * ARM Neoverse-V2 erratum 4193787
 	  * ARM Neoverse-V3 erratum 4193784
 	  * ARM Neoverse-V3AE erratum 4193784
+	  * NVIDIA Olympus erratum T410-OLY-1029
 
 	  On affected cores, some memory accesses might not be completed by
 	  broadcast TLB invalidation.

arch/arm64/kernel/cpu_errata.c

@@ -685,6 +685,7 @@ static const struct midr_range arm64_repeat_tlbi_cpus[] = {
 	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2),
 	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3),
 	MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3AE),
+	MIDR_ALL_VERSIONS(MIDR_NVIDIA_OLYMPUS),
 #endif
 	{},
 };