Commit 7cb2073
committed
arm64: errata: Mitigate TLBI errata on Microsoft Azure Cobalt 100 CPU
cve cve-2025-10263
commit-author Will Deacon <will@kernel.org>
commit -
commit-source-sha 1940e70
commit-source arm64
upstream-diff silicon-errata.rst at different path and required manual
conflict resolution due to missing entries in our branch.
Commit fb091ff ("arm64: Subscribe Microsoft Azure Cobalt 100 to ARM
Neoverse N2 errata") states that Microsoft Azure Cobalt 100 CPU "is a
Microsoft implemented CPU based on r0p0 of the ARM Neoverse N2 CPU, and
therefore suffers from all the same errata.".
So enable the workaround for the latest broadcast TLB invalidation bug
on these parts.
Signed-off-by: Will Deacon <will@kernel.org>
(cherry picked from commit 1940e70)
Signed-off-by: Brett Mastbergen <bmastbergen@ciq.com>
(cherry picked from commit 5257aae)
Signed-off-by: Jonathan Maple <jmaple@ciq.com>1 parent 845a2f5 commit 7cb2073
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