@@ -2927,7 +2927,6 @@ static void intel_pmu_config_acr(int idx, u64 mask, u32 reload)
29272927static void intel_pmu_enable_acr (struct perf_event * event )
29282928{
29292929 struct hw_perf_event * hwc = & event -> hw ;
2930- struct hw_perf_event_ext * hw_ext = event -> hw_ext ;
29312930
29322931 if (!is_acr_event_group (event ) || !event -> attr .config2 ) {
29332932 /*
@@ -2938,7 +2937,7 @@ static void intel_pmu_enable_acr(struct perf_event *event)
29382937 return ;
29392938 }
29402939
2941- intel_pmu_config_acr (hwc -> idx , hw_ext -> config1 , - hwc -> sample_period );
2940+ intel_pmu_config_acr (hwc -> idx , hwc -> config1 , - hwc -> sample_period );
29422941}
29432942
29442943DEFINE_STATIC_CALL_NULL (intel_pmu_enable_acr_event , intel_pmu_enable_acr );
@@ -2999,7 +2998,7 @@ static void intel_pmu_acr_late_setup(struct cpu_hw_events *cpuc)
29992998 if (i + idx >= cpuc -> n_events ||
30002999 !is_acr_event_group (cpuc -> event_list [i + idx ]))
30013000 return ;
3002- __set_bit (cpuc -> assign [i + idx ], (unsigned long * )& event -> hw_ext -> config1 );
3001+ __set_bit (cpuc -> assign [i + idx ], (unsigned long * )& event -> hw . config1 );
30033002 }
30043003 }
30053004 i = j - 1 ;
@@ -3845,9 +3844,9 @@ intel_get_event_constraints(struct cpu_hw_events *cpuc, int idx,
38453844 if (cpuc -> excl_cntrs )
38463845 return intel_get_excl_constraints (cpuc , event , idx , c2 );
38473846
3848- if (event -> hw_ext -> dyn_constraint != ~0ULL ) {
3847+ if (event -> hw . dyn_constraint != ~0ULL ) {
38493848 c2 = dyn_constraint (cpuc , c2 , idx );
3850- c2 -> idxmsk64 &= event -> hw_ext -> dyn_constraint ;
3849+ c2 -> idxmsk64 &= event -> hw . dyn_constraint ;
38513850 c2 -> weight = hweight64 (c2 -> idxmsk64 );
38523851 }
38533852
@@ -4211,7 +4210,7 @@ static bool intel_pmu_is_acr_group(struct perf_event *event)
42114210static inline void intel_pmu_set_acr_cntr_constr (struct perf_event * event ,
42124211 u64 * cause_mask , int * num )
42134212{
4214- event -> hw_ext -> dyn_constraint &= hybrid (event -> pmu , acr_cntr_mask64 );
4213+ event -> hw . dyn_constraint &= hybrid (event -> pmu , acr_cntr_mask64 );
42154214 * cause_mask |= event -> attr .config2 ;
42164215 * num += 1 ;
42174216}
@@ -4220,7 +4219,7 @@ static inline void intel_pmu_set_acr_caused_constr(struct perf_event *event,
42204219 int idx , u64 cause_mask )
42214220{
42224221 if (test_bit (idx , (unsigned long * )& cause_mask ))
4223- event -> hw_ext -> dyn_constraint &= hybrid (event -> pmu , acr_cause_mask64 );
4222+ event -> hw . dyn_constraint &= hybrid (event -> pmu , acr_cause_mask64 );
42244223}
42254224
42264225static int intel_pmu_hw_config (struct perf_event * event )
@@ -4286,7 +4285,7 @@ static int intel_pmu_hw_config(struct perf_event *event)
42864285 return - EINVAL ;
42874286 if (branch_sample_counters (leader )) {
42884287 num ++ ;
4289- leader -> hw_ext -> dyn_constraint &= x86_pmu .lbr_counters ;
4288+ leader -> hw . dyn_constraint &= x86_pmu .lbr_counters ;
42904289 }
42914290 leader -> hw .flags |= PERF_X86_EVENT_BRANCH_COUNTERS ;
42924291
@@ -4295,7 +4294,7 @@ static int intel_pmu_hw_config(struct perf_event *event)
42954294 return - EINVAL ;
42964295 if (branch_sample_counters (sibling )) {
42974296 num ++ ;
4298- sibling -> hw_ext -> dyn_constraint &= x86_pmu .lbr_counters ;
4297+ sibling -> hw . dyn_constraint &= x86_pmu .lbr_counters ;
42994298 }
43004299 }
43014300
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