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irq: phytium: update phytium irq controller driver support to 6.6.0.4#1708

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irq: phytium: update phytium irq controller driver support to 6.6.0.4#1708
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@wangchenlu2236 wangchenlu2236 commented May 14, 2026

This patches updates the support for phytium irq controller driver.

1.iommu/arm-smmu: Add SMMU workaround for Phytium Ps17064
2.arm64: Phytium: Slove the error on aarch32 compiler
3.arm64: Phytium: Fix incorrect MSI compose logic on Phytium PS17064 SoCs

Summary by Sourcery

Update IOMMU, SMMU, and GICv3 ITS handling to apply Phytium PS17064-specific workarounds and defaults.

Bug Fixes:

  • Force IOMMU default domain to identity and enable passthrough on Phytium PS17064 SoCs to avoid issues introduced by the SMMU workaround.
  • Adjust SMMU device probing on Phytium PS17064 by rewriting firmware IDs to match expected stream IDs.
  • Prevent incorrect MSI message composition on Phytium PS17064 by skipping the IOMMU-backed MSI composition path for that CPU model.

Enhancements:

  • Introduce Phytium-specific CPU model checks and helper macro wiring in the IOMMU and SMMU drivers to support PS17064 workarounds.

There are two hacks needed for IOMMU enablement on Phytium
Ps17064 SoC. One is the MSI hack, the other is the SMMU hack.

When using this enablement, we assumes that users would set
CONIFIG_IOMMU_DEFAULT_PASSTHROUGH=y or pass 'iommu.passthrough=on'
or 'iommu.pt' as the kernel command-line parameters. Therefore,
we also force default iommu domain type to IOMMU_DOMAIN_IDENTITY
on Ps17064 to avoid unnecessary troubles.

Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn>
Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn>
Signed-off-by: Wang Chenlu <wangchenlu2236@phytium.com.cn>
When compiling with the aarch32 compiler, the arm64-specific macros were
not defined. Add restriction to bring these macros only into effect
on arm64 architecture.

Mainline: NA
Signed-off-by: Li Mingzhe <limingzhe1839@phytium.com.cn>
Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn>
Signed-off-by: Wang Chenlu <wangchenlu2236@phytium.com.cn>
Fix the logic in its_irq_compose_msi() where CONFIG_ARCH_PHYTIUM
filtering accidentally changed the original behavior.
Now iommu_dma_compose_msi_msg() is skipped only on PS17064 SoCs,
and executed on all other platforms as intended.

Mainline: NA
Signed-off-by: Li Mingzhe <limingzhe1839@phytium.com.cn>
Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn>
Signed-off-by: Wang Chenlu <wangchenlu2236@phytium.com.cn>
@deepin-ci-robot deepin-ci-robot requested a review from BLumia May 14, 2026 03:33
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sourcery-ai Bot commented May 14, 2026

Reviewer's Guide

Updates Phytium PS17064-specific handling in the IOMMU core, ARM SMMU driver, and GICv3 ITS MSI composition path to implement a SoC-specific SMMU workaround and avoid faulty MSI/IOMMU interactions on Phytium SoCs.

Sequence diagram for MSI message composition on Phytium PS17064

sequenceDiagram
    participant DeviceDriver
    participant GICv3_ITS as its_irq_compose_msi_msg
    participant IOMMU_DMA as iommu_dma_compose_msi_msg

    DeviceDriver->>GICv3_ITS: its_irq_compose_msi_msg(irq_data, msg)
    GICv3_ITS->>GICv3_ITS: its_get_event_id(irq_data)
    GICv3_ITS->>GICv3_ITS: read_cpuid_id()
    alt [CPU model != MIDR_PHYTIUM_PS17064]
        GICv3_ITS->>IOMMU_DMA: iommu_dma_compose_msi_msg(msi_desc, msg)
    else [CPU model == MIDR_PHYTIUM_PS17064]
        GICv3_ITS-->>DeviceDriver: return without calling IOMMU_DMA
    end
Loading

Sequence diagram for IOMMU default domain selection on Phytium PS17064

sequenceDiagram
    participant Kernel as kernel_init
    participant IOMMUCore as iommu_subsys_init
    participant CPU as read_cpuid_id

    Kernel->>IOMMUCore: iommu_subsys_init()
    IOMMUCore->>CPU: read_cpuid_id()
    CPU-->>IOMMUCore: midr
    alt [midr & MIDR_CPU_MODEL_MASK == MIDR_PHYTIUM_PS17064]
        IOMMUCore->>IOMMUCore: iommu_set_default_passthrough(true)
    else [other SoCs]
        IOMMUCore->>IOMMUCore: iommu_set_default_translated()<br/>iommu_set_default_passthrough(false)
    end
Loading

File-Level Changes

Change Details Files
Force IOMMU default domain to IDENTITY and passthrough on Phytium PS17064 SoCs, overriding global or cmdline defaults to align with SMMU workaround needs.
  • Include <asm/cputype.h> in the IOMMU core when CONFIG_ARCH_PHYTIUM is enabled to allow CPU model detection.
  • In iommu_subsys_init(), detect MIDR_PHYTIUM_PS17064 via read_cpuid_id() and force iommu_set_default_passthrough(true) regardless of global iommu.passthrough defaults.
  • In iommu_set_def_domain_type(), detect MIDR_PHYTIUM_PS17064 and override iommu_def_domain_type to IOMMU_DOMAIN_IDENTITY while forcing default passthrough, short-circuiting further processing of the parameter.
drivers/iommu/iommu.c
Add an ARM SMMU device-ID rewriting workaround for Phytium PS17064 to adjust firmware-provided IDs before standard SMMU stream ID handling.
  • Include <asm/cputype.h> in the ARM SMMU driver header to allow CPU model detection.
  • Define a Phytium-only FWID_READ() macro to transform firmware-provided IDs into the layout expected by the hardware/driver.
  • In arm_smmu_probe_device(), when running on MIDR_PHYTIUM_PS17064, iterate over fwspec->ids, transform each ID via FWID_READ, and add the rewritten IDs back to the IOMMU fwspec prior to the normal probe path.
drivers/iommu/arm/arm-smmu/arm-smmu.c
drivers/iommu/arm/arm-smmu/arm-smmu.h
Prevent IOMMU MSI message composition on Phytium PS17064 SoCs in the GICv3 ITS driver to avoid incorrect MSI address/data setup.
  • In its_irq_compose_msi_msg(), after computing the ITS base MSI address and data, detect MIDR_PHYTIUM_PS17064 via read_cpuid_id() and, when matched, return early without invoking iommu_dma_compose_msi_msg().
drivers/irqchip/irq-gic-v3-its.c

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Hey - I've left some high level feedback:

  • The Phytium PS17064 CPU model check using read_cpuid_id() & MIDR_CPU_MODEL_MASK is duplicated across multiple files; consider factoring this into a shared helper or macro so future model handling changes only need to be made in one place.
  • In iommu_set_def_domain_type(), the Phytium-specific block silently overrides the user-specified default domain; it would be helpful to emit a pr_info/pr_warn explaining that the requested setting is being ignored on PS17064 due to the SMMU workaround.
  • In arm_smmu_probe_device(), the loop invoking iommu_fwspec_add_ids() for the Phytium workaround does not check the return value and may create duplicate or unexpected IDs; consider handling the return code and/or documenting the expected resulting ID list to avoid subtle fwspec corruption.
Prompt for AI Agents
Please address the comments from this code review:

## Overall Comments
- The Phytium PS17064 CPU model check using `read_cpuid_id() & MIDR_CPU_MODEL_MASK` is duplicated across multiple files; consider factoring this into a shared helper or macro so future model handling changes only need to be made in one place.
- In `iommu_set_def_domain_type()`, the Phytium-specific block silently overrides the user-specified default domain; it would be helpful to emit a `pr_info`/`pr_warn` explaining that the requested setting is being ignored on PS17064 due to the SMMU workaround.
- In `arm_smmu_probe_device()`, the loop invoking `iommu_fwspec_add_ids()` for the Phytium workaround does not check the return value and may create duplicate or unexpected IDs; consider handling the return code and/or documenting the expected resulting ID list to avoid subtle fwspec corruption.

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Pull request overview

This PR adds Phytium PS17064-specific workarounds across the IOMMU/SMMU and GICv3 ITS paths to adjust default IOMMU behavior, stream IDs, and MSI message composition.

Changes:

  • Forces default IOMMU passthrough/identity behavior on PS17064.
  • Adds PS17064 SMMU firmware ID adjustment during device probing.
  • Skips IOMMU-backed MSI message composition for PS17064 ITS interrupts.

Reviewed changes

Copilot reviewed 4 out of 4 changed files in this pull request and generated 2 comments.

File Description
drivers/irqchip/irq-gic-v3-its.c Adds PS17064-specific early return before IOMMU MSI composition.
drivers/iommu/iommu.c Forces default IOMMU passthrough behavior for PS17064.
drivers/iommu/arm/arm-smmu/arm-smmu.h Adds CPU type include and Phytium FWID transformation macro.
drivers/iommu/arm/arm-smmu/arm-smmu.c Applies Phytium FWID workaround during SMMU device probing.

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Comment on lines 12 to +13

#include <asm/cputype.h>
for (i = 0; i < num; i++) {
u32 fwid = FWID_READ(fwspec->ids[i]);

iommu_fwspec_add_ids(dev, &fwid, 1);
@wangchenlu2236 wangchenlu2236 changed the title irq: hytium: update phytium irq controller driver support to 6.6.0.4 irq: phytium: update phytium irq controller driver support to 6.6.0.4 May 14, 2026
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